Abstract: A light emitting diode of silicon carbide having a p-n junction comprising an n-type layer doped with donor impurities, a first p-type layer doped with acceptor impurities, and a second p-type layer doped with acceptor impurities and donor impurities. The first p-type layer has a thickness less than the diffusion length of electrons having flowed from the n-type layer. In this way, the first p-type layer effects light emission related to the acceptor impurities which recombine with the electrons having flowed from the n-type layer, and the second p-type layer effects light emission by donor-acceptor pairs which recombine with the electrons having flowed from the n-type layer.
Abstract: A heterojunction semiconductor device comprises a semi-insulating substrate, a channel layer comprising first and second sub-layers provided on the substrate for sustaining a two-dimensional carrier gas therein, a carrier supplying layer of a doped semiconductor material provided on the channel layer, a source electrode a drain electrode and a gate electrode provided on the carrier supplying layer. The first and second sub-layers have respective first and second saturation drift velocities of carriers such that the first saturation drift velocity is substantially larger than said second saturation drift velocity.
Abstract: A semiconductor device is manufactured by forming an epitaxial layer (22) insulated from a silicon substrate (2), and forming a device in the epitaxial layer (22). On the semiconductor substrate (2), a silicon dioxide layer (4) is formed (FIG. 2A). Then the silicon dioxide layer (4) is provided with openings (14) (FIG. 2D). Silicon carbide is grown until it protrudes from the openings (14) to thereby form a silicon carbide seed crystal layer (16) (FIG. 2E). Next, oxidation is carried out, allowing a field oxide layer (20) to be connected at the portion under the openings (14) and the silicon carbide seed crystal layer (16) to be insulated from the silicon substrate (2). Thereafter, epitaxial growth is effected from the silicon carbide seed crystal layer (16). The growth is stopped before silicon carbide grown layers (22) connect to one another, thus obtaining epitaxially grown layers (22) having regions which are separate from one another. The MOS device is formed in this epitaxially grown layer (22).
Abstract: An article of manufacture having an epitaxial (111) magnesium oxide (MgO) layer, suitable for use as a buffer layer, on a (111) surface of a tetrahedral semiconductor substrate, and method for its manufacture is described. The article may further include an epitaxial oxide overlayer on the (111) MgO layer. The overlayer may be a conducting, superconducting, and/or ferroelectric oxide layer. The method of producing the epitaxial (111) magnesium oxide (MgO) layer on the (111) surface of a tetrahedral semiconductor substrate proceeds at low temperature. The method may further include steps for forming the epitaxial oxide layer on the (111) MgO layer. The methods include the steps of preparing the (111) surface of a tetrahedral semiconductor substrate for deposition and the low temperature depositing of an MgO layer on the prepared surface. Further steps may include the depositing of the oxide layer over the MgO layer.
Abstract: A semiconductor device utilizing a non-doped diamond layer between a substrate and an active diamond layer. Such a structure decreases the resistivity and increases the carrier density. Further, when contacts are formed on the active layer, this layer structure reduces reverse leak current.
Abstract: A hetero crystalline structure consisting of semiconductor materials of a zincblende-structure and wurtzite-structure. For example, formed on a semiconductor substrate having a crystal face of (100) of the zincblende structure is a semiconductor material of the wurtzite-structure in its bulk state as a film of the same zincblende-structure as the semiconductor substrate.
Abstract: A semiconductor light-emitting device containing as first and second semiconductor layers a semiconductor of Cd.sub.x Zn.sub.1-x S.sub.y Se.sub.1-y (0<x.ltoreq.1, 0.ltoreq.y.ltoreq.1) and as an active layer a semiconductor of Cd.sub.x Zn.sub.1-x S.sub.y Se.sub.1-y (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) formed between the first and second semiconductor layers, if necessary sandwiching the active layer with a pair of light guiding layers, can emit a blue laser light excellent in properties and high in reliability.
Abstract: A vertical diamond field effect transistor includes a nondiamond substrate, preferably a heavily doped silicon substrate, having a diamond layer on one face thereof, a source contact on the diamond layer, a gate contact on the diamond layer adjacent the source contact, and a drain contact on the back face of the substrate. The diamond layer is preferably a single layer of large polycrystalline diamond grains, having a heavily doped region adjacent the silicon substrate. The gate and source contacts may extend across many polycrystalline diamond grains in the single layer of polycrystalline diamond grains. Alternatively, the source and gate contacts may be narrower than the average grain size of the polycrystalline diamond grains. Interdigitated source and gate fingers, narrower than the average polycrystalline diamond grain size, may also be provided. The single layer of polycrystalline grains may be formed on the silicon substrate.
Abstract: A double heterojunction bipolar transistor includes diamond as the semiconductor material for the collector and emitter, while silicon carbide provides the base. Accordingly, the diamond is readily and reproducibly p-doped, and the silicon carbide may be fabricated by a solid state reaction to form an n-type intrinsic semiconductor. The base is preferably not so thick as to greatly increase transit time, yet sufficiently thick to prevent tunneling. In one embodiment single crystal diamond and single crystal silicon carbide are used in direct contact with each other. In another embodiment of the transistor, polycrystalline diamond is used, and a layer of insulating diamond is positioned between each face of the silicon carbide layer and the diamond layers. A method for fabricating the transistor includes depositing silicon on the diamond and annealing same so as to produce silicon carbide by a solid state reaction. The silicon carbide so produced is intrinsically n-type.
Abstract: High concentration polysilicon is grown on the silicon carbide so as to effect the connection through the polysilicon, thereby to obtain a better wiring construction in the connection between silicon carbide conductor basic plate and wiring.
Abstract: A complementary semiconductor device incorporating semiconductor composed of diamond. Substantially, diamond is insulative. When both III group elementary atoms and V group elementary atoms are doped into diamond, the doped regions respectively turn into p-type and n-type semiconductors. The embodiment discretely dopes both III group elementary atoms and V group elementary atoms into a layer of diamond thin film to eventually form a complementary semiconductor device. The embodiment forms wiring system inside of the diamond thin film by selectively doping either III group elementary atoms or V group elementary atoms therein without forming wiring system only on the inter-layer insulation film.
Abstract: An oxide superconducting device has a junction structure composed of at least one oxide superconductor and at least one insulator in which carriers have been generated. As the insulator in which carriers have been generated, there can be used, for example, SrTiO.sub.3 doped with Nb. With such a device, rectifying characteristics can be attained in the junction.
Abstract: There are provided silicon carbide light emitting diodes having a p-n junction which is constituted by a p-type silicon carbide single-crystal layer and an n-type silicon carbide single-crystal layer formed thereon. In cases where light emission caused by recombination of free excitons is substantially utilized, at least a part of the n-type silicon carbide layer adjacent to the interface of the p-n junction is doped with a donor impurity at a concentration of 5.times.10.sup.16 cm.sup.-3 or lower. In cases where light emission caused by acceptor-associated recombination is substantially utilized, the p-type silicon carbide layer is doped with an acceptor impurity and at least a part of the n-type silicon carbide layer adjacent to the interface of the p-n junction is doped with a donor impurity at a concentration of 1.times.10.sup.18 cm.sup.-3 or higher. Also provided are a method for producing such silicon carbide light emitting diodes and a method for producting another silicon carbide light emitting diode.
Abstract: A silicon carbide field-effect transistor is disclosed which includes an MOS structure composed successively of a silicon carbide layer, a gate insulator film, and a gate electrode. The field-effect transistor has source and drain regions formed in the silicon carbide layer, between which the MOS structure is disposed, wherein at least one of the source and drain regions is formed by the use of a Schottky contact on the silicon carbide layer.
Abstract: A new type of semiconductor material is disclosed which consists of a .beta.-SiC:metal carbide alloy having the general formula Si.sub.w (metal 1).sub.x (metal 2).sub.y (metal 3).sub.z C, where w+x+y+z=1 and 1>w>0. The metals are selected from the group consisting of Ti, Hf, Zr, V, Ta, Mo, W and Nb, with Ti, Hf, and Zr preferred. By selecting appropriate proportions of metal carbide and SiC, the alloy's bandgap may be tailored to any desired level between the bandgaps of the metal carbide and SiC. Semiconductor devices are preferably formed by epitaxially growing a layer of the new alloy upon a substrate having a .beta.-SiC or TiC type crystal structure. In addition to retaining the benefits of single-bandgap .beta.-SiC with certain advantages, the new alloys make it possible to implement various electrical devices that cannot be achieved with .beta.-SiC, and also have a potential for bandfolded superlattices for infrared detectors and lasers.
Abstract: A high electron mobility transistor is disclosed, which takes advantage of the increased mobility due to a two dimensional electron gas occurring in GaN/Al.sub.x Ga.sub.1-x N heterojunctions. These structures are deposited on basal plane sapphire using low pressure metalorganic chemical vapor deposition. The electron mobility of the heterojunction is aproximately 620 cm.sup.2 per volt second at room temperature as compared to 56 cm.sup.2 per volt second at 180.degree. K. and decreased to 19 cm.sup.2 per volt second at 77.degree. K. The mobility for the heterostructure, however, increased to a value of 1,600 cm.sup.2 per volt second at 77.degree. K. and saturated at 4.degree. K.
Type:
Grant
Filed:
May 17, 1991
Date of Patent:
March 9, 1993
Assignee:
APA Optics, Inc.
Inventors:
Muhammed A. Khan, James M. VanHove, Jon N. Kuznia, Donald T. Olson
Abstract: The present invention provides a P-N-P diamond transistor and a method of manufacture thereof. The transistor comprises a diamond substrate having two p-type semiconducting regions separated by an insulating region with an n-type semi-conducting layer established by chemical vapour deposition. Preferably the p-type regions are obtained by doping with boron and controlling the concentration of nitrogen impurities by the use of nitrogen getters. The n-type layer preferably contains phosphorus.
Abstract: A method and apparatus for contructing diamond semiconductor structures made of polycrystalline diamond thin films is disclosed. The use of a polycrystalline diamond deposition on a substrate material provides an advantage that any substrate material may be used and the ability to use polycrystalline diamond as a material is brought about through the use of an undoped diamond layer acting as an insulating layer which is formed on a boron-doped layer. Because of the structure, ion implantation can be employed to reduce the ohmic contact resistance. The ion implantation also provides that the entire structure can be made using a deep implant to form a channel layer which allows the insulating gate structure to be formed as an integral part of the device. The buried channel can be doped through the use of several implantation steps through the insulating undoped layer.
Type:
Grant
Filed:
January 28, 1991
Date of Patent:
December 22, 1992
Assignee:
Kobe Steel USA Inc., Electronic Materials Center
Inventors:
David L. Dreifus, Kumar Das, Koichi Miyata, Koji Kobashi