Abstract: An electronic assembly including: a wafer defining at least one cavity; a chip disposed in the cavity; and a metal heat spreader disposed in the cavity, the chip being embedded in the metal heat spreader; wherein the metal heat spreader has at least one elongate microstructure separated from a remainder of the metal heat spreader by at least one channel; wherein the metal heat spreader occupies an area within the cavity that is not occupied by the chip; and wherein the at least one elongate microstructure is configured and arranged in the cavity so as to improve thermal management of the chip by reducing stress across the chip as compared with a configuration and arrangement in which a heat spreader made of the metal and occupying the area within the cavity is a solid without channels. Also, a method for forming the electronic assembly.

Abstract: Solid state switching device including: a pair of line terminals including first and second line terminals for electrical connection with a corresponding phase conductor of an electric line; a switching assembly including one or more solid state power switches, the switching assembly having a first and second power terminals electrically connected with the first and second lines terminals, respectively; a heat sink element in thermal coupling with the switching assembly to adsorb heat from the switching assembly; an additional heat extraction arrangement to extract heat from the switching assembly and convey at least a portion of the adsorbed heat along the phase conductor through the first and second line terminals.

Abstract: A self-powered electronic system comprises a first chip of single-crystalline semiconductor embedded in a second chip of single-crystalline semiconductor shaped as a container bordered by ridges. The assembled chips are nested and form an electronic device assembled, in turn, in a slab of weakly p-doped low-grade silicon shaped as a container bordered by ridges. The flat side of the slab includes a heavily n-doped region forming a pn-junction with the p-type bulk. A metal-filled deep silicon via through the p-type ridge connects the n-region with the terminal on the ridge surface as cathode of the photovoltaic cell with the p-region as anode. The voltage across the pn-junction serves as power source of the device.

Abstract: A control device for a gearbox control system of a motor vehicle includes electric components having different high dissipated power, a rigid circuit board which is equipped on both sides with electric components, at least one cooling body on the same side as the circuit board on which the power components are arranged, and a potting compound, which at least partially surrounds the components. The circuit board is secured directly adjacent to the cooling body.

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a semiconductor chip, a guard ring, a gel layer, and a first lead frame. The guard ring is disposed on the semiconductor chip, and the gel layer is disposed on the guard ring. The first lead frame is electrically connected to the semiconductor chip, and the gel layer is located between the guard ring and the first lead frame.

Abstract: A system for packaging integrated circuits includes an integrated circuit having one or more integrated circuit terminals. The system for packaging integrated circuits also includes a substrate having one or more substrate terminals. The system for packaging integrated circuits further includes an electrically conductive adhesive in communication with the integrated circuit terminals and the substrate terminals. The electrically conductive adhesive establishes an electrical connection between each of the one or more integrated circuit terminals and the one or more substrate terminals. The electrical connection between each of the one or more integrated circuit terminals and the one or more substrate terminals are enclosed in a dielectric. The system for packaging integrated circuits includes a second adhesive in communication with the integrated circuit and the substrate, wherein the second adhesive couples the integrated circuit and substrate together.

Abstract: The invention relates to a control module (4) for an electric appliance (3), comprising: a printed circuit board (11), on which electrical and electronic components (12) are mounted; and an electronic power component (10) separated from the printed circuit board (11) and held in relation thereto by means of at least one electrical connection body (18a, 18b, 18c) fixed to the printed circuit board (11) and connected to one (D) of the terminals (S, D, G) of the electronic power component (10).

Abstract: Some embodiments relate to an electronic package. The electronic package includes a first die and a second die stacked onto the first die. A first encapsulant is positioned between the first die and the second die. The first encapsulant includes a first material that covers a first volume between the first die and the second die. A second encapsulant is positioned between the first die and the second die. The second encapsulant includes a second material that covers a second volume between the first die and the second die. The first material has a higher thermal conductivity than the second material, and the second material more effectively promotes electrical connections between the first die and the second die as compared to the first material.

Abstract: A semiconductor device includes a conductive plate having a front surface on which a semiconductor element is mounted and a sealing resin sealing therein at least the front surface of the conductive plate. The conductive plate includes a structure that traps bubbles in a region where flows of the injected sealing resin merge. The conductive plate has a rectangular shape. The sealing resin is injected from a single inlet on a first longitudinal side of the conductive plate. The region where the flows of the sealing resin merge is a region of a corner of a second longitudinal side that across the semiconductor element, opposes the first longitudinal side from which the sealing resin is injected.

Abstract: A package structure includes a first carrier plate, a second carrier plate, a pin group and an encapsulant member. A power component is disposed on a first top surface of the first carrier plate. The second carrier plate is disposed on the first top surface of the first carrier plate. A driving circuit is disposed on a second top surface of the second carrier plate for driving the power component. An opening runs through the second carrier plate, and the power component is accommodated within the opening. The pin group is assembled on the first carrier plate and/or the second carrier plate. The encapsulant member encapsulates the first carrier plate, the second carrier plate, a part of the first pin group and a part of the second pin group, so that the first pin group and the second pin group are partially exposed outside the encapsulant member.

Abstract: Described examples include a device including a semiconductor die having a first surface with bond pads and an opposite second surface attached to a substrate by an adhesive layer covering at least a portion of the surface area of the second surface. The adhesive layer includes first zones composed of a first polymeric compound and adding up to a first portion of the surface area, and second zones composed of a second polymeric compound and adding up to a second portion of the surface area, the first zones and the second zones being contiguous. The first polymeric compound has a first modulus and the second polymeric compound has a second modulus greater than the first modulus.

Abstract: The present disclosure provides a heat spreader and a power module. The heat spreader comprises: a base plate comprising a first surface and a second surface opposite to the first surface; an insulating frame fixedly connected to the first surface of the base plate; and an insulating material attached to at least a part of a surface of the insulating frame. The present disclosure can effectively satisfy design requirements for both heat dissipation and insulation, and significantly increase a layout space for a printed circuit board.

Abstract: Provided are heat radiation sheet and method of manufacturing the same.

Abstract: Provided is a flexible light emitting semiconductor device (26), such as an LED device, that includes a flexible dielectric layer (12) having first and second major surfaces and at least one via (10) extending through the dielectric layer from the first to the second major surface, with a conductive layer (19, 20, 18) on each of the first and second major surfaces and in the via. The conductive layer (18) in the via supports a light emitting semiconductor device (26) and is electrically isolated from the conductive layer (19) on the first major surface of the dielectric layer.

Abstract: A self-powered electronic system comprises a first chip (401) of single-crystalline semiconductor embedded in a second chip (302) of single-crystalline semiconductor shaped as a container bordered by ridges. The assembled chips are nested and form an electronic device assembled, in turn, in a slab of weakly p-doped low-grade silicon shaped as a container (330) bordered by ridges (331). The flat side (335) of the slab includes a heavily n-doped region (314) forming a pn-junction (315) with the p-type bulk. A metal-filled deep silicon via (350) through the p-type ridge (331) connects the n-region with the terminal (322) on the ridge surface as cathode of the photovoltaic cell with the p-region as anode. The voltage across the pn-junction serves as power source of the device.

Abstract: An electronic component module includes a board having an electronic component mounted on a surface of the board and a shield case mounted on the surface of the board and covering the electronic component. The board includes a projecting part projecting from the surface of the board. The projecting part is formed of plating at a position along a sidewall of the shield case and is soldered to the shield case.

Abstract: Methods are disclosed including generating a substrate surface topography that includes a mounting portion that is higher than a relief portion that defines a perimeter of the mounting portion.

Abstract: An ultrasonic transducer structure, an ultrasonic transducer, and a method of manufacturing the ultrasonic transducer are provided. The ultrasonic transducer structure includes a driving wafer that includes a driving circuit; and an ultrasonic transducer wafer that is disposed on the driving wafer and includes a first wafer in which a via-hole is formed, a first insulating layer formed on the first wafer, a second wafer spaced apart from the first insulating layer, and a cavity formed between the first insulating layer and the second wafer.

Abstract: A semiconductor package that includes a conductive can, a power semiconductor device electrically and mechanically attached to the inside surface of the can, and an IC semiconductor device copackaged with the power semiconductor device inside the can.

Abstract: A semiconductor module arrangement includes a semiconductor module having a top side, an underside opposite the top side, and a plurality of electrical connection contacts formed at the top side. The semiconductor module arrangement additionally includes a printed circuit board, a heat sink having a mounting side, and one or a plurality of fixing elements for fixing the printed circuit board to the heat sink. Either a multiplicity of projections are formed at the underside of the semiconductor module and a multiplicity of receiving regions for receiving the projections are formed at the mounting side of the heat sink, or a multiplicity of projections are formed at the mounting side of the heat sink and a multiplicity of receiving regions for receiving the projections are formed at the underside of the semiconductor module. In any case, each of the projections extends into one of the receiving regions.

Abstract: The invention relates to a component and a method for producing said component. The component comprises a substrate (S), a chip (CH), a frame (MF), which is connected to the substrate (S) and on which the chip (CH) bears. A metallic closure layer (ML) encompasses the frame (MF), the substrate (S) and the chip (CH) such that a volume enclosed by the substrate (S), the chip (CH) and the frame (MF) is hermetically sealed.

Abstract: An integrated circuit package is presented. In an embodiment, the integrated circuit package has a package substrate, an integrated circuit die attached to the package substrate, and a package level heat dissipation device, such as an integrated heat spreader, attached to the package substrate encapsulating the integrated circuit die. The package level heat dissipation device has a top side with a ridge formed on top of a perimeter of the top side, and a bottom side that couples to the integrated circuit die.

Abstract: Power wafer level chip scale package (CSP) and process of manufacture are enclosed. The power wafer level chip scale package includes all source, gate and drain electrodes located on one side of the device, which is convenient for mounting to a printed circuit board (PCB) with solder paste.

Abstract: A packaged power semiconductor device is provided with voltage isolation between a metal backside and terminals of the device. The packaged power semiconductor device is arranged in an encapsulant defining a hole for receiving a structure for physically coupling the device to an object. A direct-bonded copper (“DBC”) substrate is used to provide electrical isolation and improved thermal transfer from the device to a heatsink. At least one power semiconductor die is mounted to a first metal layer of the DBC substrate. The first metal layer spreads heat generated by the semiconductor die. In one embodiment, the packaged power semiconductor device conforms to a TO-247 outline and is capable of receiving a screw for physically coupling the device to a heatsink.

Abstract: An integrated heat spreader is disclosed in which grooves are formed in a recess of the heat spreader to enhance the stiffness and strength of the integrated heat spreader without increasing production costs or complexity. The integrated heat spreader may be fabricated by providing a metal strip having raised portions thereon to provide a recess therebetween, forming grooves on a bottom surface of the recess, where the grooves extend along a periphery of the bottom surface which is substantially free of the raised portions, and subsequently singulating an integrated heat spreader from the metal strip.

Abstract: A laminate leadless carrier package having a semiconductor chip mounted at the edge of a recess region in a substrate supporting the chip, the substrate having a plurality of conductive and dielectric layers, a wire bond coupled to the optoelectronic chip and a wire bond pad positioned on the top surface of the substrate. An encapsulation covers the laser chip, the wire bond, and at least a portion of the top surface of the substrate including the recess region. The encapsulation is an optically transparent molding compound. The package is arranged to be mounted as a side-looker and/or a top-looker.

Abstract: To suppress the reduction in reliability of a resin-sealed semiconductor device. A first cap (member) and a second cap (member) with a cavity (space formation portion) are superimposed and bonded together to form a sealed space. A semiconductor including a sensor chip (semiconductor chip) and wires inside the space is manufactured in the following way. In a sealing step of sealing a joint part between the caps, a sealing member is formed of resin such that an entirety of an upper surface of the second cap and an entirety of a lower surface of the first cap are respectively exposed. Thus, in the sealing step, the pressure acting in the direction of crushing the second cap can be decreased.

Abstract: In a testing method for an LD, an LD die is held. Then, electric current increasing with a fixed increment and having a sequence of current values is supplied to the LD die to drive the LD die to emit light and a sequence of voltage values across the LD die and corresponding to the sequence of current values, respectively, is metered. A sequence of power values corresponding to the sequence of current values, respectively, is also metered. Next, an electro-optical property of the LD die is determined according to the sequence of current values, the sequence of voltage values, and the sequence of power values. Finally, if the LD die is determined to be qualified based upon the electro-optical property of the LD die, the LD die is packaged into the LD.

Abstract: A semiconductor device includes a structure in which a semiconductor element (chip) is mounted in a cavity formed in a wiring board with an adhesive interposed between the chip and a bottom surface of the cavity, and electrode terminals of the chip are connected via wires to wiring portions formed on the board around the cavity. The chip is mounted in close contact with a side wall of the cavity, the side wall being near a region where a wiring for higher frequency compared with other wirings within the wiring portion is formed. A recessed portion is provided in a region of the bottom surface of the cavity, and a thermal via extending from the bottom surface of the recessed to the outside of the board is provided, the region being near a portion where the chip is in close contact.

Abstract: A method for producing a number of chip cards includes a step for preparing a supporting film comprising a number of locations each of which constituting a card support and being provided with a cavity capable of receiving an integrated circuit, a step for processing this supporting film carried out, in part, by a multi-head tool, one of the heads of this tool being provided for carrying out an operation on a location of the film essentially at the same time as another head of this tool carries out the same operation on another location of this film, and a step for separating the locations after the processing step.

Abstract: A semiconductor device including a metal frame having a penetrating opening; a semiconductor chip provided in the opening; an insulating layer provided on the upper surface of the metal frame such that the insulating layer covers the upper surface, which is the circuit-formed surface of the semiconductor chip; an interconnect layer provided only on the upper-surface side of the metal frame with intervention of the insulating material and electrically connected to a circuit of the semiconductor chip; a via conductor provided on the upper surface of said semiconductor chip to electrically connect the circuit of the semiconductor chip and the interconnect layer; and a resin layer provided on the lower surface of the metal frame.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace, a substrate and an adhesive. The heat spreader includes a post and a base. The conductive trace includes a pad, a terminal, a conductive pattern and first and second vias. The substrate includes the conductive pattern and a dielectric layer. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The post extends upwardly from the base into an opening in the adhesive and an aperture in the substrate, and the base extends laterally from the post. The conductive trace provides signal routing between the pad and the terminal using the conductive pattern and the vias.

Abstract: A packaged power semiconductor device is provided with voltage isolation between a metal backside and terminals of the device. The packaged power semiconductor device is arranged in an encapsulant defining a hole for receiving a structure for physically coupling the device to an object. A direct-bonded copper (“DBC”) substrate is used to provide electrical isolation and improved thermal transfer from the device to a heatsink. At least one power semiconductor die is mounted to a first metal layer of the DBC substrate. The first metal layer spreads heat generated by the semiconductor die. In one embodiment, the packaged power semiconductor device conforms to a TO-247 outline and is capable of receiving a screw for physically coupling the device to a heatsink.

Abstract: Provided is an electronic device whereby it is possible to suppress a decline in heat-dissipating properties. This liquid crystal display device (electronic device) (1) is provided with a semiconductor element (6a, 6b), a substrate (7) to which the semiconductor element is attached, and a chassis (5) disposed in opposition to the substrate and furnished with a rib (11, 12) that protrudes towards the semiconductor element side. The rib includes a contact part (11a, 12a) for contacting the semiconductor element. A pressing member (9) for inducing the semiconductor element into contact with the contact part is furnished at least at a position corresponding to the center part (7c) of the substrate.

Abstract: A light emission device package including a substrate, an opening portion on the substrate, a heat radiation frame on the opening portion, the heat radiation frame protruding from the substrate, a light emission device chip on the heat radiation frame, and a sealant member on the light emission device chip.

Abstract: To provide a semiconductor equipment having high heat-transfer effect and breakdown voltage, and a method of manufacturing the same. The semiconductor equipment includes: a sealed container; a stem connected to the sealed container via a stem peripheral portion; and a semiconductor chip mounted on a top surface of the stem, inside the sealed container. The semiconductor chip is electrically connected to a lead provided to the stem, the stem peripheral portion, which is of a material that is different from the material of stem and the same as the material of the sealed container, is bonded along a periphery of the stem, and the sealed container is filled with a working fluid including at least one of ethanol, a perfluorocarbon, and a fluoroether.

Abstract: An electronic component mounting configuration in which an electronic component chip having a plurality of protrusion-shaped electrodes distributed on its entire mounting surface is mounted through protrusion-shaped electrodes on a printed circuit board is provided which is capable of improving reliability of an electronic component by relieving thermal stress. The solder bumps are arranged so that intervals between solder bumps adjacent to one another become smaller from a central portion of a mounting surface of the electronic component chip toward the peripheral portion thereof. For example, an interval between the solder bump “1A” arranged in the central portion of the semiconductor chip and the solder bump “1B” arranged in an outer side thereof, adjacent to each other, is set to a pitch of P1.

Abstract: Disclosed herein are a heat-radiating substrate and a method of manufacturing the same. The heat-radiating substrate includes: a core layer including a core metal layer and a core insulating layer formed on the core metal layer and divided into a first region and a second region; a circuit layer formed in the first region of the core layer; a build-up layer formed in the second region of the core layer and including a build-up insulating layer and a build-up circuit layer; an adhesive layer formed between the second region of the core layer and the build-up layer; and an impregnation device mounted on the build-up layer to be impregnated into the adhesive layer. A heat generating element is mounted on the circuit layer and a thermally weakened element is mounted on the build-up layer, thereby preventing the thermally weakened element from being damaged by heat of the heat generating element.

Abstract: A method of making a semiconductor chip assembly includes providing a post and a base, mounting an adhesive on the base including inserting the post into an opening in the adhesive, mounting a conductive layer on the adhesive including aligning the post with an aperture in the conductive layer, then flowing the adhesive upward between the post and the conductive layer, solidifying the adhesive, then providing a conductive trace that includes a pad, a terminal, a plated through-hole and a selected portion of the conductive layer, mounting a semiconductor device on the post, wherein a heat spreader includes the post and the base, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and first and second adhesives. The heat spreader includes a first post, a second post and a base. The conductive trace includes a pad and a terminal. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The first post extends from the base in a first vertical direction into a first opening in the first adhesive, the second post extends from the base in a second vertical direction into a second opening in the second adhesive and the base is sandwiched between and extends laterally from the posts. The conductive trace provides signal routing between the pad and the terminal.

Abstract: A method of making a semiconductor chip assembly includes providing a bump and a ledge, wherein the bump includes first, second and third bent corners that shape a cavity, mounting an adhesive on the ledge including inserting the bump into an opening in the adhesive, mounting a conductive layer on the adhesive including aligning the bump with an aperture in the conductive layer, then flowing the adhesive between the bump and the conductive layer, solidifying the adhesive, then providing a conductive trace that includes a pad, a terminal and a selected portion of the ledge, providing a heat spreader that includes the bump, then mounting a semiconductor device on the bump within the cavity, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Abstract: According to an embodiment of a method of manufacturing a power transistor module, the method includes mechanically fastening a first terminal, a second terminal and at least two different DC bias terminals to an electrically conductive flange; connecting the flange to a source of a power transistor device; electrically connecting the first terminal to a gate of the power transistor device; electrically connecting the second terminal to a drain of the power transistor device; mechanically fastening a bus bar to the flange which extends between and connects the DC bias terminals; and electrically connecting the bus bar to the drain via one or more RF grounded connections.

Abstract: A semiconductor device has: a radiator plate that is maintained at a predetermined potential; an SOI (Silicon On Insulator) chip mounted on the radiator plate; and thermal grease applied to an interface between the radiator plate and the SOI chip. The SOI chip has: a first silicon substrate forming a circuit element part; a second silicon substrate facing the radiator plate; and an insulating film formed between the first silicon substrate and the second silicon substrate. The first silicon substrate and the second silicon substrate are electrically connected to each other. The thermal grease is conductive and electrically connects the second silicon substrate and the radiator plate.

Abstract: A method of making a semiconductor chip assembly includes providing first and second posts, first and second adhesives and a base, wherein the first post extends from the base in a first vertical direction into a first opening in the first adhesive, the second post extends from the base in a second vertical direction into a second opening in the second adhesive and the base is sandwiched between and extends laterally from the posts, then flowing the first adhesive in the first vertical direction and the second adhesive in the second vertical direction, solidifying the adhesives, then providing a conductive trace that includes a pad and a terminal, wherein the pad extends beyond the base in the first vertical direction and the terminal extends beyond the base in the second vertical direction, providing a heat spreader that includes the posts and the base, then mounting a semiconductor device on the first post, electrically connecting the semiconductor device to the conductive trace and thermally connecting the

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The heat spreader includes a post, a base and a ceramic block. The post extends upwardly from the base into an opening in the adhesive, the base extends laterally from the post and the ceramic block is embedded in the post. The semiconductor device overlaps the ceramic block, is electrically connected to the conductive trace and is thermally connected to the ceramic block. The adhesive extends between the post and the conductive trace and between the base and the conductive trace. The conductive trace provides signal routing between a pad and a terminal.

Abstract: A method of making a semiconductor chip assembly includes providing first and second posts, first and second adhesives and a base, wherein the first post extends from the base in a first vertical direction into a first opening in the first adhesive and is located within a periphery of the second post, the second post extends from the base in a second vertical direction into a second opening in the second adhesive and the base is sandwiched between and extends laterally from the posts, then flowing and solidifying the adhesives, then providing a conductive trace that includes a pad and a terminal, wherein the pad extends beyond the base in the first vertical direction and the terminal extends beyond the base in the second vertical direction, providing a heat spreader that includes the posts and the base, then mounting a semiconductor device on the first post, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The heat spreader includes a base. A cavity extends through the adhesive into the base. The semiconductor device extends into the cavity, is electrically connected to the conductive trace and is thermally connected to the heat spreader. The adhesive extends between the cavity and the conductive trace and between the base and the conductive trace. The conductive trace is located outside the cavity and provides signal routing between a pad and a terminal.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The heat spreader includes a post and a base. The semiconductor device extends into a cavity in the post, is electrically connected to the conductive trace and is thermally connected to the heat spreader. The post extends upwardly from the base into an opening in the adhesive, and the base extends laterally from the post. The adhesive extends between the post and the conductive trace and between the base and the conductive trace. The conductive trace is located outside the cavity and provides signal routing between a pad and a terminal.

Abstract: According to an aspect of the invention, an electronic part includes a substrate having a first planar surface, a first bump affixed to the first planar surface of the substrate, a second bump affixed to the first planar surface of the substrate a predetermined distance from the first bump, a MEMS chip including a element, the MEMS chip coupled to the first bump and the second bump, the MEMS chip distanced from the first planar surface, an adhesive region bonding with the first bump, the substrate and the MEMS chip.

Abstract: A composite multi-layer substrate comprising a flat plate-like core member formed of a material having an excellent electric conductivity, an excellent heat conductivity, and a high rigidity, a front resin layer and a rear resin layer covering at least the front and rear surfaces of the core member, and a bottomless hole formed in the core member through the front and rear sides of the core member, wherein an electronic component is installed in the bottomless hole, whereby since the strength of the composite multi-layer substrate can be assured by the rigidity of the core member, conventional prior art glass cloth can be eliminated, deterioration in the electric characteristics caused by ion migration can be avoided and will result in reduced production cost.