With Raised Portion Of Base For Mounting Semiconductor Chip Patents (Class 257/711)
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Patent number: 6122170Abstract: A ceramic base plate of aluminum nitride ceramics, for example, as a power module board has a metal layer on a surface of the ceramic base plate at a fixing portion at which the ceramic base plate is fixed onto a heat radiating plate. Further, a metal film is provided entirely on the rear surface of the ceramic base plate. An IGBT chip or the like is fixed onto the ceramic base plate with a conductive layer interposed therebetween, to form a power module board. Therefore, it is possible to avoid the generation of cracks when the ceramic base plate is mechanically fixed onto the heat radiating plate without using solder, and heat radiation from the ceramic base plate to the heat radiating plate can be improved.Type: GrantFiled: June 29, 1999Date of Patent: September 19, 2000Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yoshiyuki Hirose, Kazutaka Sasaki, Mitsuru Shimazu, Hirohiko Nakata
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Patent number: 6111315Abstract: A semiconductor package includes a stiffener strip (10) having a die pad (18) and a body portion (12). A first surface (4) of the die pad (18) is offset from a second surface (3) of the body portion (12) a predetermined amount. The stiffener strip (10) includes an internal edge (27) concentrically disposed about the die pad (18) and tie straps (16) connecting the internal edge (27) to the die pad (18). A die (28) is affixed to the first surface (4) of the die pad (18). A substrate (20) has a first surface (17) and a second surface (19), with the second surface (19) being affixed to the first surface (2) of the body portion (12). The substrate (20) includes a window (22) and conductive elements (24). A plastic molding material (33) encompasses the die (28), at least a portion of the stiffener strip (10), and at least a portion of the substrate (20).Type: GrantFiled: December 19, 1997Date of Patent: August 29, 2000Assignee: Texas Instruments IncorporatedInventors: William P. Stearns, Hall E. Jarman, Nozar Hassanzadeh
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Patent number: 6091133Abstract: A semiconductor integrated circuit device, and method of manufacturing the same, having a conventional-type lead frame with the die paddle removed. In particular, the die paddle is replaced with a section of tape that is supported by the ends of the lead fingers. The semiconductor die is attached to the tape so that it may be wire bonded to the lead fingers. The tape contains at least one slot to allow for expansion and/or contraction of the tape due to various temperatures experienced during the manufacturing process so that the tape does not wrinkle or warp to alter the position of the die.Type: GrantFiled: March 11, 1998Date of Patent: July 18, 2000Inventors: David J. Corisis, Larry D. Kinsman, Jerry M. Brooks
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Patent number: 6058023Abstract: An electronic component operating at high voltage is mounted to the top side of an insulating platform, which in turn is supported from a chassis by a pedestal. The insulating platform provides a long surface path conduction distance of the electronic component to the chassis and to other components mounted to the chassis. The platform-mounted electronic component is thereby insulated against arcing and damaging the other components.Type: GrantFiled: November 6, 1998Date of Patent: May 2, 2000Assignee: Hughes Electronics CorporationInventors: James J. Ahn, John F. Stickelmaier
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Patent number: 6031283Abstract: An integrated circuit package which contains an integrated circuit. The internal integrated circuit is coupled to external lands located on a first outer surface of the package by a plurality of vias. The vias extend through the package from the first outer surface to an opposite second outer surface. The package has a plurality of devices such as capacitors that are mounted to the second outer surface. Some of the vias are connected to a whole group of external lands. Grouping the lands to a single via reduces the number of vias on the second surface of the package. The reduction in vias allows additional capacitors to be mounted to the second surface of the package.Type: GrantFiled: September 9, 1996Date of Patent: February 29, 2000Assignee: Intel CorporationInventors: Koushik Banerjee, Robert J. Chroneos, Jr., Tom Mozdzen
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Patent number: 6020050Abstract: A semiconductor chip has a membrane mounted on supports that are held in the material of the chip so that the membrane is supported at a space from the chip. The membrane may be a metal layer. The supports are columns or webs that extend into the chip material. Electrical connections to the membrane may be made by conductive supports.Type: GrantFiled: October 10, 1997Date of Patent: February 1, 2000Assignee: Siemens AktiengesellschaftInventors: Ulrich Naher, Adrian Berthold, Thomas Scheiter, Christofer Hierold
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Patent number: 5990554Abstract: A heatsink having isolated bonding pads formed on the heatsink eliminates breaking of the wire bond, lifting of the wire bond to the heatsink, and die attach material contamination of the bond. In one embodiment, the isolated bonding pad has an elevated pedestal configuration. In a second embodiment, the isolated bonding pad has an elevated pedestal configuration, so that the pedestal is also configured to lock a mold compound around the pedestal. In a third embodiment, the isolated bonding pad has an island configuration. In a fourth embodiment, the island configuration is configured to lock the mold compound formed around the island. The locking mechanism of the elevated pedestal or island prevents delamination of the mold compound to heatsink interface, preventing lifting or breaking of a wire bonded to the isolated bonding pad.Type: GrantFiled: April 23, 1993Date of Patent: November 23, 1999Assignee: Motorola, Inc.Inventors: Theodore R. Golubic, Timothy L. Olson
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Patent number: 5901042Abstract: A semiconductor chip is mounted on the central portion of a metal heat radiator. A pair of metal projecting members are provided on the heat radiator externally of the pair of opposed sides of the semiconductor chip to extend therealong beyond both ends of the semiconductor chip. A circuit board is mounted on the side of each of the pair of projecting members opposed to the semiconductor chip. The top surface of the semiconductor chip and the top surface of each of the projecting members are connected to each other by a third bonding wire for grounding.Type: GrantFiled: April 20, 1998Date of Patent: May 4, 1999Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yorito Ota, Masahiro Maeda, Shigeru Morimoto, Morio Nakamura
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Patent number: 5877551Abstract: A semiconductor package is provided that has a rigid metal substrate and a dielectric layer covering a first portion of the rigid metal substrate, with a second portion of the rigid metal substrate being substantially free of the dielectric layer. A semiconductor device is electrically bonded to the second portion of the rigid metal substrate and metal circuit traces defining electrical paths are formed on the dielectric layer, at least one of which contacts the rigid metal substrate through at least one via in the dielectric layer. Additionally, a method is provided for grounding a semiconductor device and at least one circuit trace on a rigid metal substrate substantially covered by a dielectric layer, which includes creating at least one via in the dielectric layer using a laser and creating circuit traces on the dielectric layer, at least one of which contacts the rigid metal substrate through at least one of the vias.Type: GrantFiled: November 18, 1996Date of Patent: March 2, 1999Assignee: Olin CorporationInventors: Salvador A. Tostado, George A. Brathwaite, Paul R. Hoffman, George A. Erfe, Serafin P. Pedron, Jr., Michael A. Raftery, Kambhampati Ramakrishna, German J. Ramirez, Linda E. Strauman
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Patent number: 5872395Abstract: A heat spreader to be molded into an encapsulated IC package in contact with a die attach pad carrying an IC die is adapted to be placed in a substantially rectangular mold cavity and to retain its position in the cavity while encapsulation material is injected. The heat spreader has a body portion with appendages extending toward each of the four walls, and the ends of the appendages furthest from the body are formed downward such as by bending to provide a support for the spreader from the bottom surface of the mold cavity substantially at the lines where the sidewalls meet the bottom surface of the mold cavity. In a preferred embodiment there are two appendages toward each sidewall, and the heat spreader before and during the molding process is supported from the bottom surface of the mold cavity by dimples through the body, forming additional supports.Type: GrantFiled: September 16, 1996Date of Patent: February 16, 1999Assignee: International Packaging and Assembly CorporationInventor: George Fujimoto
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Patent number: 5869886Abstract: A semiconductor chip is flip chip bonded on a substrate wherein the semiconductor chip has a first surface on which bumps are provided. An insulating sealing resin is provided in a space defined between the semiconductor chip and the substrate and also around the semiconductor chip. An electrically conductive resin is provided which extends over a least a part of a second surface of the semiconductor chip, a part of the sealing resin and a ground pattern provided over the substrate.Type: GrantFiled: March 24, 1997Date of Patent: February 9, 1999Assignee: NEC CorporationInventor: Kenichi Tokuno
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Patent number: 5812381Abstract: A lead frame includes a base member having a device hole for accommodating a semiconductor chip therein, a plurality of inner lead portions extended outward from respective sides of the device hole, outer lead portions electrically connected to the inner lead portions, respectively, an adhesion area to which the inner lead portions formed on the base member are adhered, and a plurality of dummy leads disposed on a portion of the adhesion area where a density of the inner lead portions is low.Type: GrantFiled: August 8, 1996Date of Patent: September 22, 1998Assignee: Sony CorporationInventors: Hiroyuki Shigeta, Mutsumi Nagano
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Patent number: 5801923Abstract: A multichip module is attached to a printed wire circuit board using three conductive mounting feet that are vapor phase soldered to conductive feet on the module's substrate and to conductive feet on the printed wiring circuit board that are connected to a ground plane on the board.Type: GrantFiled: March 14, 1997Date of Patent: September 1, 1998Assignee: Honeywell Inc.Inventor: Randolph G. Nichols
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Patent number: 5764484Abstract: There is provided a component for an electronic package and a method for the manufacture of that component. The component has a metallic substrate with a surface coated by a dielectric. A centrally disposed cavity extends through the dielectric into the metallic substrate to a depth, D.sub.1. Circumscribing and abutting this cavity is an annular channel having a depth D.sub.2 that is less than D.sub.1. A semiconductor device bonded to the base of the cavity is electrically interconnected to both circuit traces formed on the dielectric coating and to the annular channel.A method of forming the annular channel is to mechanically mill a precursor annular channel having an outer wall a desired distance from the sidewalls of the metallic substrate and a width substantially greater than the desired width of the annular channel. A cavity is then formed in the region circumscribed by the outer wall of the precursor annular channel.Type: GrantFiled: November 15, 1996Date of Patent: June 9, 1998Assignee: Olin CorporationInventors: Paul R. Hoffman, Markus K. Liebhard
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Patent number: 5754402Abstract: A power amplifying module has at least one heat spreader mounted on a package substrate and exposed through a through hole provided in a wiring substrate, and at least one semiconductor chip forming a power amplifying circuit is mounted in a bare chip state on a surface of the at least one heat spreader as electrically connected to an electronic circuit pattern on the wiring substrate. Each of the package substrate and at least one heat spreader is made of a material having a thermal conductivity larger than that of a material making the wiring substrate. The module thus formed can emit the heat generated by the power amplifying module to the outside at high efficiency, thus achieving the power amplifying module with high performance and high reliability.Type: GrantFiled: June 21, 1996Date of Patent: May 19, 1998Assignee: Sumitomo Electric Industries, Ltd.Inventors: Ken-ichiro Matsuzaki, Gaku Ishii, Kenji Otobe, Tatsuya Hashinaga
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Patent number: 5729049Abstract: A semiconductor integrated circuit device, and method of manufacturing the same, having a conventional-type lead frame with the die paddle removed. In particular, the die paddle is replaced with a section of tape that is supported by the ends of the lead fingers. The semiconductor die is attached to the tape so that it may be wire bonded to the lead fingers. The tape contains at least one slot to allow for expansion and/or contraction of the tape due to various temperatures experienced during the manufacturing process so that the tape does not wrinkle or warp to alter the position of the die.Type: GrantFiled: March 19, 1996Date of Patent: March 17, 1998Assignee: Micron Technology, Inc.Inventors: David J. Corisis, Larry D. Kinsman, Jerry M. Brooks
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Patent number: 5717252Abstract: A semiconductor device which remains highly reliable and is easy to mount even when a bonding pad pitch is reduced. The semiconductor device is featured in that a thermally conductive support substrate in which a semiconductor chip is fixed to a recessed portion is mounted on the reverse side of an insulating tape, that is, a TAB substrate having a conductor pattern on the surface; and solder balls are placed on the front side of the insulating tape to ensure connection to the conductor pattern on the front side through holes.Type: GrantFiled: December 2, 1996Date of Patent: February 10, 1998Assignee: Mitsui High-tec, Inc.Inventors: Takashi Nakashima, Atsushi Fukui, Keiji Takai, Koji Tateishi
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Patent number: 5661338Abstract: A chip mounting plate construction of lead frames for semiconductor packages which provides a chip mounting plate having a greatly reduced area to obtain a small bonding area between the chip mounting plate and a semiconductor chip mounted on the chip mounting plate, thereby capable of minimizing thermal strain generated at the chip mounting plate due to a thermal expansion thereof. The chip mounting plate is constructed to have a smaller area than the semiconductor chip, to have a central opening, or to have recesses.Type: GrantFiled: December 12, 1995Date of Patent: August 26, 1997Assignees: Anam Industrial Co., Ltd., Amkor Electronics, Inc.Inventors: Youn Cheol Yoo, Hee Yeoul Yoo, Jeong Lee, Doo Hyun Park, In Gyu Han
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Patent number: 5629566Abstract: A semiconductor device includes a semiconductor chip which is connected to a circuit substrate via solder bumps by flip-chip connection, a first encapsulant having a large Young's modulus and filling a space between the semiconductor chip and the circuit substrate in the central portion of the semiconductor chip, and a second encapsulant having a small Young's modulus and filling a space between the semiconductor chip and the circuit substrate in the peripheral portion of the semiconductor chip. A method for manufacturing the semiconductor device includes flowing the second encapsulant into position, but not the first encapsulant.Type: GrantFiled: August 7, 1995Date of Patent: May 13, 1997Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhide Doi, Masayuki Miura, Takashi Okada, Naohiko Hirano, Yoichi Hiruta
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Patent number: 5602720Abstract: A structure for mounting a semiconductor device includes a ceramic plate having a thermal conductivity equal to or higher than 120 W/mK on one surface of which the semiconductor device is mounted, a heat sink joined to another surface of the ceramic plate formed of a copper or copper based alloy plate having a thermal conductivity equal to or higher than 300 W/mK, and a base member formed of a metal or an alloy having a thermal conductivity equal to or higher than 100 W/mK on which the heat sink is mounted.Type: GrantFiled: June 23, 1994Date of Patent: February 11, 1997Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masuhiro Natsuhara, Harutoshi Ukegawa
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Patent number: 5422513Abstract: A high density interconnect (HDI) structure having a dielectric multi-layer interconnect structure on a substrate is fabricated by forming a chip well, placing a chip in the well, and connecting the chip to the interconnect structure. Additionally, temperature sensitive chips or devices may be located beneath the dielectric multi-layer interconnect structure. A spacer die may be located in the substrate while the interconnect structure is fabricated and removed after a chip well aligned with the spacer die is formed, in order to accommodate a chip thickness which is greater than the dielectric multi-layer interconnect structure thickness.Type: GrantFiled: October 4, 1993Date of Patent: June 6, 1995Assignee: Martin Marietta CorporationInventors: Walter M. Marcinkiewicz, Raymond A. Fillion, Barry S. Whitmore, Robert J. Wojnarowski
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Patent number: 5398160Abstract: In a power module having at least one power device chip and circuits for driving and controlling the power device chip which are incorporated within one and the same package, a heat spreader which is constituted by a material having a heat dissipation property and supports the power device chip on its upper surface is inserted into an opening formed in a control substrate having an upper surface on which patterns for forming the chip driving and controlling circuits and a connection pattern for connection with the power device chip are printed, and the control substrate and the heat spreader inserted into the opening are fixedly supported on a base substrate. Thus, the power device chip and the control substrate can be disposed in plane and reduced in size.Type: GrantFiled: October 18, 1993Date of Patent: March 14, 1995Assignee: Fujitsu General LimitedInventor: Osamu Umeda
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Patent number: 5388027Abstract: An electronic circuit assembly with improved heatsinking is provided. The assembly includes a component carrying board (56) which has an opening (62) through it. The opening is sized to receive a heat generating electronic component (64). A diamond layer (50) is attached as a heat sink to the bottom (58) of the component carrying board. The heat generating component (64) is attached directly to the diamond layer (50), through the opening (62) in the component carrying board (56). The diamond layer provides electrical insulation as well as superior heat dissipation.Type: GrantFiled: July 29, 1993Date of Patent: February 7, 1995Assignee: Motorola, Inc.Inventors: Randy L. Pollock, George F. Anderson, Jr.
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Patent number: 5343076Abstract: This invention relates to a package construction of a semiconductor device, and provides a semiconductor device in which a vapor-impermeable moistureproof plate is embedded in a bottom surface of a hollow package or an inner surface wallthicknesswise therefrom to provide an excellent moisture-proofness in terms of the package construction.Type: GrantFiled: November 22, 1993Date of Patent: August 30, 1994Assignee: Mitsui Petrochemical Industries, Ltd.Inventors: Shigeru Katayama, Kaoru Tominaga, Junichi Yoshitake
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Patent number: 5315155Abstract: There is provided an electronic package assembly having a leadframe and buffer bonded to a metallic base. To reduce the stress generated by the coefficient of thermal expansion mismatch, the buffer is mounted on a pedestal. The cross sectional area of the pedestal is less than that of the buffer, such that the at least a portion of the buffer overhangs the pedestal.Type: GrantFiled: July 13, 1992Date of Patent: May 24, 1994Assignee: Olin CorporationInventors: Brian E. O'Donnelly, Brian Mravic, Jacob Crane, Deepak Mahulikar
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Patent number: 5258646Abstract: A microwave IC package comprises a base (1) and a plurality of cavities (2a) and (2b) for mounting IC chips (5a) and (5b), the cavities (2a) and (2b) being formed on the base (1). Also provided on the base (1) are terminals (4a), (4b), (8a), (8b) and (8c) which are connected to said IC chips by wire bonding. The cavities (2a) and (2b) are separated from each other by a grounded conductor (3A). Due to the separation, isolation between the input and the output of the IC package is improved.Type: GrantFiled: October 22, 1991Date of Patent: November 2, 1993Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Takayuki Katoh
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Patent number: 5245216Abstract: A plastic-molded type semiconductor device according to the present invention has two islands, on which semiconductor elements are mounted. An insulating circuit board is formed so as to extend over the two islands. On the insulating circuit board, wires are formed. Resin is molded so as to cover the two islands and insulating circuit board. The insulating circuit board overlaps the two islands only at its edges, so that there exists no island just below the insulating circuit board. This reduces the island area and makes it harder for resin cracks to occur, compared with a conventional equivalent.Type: GrantFiled: January 8, 1993Date of Patent: September 14, 1993Assignee: Kabushiki Kaisha ToshibaInventor: Shigeki Sako
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Patent number: 5188985Abstract: A surface mount package for encapsulating an electronic device is provided. The package has a ceramic frame containing a plurality of apertures. Copper-tungsten composite metallic components are bonded to the ceramic frame and individually extend across each of the apertures. The metallic components may include a flange for bonding and a pedestal extending into each aperture.Type: GrantFiled: April 21, 1992Date of Patent: February 23, 1993Assignee: Aegis, Inc.Inventors: Manuel Medeiros, III, Jay S. Greenspan