Abstract: Low temperature thin film transistors and micro light-emitting diode displays having low temperature thin film transistors are described. In an example, an integrated circuit structure includes a gate electrode on an insulator structure. A channel material layer is over the gate electrode and extends beyond a first side and a second side of the gate electrode. The channel material layer includes a crystalline Group III-P material. A first conductive contact is on a portion of the channel material layer extending beyond the first side of the gate electrode. A second conductive contact is on a portion of the channel material layer extending beyond the second side of the gate electrode.

Abstract: The present disclosure provides an array substrate, which includes a first signal line and a second signal line arranged on a substrate as different layers that are insulating and spaced apart from each other, wherein one end of the first signal line includes a first conductive section, one end of the second signal line includes a second conductive section, the first conductive section and the second conductive section are electrically connected through a connecting structure, and wherein orthographic projections of an area where the first conductive section is located and an area where the second conductive section is located overlap at least partially. The array substrate can reduce the possibility of occurrence of circuit break between signal lines and improve the effect of connection between different signal lines.

Abstract: The present disclosure relates to a display substrate, a display device, and a method for manufacturing a display substrate. The display substrate having a display area and a non-display area, includes: a common electrode layer located in the non-display area; a common electrode line located in the non-display area; and a plurality of bar-shape via holes located in the non-display area; wherein the plurality of bar-shape via holes extend in a direction away from the display area, and the common electrode layer is electrically connected to the common electrode line through the plurality of bar-shape via holes.

Abstract: A display device comprising: a first pixel row including a first pixel electrode and a second pixel electrode arranged in a first direction; a second pixel row including a third pixel electrode and a fourth pixel electrode arranged in the first direction; a third pixel row including a fifth pixel electrode and a sixth pixel electrode arranged in the first direction; a first source line and a second source line extending in the second direction between the first pixel electrode and the second pixel electrode; a first gate line extending in the first direction between the first pixel row and the second pixel row; a second gate line extending in the first direction between the second pixel row and the third pixel row; and a gate lead line extending in the second direction and connected to the first gate line and the second gate line.

Abstract: The present invention prevents the shaving of an alignment film caused by a columnar spacer in a liquid crystal display device of an IPS method using photo-alignment. A plinth higher than a pixel electrode is formed at a part where a columnar spacer formed over a counter substrate touches a TFT substrate. When an alignment film of a double-layered structure is applied over the pixel electrode and the plinth, the thickness of the alignment film over the plinth reduces by a leveling effect. When photo-alignment is applied in the state, a photodegraded upper alignment film over the plinth disappears and a lower alignment film having a high mechanical strength remains. As a result, it is possible to prevent the shaving of the alignment film.

Abstract: There is provided a display device. The display device includes a first data line on a first interlayer insulating layer over a substrate, a first power line and a second power line on a second interlayer insulating layer, the second interlayer insulating layer covering the first data line, and a plurality of pixels. A first pixel among the plurality of pixels includes a display element including a pixel electrode, an opposite electrode, and an intermediate layer between the pixel electrode and the opposite electrode, the second power line being connected to the opposite electrode, and a driving thin film transistor between the substrate and the display element and including a driving semiconductor layer, a driving gate electrode, a driving source electrode, and a driving drain electrode, the first interlayer insulating layer covering the driving gate electrode, and the first power line being connected to the driving source electrode.

Abstract: An array substrate, a fabrication method thereof, and a display device are provided. The fabrication method includes forming a first conductive layer and a second conductive layer on both of a first area and a second area of a substrate; forming a bonding pin in the first area to electrically connect with a driving chip, wherein the second conductive layer is located at a side of the first conductive layer away from the substrate; and removing the second conductive layer in the second area, forming a conductive electrode in the second area to electrically connect with a light-emitting element by a connection member.

Abstract: A thin-film transistor (TFT) array substrate including: a first conductive layer selected from an active layer, a gate electrode, a source electrode, and a drain electrode of a TFT; a second conductive layer in a layer different from the first conductive layer; and a connection node coupling the first conductive layer to the second conductive layer. Here, the TFT array has a node contact hole formed by: a first contact hole in the first conductive layer; and a second contact hole in the second conductive layer, the second contact hole being integral with the first contact hole and not being separated from the first contact hole by an insulating layer, and at least a portion of the connection node is in the node contact hole.

Abstract: A thin film transistor, an array substrate, a display panel and a display device are provided, which is related to the field of display technologies. A thin film transistor comprises: a substrate; at least two active layers on the substrate, each active layer comprising a first terminal and a second terminal opposite to each other; a source and a drain above the substrate. The first terminal of each of the at least two active layers is electrically connected to the source, and the second terminal of each of the at least two active layers is electrically connected to the drain, and the at least two active layers are arranged on an upper surface of the substrate and separated from one another.

Abstract: An array substrate and a display device are provided in embodiments of the present disclosure. The array substrate includes a base substrate, a buffer layer, an active layer, a gate insulating layer, a gate electrode, an interlayer insulating layer, a source-drain electrode electrically conductive layer, a passivation layer, and a first light shielding layer. The first light shielding layer is disposed on a side of the passivation layer facing away from the interlayer insulating layer. An orthographic projection of the first light shielding layer on the base substrate at least partially overlaps with an orthographic projection of the active layer on the base substrate, and the first light shielding layer is formed by a photoresist material.

Abstract: Disclosed are a display panel and a display device, and the display panel includes a substrate, a thin ink film, and a protecting film stacked over each other, where an orthographical projection of the thin ink film onto the substrate covers an orthographical projection of the protecting film onto the substrate, an edge of the thin ink film is coated sealing glue.

Abstract: An electronic apparatus according to a variety of embodiments of the present invention may comprise: a display panel comprising a display which comprises one or more first pixels, one or more second pixels, and one or more first wires connected to the one or more first pixels and second pixels, and one or more fingerprint sensors which are disposed between the one or more first pixels and one or more second pixels; and a wiring layer comprising one or more second wires connected to the one or more fingerprint sensors by wiring between the layers, A variety of other embodiments are possible.

Abstract: A display device is disclosed, and the display device includes a substrate including first to third display regions, the second and the third display regions being spaced from each other, each of the second and third display regions having an area smaller than that of the first display region and being continuous to the first display region, first to third pixels in the first to third display regions, first to third lines connected to the first to third pixels, and a dummy part configured to compensate for a difference between a load value of the first lines and load values of the second and third lines, wherein the second display region includes a first sub-region adjacent to the first display region and a second sub-region spaced from the first display region, and the third display region includes a third sub-region adjacent to the first display region and a fourth sub-region spaced from the first display region.

Abstract: A display apparatus includes a base substrate, a thin film transistor disposed on the base substrate and including an active pattern, a gate electrode, a source electrode, and a drain electrode, an inorganic insulating layer disposed between the active pattern and the gate electrode, a first organic insulating layer disposed on the thin film transistor, a second organic insulating layer disposed on the first organic insulating layer, and an insulating layer disposed between the first organic insulating layer and the second organic insulating layer and in direct contact with the first organic insulating layer and the second organic insulating layer.

Abstract: Disclosed is a device for recording information on a magnetic data storage medium which comprises a magnetic field source designed to be capable of generating a magnetic field in the region where the magnetic data storage medium is arranged; a source of electromagnetic radiation at a matrix of controllable mirrors; and a matrix of controllable mirrors mounted in a housing so as to be capable of reflecting electromagnetic radiation by means of the controllable mirrors into the region where the magnetic data storage medium is arranged and/or in another direction. The present invention makes it possible to record information on a fixed magnetic data storage medium.

Abstract: The present application discloses a thin film transistor. The thin film transistor includes a base substrate; an active layer; an etch stop layer on a side of the active layer distal to the base substrate; and a source electrode and a drain electrode on a side of the etch stop layer distal to the active layer. The active layer includes a channel region, a source electrode contact region, and a drain electrode contact region. An orthographic projection of the etch stop layer on the base substrate surrounds an orthographic projection of the drain electrode contact region on the base substrate. An orthographic projection of the source electrode contact region on the base substrate at least partially peripherally surrounding the orthographic projection of the etch stop layer on the base substrate.

Abstract: The present disclosure discloses an array substrate, a manufacturing method thereof, a display substrate, and a display device, belonging to the technical field of display. The array substrate includes: a flexible base, and, a TFT and a connecting line which are on a side of the flexible base. The array substrate has a display area and a lead area. The TFT is in the display area. The connecting line is in the lead area. The connecting line is used to electrically connect the TFT to a drive circuit. A manufacturing material of the connecting line includes a flexible conductive material. Since the material forming the connecting line includes a flexible conductive material, and the flexible conductive material has electrical conductivity and is not easily broken, the breaking probability of the connecting line is reduced, and the yield of the display device is effectively improved.

Abstract: A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle ?1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle ?2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.

Abstract: The present disclosure provides a thin film transistor, a display substrate, a method for preparing the same, and a display device including the display substrate. The method for preparing the thin film transistor includes: forming an inorganic insulating film layer in contact with an electrode of the thin film transistor by a plasma enhanced chemical vapor deposition process at power of 9 kW to 25 kW, at a temperature of 190° C. to 380° C. and by using a mixture of gases N2, NH3 and SiH4 in a volume ratio of N2:NH3:SiH4=(10˜20):(5˜10):(1˜2), such that a stress value of the inorganic insulating film layer is reduced to be less than or equal to a threshold, and the inorganic insulating layer comprises silicon nitride.

Abstract: An array substrate and a fabrication method thereof, and an electronic apparatus are disclosed. The array substrate includes a base substrate, a thin film transistor, a first connection electrode and a first insulation layer. The thin film transistor is on the base substrate and including a first electrode and a second electrode; the first connection electrode in a layer different from the first electrode and electrically connected with the first electrode; and the first insulation layer covering at least a portion of the first connection electrode; an area of an orthographic projection of the first connection electrode on the base substrate is larger than an area of an orthographic projection of the first electrode on the base substrate, and the first insulation layer is made from an organic insulation material.

Abstract: A substrate for an electronic device includes an insulating layer; a via extending into the insulating layer; a light shielding layer in the via; and a thin film transistor comprising an active layer on the light shielding layer and in the via. The light shielding layer is configured to shield light from irradiating on the active layer.

Abstract: A display device includes a substrate; a plurality of light-emitting elements on the substrate; and a plurality of pixel circuits on the substrate, being configured to control the plurality of light-emitting elements in one-to-one correspondence. Each of the plurality of pixel circuits includes a thin film transistor. The thin film transistor includes a channel. The plurality of pixel circuits are disposed at different positions in a scanning direction of a pulse laser beam for annealing the channels. At least channels for light-emitting elements of the same color out of the channels are disposed at the same phase of irradiation cycles of the pulse laser beam in the scanning direction.

Abstract: Disclosed are an array substrate and a method for manufacturing the same, a display panel, and a display device. The array substrate includes: a base substrate; a TFT array layer provided on the base substrate, wherein the TFT array layer includes a plurality of driver transistors arranged in an array; a color resist layer provided on a side of the TFT array layer distal to the base substrate, wherein the color resist layer includes a plurality of color resist patterns independent from each other, a first opening is formed between adjacent ones of the color resist patterns, and an orthogonal projection of the first opening onto the base substrate at least partially overlaps with an orthogonal projection of an output electrode in a respective one of the driver transistors onto the base substrate; and pixel electrodes provided on a side of the color resist layer distal to the base substrate.

Abstract: The present application discloses an array substrate, a display apparatus and a method of fabricating an array substrate. The array substrate has a plurality of first bottom-gate type thin film transistors each of which including a metal oxide active layer and a plurality of second bottom-gate type thin film transistors each of which including a silicon active layer.

Abstract: A fabrication method of a thin film transistor is provided. The fabrication method includes: forming a gate electrode, an active layer, a drain electrode and a source electrode on the base substrate, in which the active layer includes a channel region and a second portion on both sides of the channel region, and at least a portion of the channel region is overlapped with the gate electrode; and performing a laser annealing process on a side of the base substrate by using a laser, in which the channel region is shielded without being irradiated by the laser, a resistivity of the second portion of the active layer is lower than a resistivity of the channel region, and the second portion of the active layer is connected with the source electrode and the drain electrode. A thin film transistor, an array substrate and a display device are further provided.

Abstract: Disclosed is a manufacturing method of a rigid organic light-emitting diode (OLED) display panel and a display panel. The method comprises steps of providing a first substrate having a first glass substrate and a flexible film; coating an organic compound on the first glass substrate; providing a second substrate; packaging the display area; and cutting and stripping a part of the first glass substrate at the non-display area of the packaged display panel, thereby improving the screen accounting of the display area in the rigid OLED display panel.

Abstract: A pixel electrode is formed from a transparent conducting film. A gate insulating layer includes a region including a portion of a thin-film transistor that makes contact with a semiconductor layer and a thinned region. The pixel electrode is disposed over a part of the thinned region. A dielectric layer is in direct contact with another part of the thinned region. An upper surface of the gate insulating layer has a stepped portion. The stepped portion includes a stepped portion that extends flush with a side surface of a lower layer of a drain electrode. The pixel electrode extends over at least a part of the stepped portion and at least a part of the side surface of the lower layer of the drain electrode from above the thinned region and is connected to an upper layer of the drain electrode.

Abstract: The display device includes a substrate, a display region arranged on the substrate and including a plurality of pixels, a first wiring provided on the substrate, an insulating layer overlapping a portion of the first wiring, an oxide conductive layer provided on the first wiring and electrically connected to the first wiring, a sealing layer overlapping the display region and at least an end of the oxide conductive layer and sealing the plurality of pixels, a sensor electrode provided on the sealing layer and overlapping the display region, and a second wiring passing over the at least end of the oxide conductive layer provided with the sealing layer and electrically connecting the sensor electrode and the oxide conductive layer.

Abstract: The preset disclosure discloses a display substrate and a display device. The display substrate includes a signal line. The display substrate further includes: a discharge-limiting component, and an orthographic projection of the discharge-limiting component on the base substrate of the display substrate and an orthographic projection of the signal line on the base substrate at least partially overlap.

Abstract: A pixel circuit, a method for driving a pixel circuit and a display panel are provided. An exemplary pixel circuit includes a data writing module and a driving transistor, a voltage of a first terminal of the driving transistor being greater than a voltage of a second terminal; a light-emitting control module and a light-emitting device, the light-emitting device being configured to emit light in response to the driving current generated by the driving transistor; a first initialization module and a second initialization module; and a reset module configured to cause the voltage of the second terminal of the driving transistor to be greater than or equal to the voltage of the first terminal of the driving transistor in response to a current-stage reset signal, an enable signal of the current-stage reset signal appearing after an enable signal of the current-stage light-emitting signal.

Abstract: An embodiment of the present inventive concept provides a liquid crystal display, including: a first gate line; a first data line crossing the first gate line; a first transistor including a gate electrode connected to the first gate line, a source electrode connected to the first data line, and a drain electrode; a first connecting line connected to the drain electrode; a first contact portion connected to the first connecting line; and a first pixel electrode connected to the first contact portion, wherein the first pixel electrode may be disposed between the first transistor and the first contact portion.

Abstract: A display device includes: a pixel circuit disposed on a base layer; an insulating layer disposed on the base layer covering the pixel circuit; a first electrode disposed on the insulating layer; a second electrode disposed on the insulating layer, the second electrode being spaced apart from the first electrode in a first direction; a light-emitting element disposed between the first electrode and the second electrode; a connection electrode connecting the first electrode and the light-emitting element and connecting the second electrode and the light-emitting element; a first auxiliary insulating layer disposed on the light-emitting element; and a second auxiliary insulating layer disposed on the first auxiliary insulating layer. The second auxiliary insulating layer includes a first insulating portion overlapped with the first auxiliary insulating layer, and a second insulating portion disposed outwardly from the first insulating portion and not overlapping the first auxiliary insulating layer.

Abstract: Techniques are disclosed for facilitating multiple microbolometer selection for simultaneous readout. In one example, a device includes a plurality of microbolometers. The plurality of microbolometers includes a first set and a second set of serially-connected microbolometers. The device further includes a first plurality of switches configured to selectively short the plurality of microbolometers. The device further includes a second plurality of switches configured to selectively couple the plurality of microbolometers to ground. The device further includes a third plurality of switches configured to selectively provide a bias signal to the plurality of microbolometers. The device further includes a processing circuit configured to configure the first plurality, second plurality, and third plurality of switches to cause simultaneous read out of one microbolometer of the first set and one microbolometer of the second set. Related methods and systems are also provided.

Abstract: The present application discloses an array substrate, a display panel and a display device. The array substrate comprises: a plurality of data lines and a plurality of gate lines, a plurality of pixel units defined by the plurality of data lines and the plurality of gate lines, each pixel unit comprising a first pixel electrode, a second pixel electrode, and at least three thin film transistors, the pixel unit further comprising: a charge-discharge element, the charge-discharge element and a third thin film transistor in the at least three thin film transistors charging and discharging the pixel unit such that the pixel unit forms a first voltage region and a second voltage region with different voltages.

Abstract: Provided is a manufacturing method of a thin film capacitor comprising a capacitance portion in which at least one dielectric layer is sandwiched between a pair of electrode layers included in a plurality of electrode layers, the manufacturing method including a lamination process of alternately laminating the plurality of electrode layers and a dielectric film and forming a laminated body which will be the capacitance portion, a first etching process of forming an opening extending in a laminating direction with respect to the laminated body and exposing the dielectric film laminated directly on one of the plurality of electrode layers on a bottom surface of the opening, and a second etching process of exposing the one electrode layer at the bottom surface of the opening. In the second etching process, an etching rate of the one electrode layer is lower than an etching rate of the dielectric film.

Abstract: A display device includes a substrate; a plurality of pixels on the substrate; a drive circuit on the substrate; a first terminal and a second terminal connected to the pixels or the drive circuit and arranged on the substrate; a first wiring having a first end part connected with the first terminal, and a second end part located on an end part of the substrate; a second wiring having a third end part connected with the second terminal, and a fourth end part located on an end part of the substrate; a first current blocking unit blocking a current flowing in a direction from the second end part to the first end part of the first wiring; and a second current blocking unit blocking a current flowing in a direction from the fourth end part to the third end part of the second wiring.

Abstract: A display device may include a thin film transistor disposed on a substrate, and a display element electrically connected to the thin film transistor. The thin film transistor may include an active pattern including polycrystalline silicon, a gate insulation layer disposed on the active pattern, and a gate electrode disposed on the gate insulation layer. An average value of grain sizes of the active pattern may be in a range of about 400 nm to about 800 nm. An RMS value of a surface roughness of the active pattern may be about 4 nm or less. A method of manufacturing a polycrystalline silicon layer may include cleaning an amorphous silicon layer with hydrofluoric acid, rinsing the amorphous silicon layer with hydrogenated deionized water, and irradiating the amorphous silicon layer with a laser beam having an energy density of about 440 mJ/cm2 to about 490 mJ/cm2.

Abstract: A display device includes a flexible substrate, a buffer layer on the flexible substrate and including an inorganic material, a display area including a plurality of pixels on the buffer layer and each including a pixel circuit including a first thin film transistor (TFT), a second TFT, and a storage capacitor and a display device connected to the pixel circuit, and a non-display area that is adjacent to the display area. The flexible substrate includes at least one base layer, at least one inorganic barrier layer, and a shielding layer including a portion having a certain area and an opening adjacent to the portion.

Abstract: The present invention provides a display panel including a plurality of sub-pixels. Each of the sub-pixels includes a main region and a sub-region. Each of the sub-pixels includes pixel electrodes disposed in the main region and the sub-region. Each of the pixel electrodes includes a backbone portion and a plurality of branch portions connected to the backbone portion. One of the sub-pixels in each of the pixel units includes a shared electrode and a light shielding layer. The shared electrode extends from the main region of the one of the sub-pixels to the sub-region of the one of the sub-pixels. The light-shielding layer is disposed in the main region and the sub-region of the one of the sub-pixels.

Abstract: A transistor array panel is manufactured by a method that reduces or obviates the need for highly selective etching agents or complex processes requiring multiple photomasks to create contact holes. The panel includes: a substrate; a buffer layer positioned on the substrate; a semiconductor layer positioned on the buffer layer; an intermediate insulating layer positioned on the semiconductor layer; and an upper conductive layer positioned on the intermediate insulating layer, wherein the semiconductor layer includes a first contact hole, the intermediate insulating layer includes a second contact hole positioned in an overlapping relationship with the first contact hole, and the upper conductive layer is in contact with a side surface of the semiconductor layer in the first contact hole.

Abstract: A semiconductor device inspection apparatus includes: a light sensor that detects light from a semiconductor device as a DUT to which an electric signal has been input; an optical system that guides light from the semiconductor device to the light sensor; and a control device electrically connected to the light sensor. The control device includes: a data reading unit that reads mask data indicating a mask layout of the semiconductor device; a search unit that searches for a position of a transistor in the semiconductor device on the basis of polygon data of a gate layer of the semiconductor device included in the mask data; a setting unit that sets the searched position of the transistor as an optical measurement target position; and a measurement unit that performs optical measurement for the set optical measurement target position to acquire a measurement result.

Abstract: A thin film transistor and its manufacturing method, a display panel, and a display device are provided. The thin film transistor includes an insulating layer on an active layer; the insulating layer includes m sub-insulating layers which are alternately stacked, and any two adjacent sub-insulating layers in the m sub-insulating layers have different refractive indexes, and m is an integer not less than 2.

Abstract: A liquid crystal display (LCD) panel is provided and includes: a plurality of data lines, a plurality of scan lines, and a plurality of pixel units formed from the data lines and the scan lines. Each of the pixel units is formed from three sub-pixel units. Each of the sub-pixel units has half of a star-shaped structure or half of a square doughnut-shaped structure. A plurality of first light-shielding electrodes and a plurality of second light-shielding electrodes are parallelly arranged on the data lines in an array manner, are respectively connected to a high potential and a low potential, and are alternately disposed.

Abstract: An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes a base substrate and a thin film transistor on the base substrate; a light shielding layer is disposed between the thin film transistor and the base substrate, and the light shielding layer includes a light shielding metal layer and a light reflection adjusting layer which are stacked on the base substrate, the light reflection adjusting layer covers the light shielding metal layer, and a reflectance of the light reflection adjusting layer is lower than a reflectance of the light shielding metal layer.

Abstract: A fabricating method of an array substrate includes: forming a first semiconductor pattern and a first insulating layer on a substrate; forming a first gate pattern and a second gate pattern isolated from each other; forming a second insulating layer; forming a second semiconductor pattern; forming a first metal pattern and a second metal pattern and a third metal pattern respectively lap-jointed with the second semiconductor pattern; forming a third insulating layer; and forming a first via hole, a second via hole, first source and drain electrodes, and second source and drain electrodes, where the first source and drain electrode are respectively connected to the first semiconductor pattern through the first via hole, and the second source and drain electrodes are respectively connected to the second semiconductor pattern through the second via hole.

Abstract: An array substrate, a method of manufacturing the same, and a display panel are provided. The method includes: providing a base substrate including a display area and a wiring area at a periphery of the display area; in the process of forming a connection electrode in the wiring area, remaining a first photoresist layer for performing the patterning process and covering the connection electrode; depositing a film of reflective pixel electrode layer on the base substrate and performing a patterning process on the film of reflective pixel electrode layer to form a reflective pixel electrode layer in the display area and to remove the film of reflective pixel electrode layer in the wiring area to expose the first photoresist layer; removing a second photoresist layer for patterning the thin film of reflective pixel electrode layer on the reflective pixel electrode layer with the first photoresist layer in the wiring area.

Abstract: The present disclosure relates to an array substrate, a method for manufacturing the same, a display panel, and a display device. The array substrate includes: a gate metal layer, disposed on the substrate and the gate metal layer including a grounding wire located in the peripheral region; a gate insulating layer, at least covering the gate metal layer; and a conductive layer structure, disposed over the gate insulating layer and including an auxiliary grounding wire located in the peripheral region, wherein the auxiliary grounding wire is connected to the grounding wire. The present disclosure can prevent ESD more effectively.

Abstract: An array substrate, a display panel including the same, and a display device are provided. The array substrate includes: a base substrate and a planarization layer on the base substrate. A first conductive layer is disposed on a side of the planarization layer away from the base substrate. A first passivation layer is disposed on a side of the first conductive layer and the side of the planarization layer not being covered by the first conductive layer, away from the base substrate, and provided with a plurality of stress release openings. An insulating layer is disposed in the stress release openings and on a side of the first passivation layer away from the planarization layer. A second conductive layer is disposed on a side of the insulating layer away from the planarization layer.

Abstract: Provided is a light transmissive-type liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer, wherein the first substrate includes a base member, a wiring, a switching element, a pixel electrode, and a first insulator having translucency, the first insulator overlapping in the plan view with the wiring and being arranged between the base member and the pixel electrode, a second insulator having translucency, the second insulator overlapping in the plan view with the pixel electrode and being arranged between the base member and the pixel electrode to be in contact with the first insulator, the second insulator having a refractive index higher than a refractive index of the first insulator, and a light-shielding body provided along an outer periphery of a surface of the second insulator on the base member side, the light-shielding body being arranged in contact with the second insulator.

Abstract: A display device is disclosed. In one aspect, the display device includes a substrate including a display area, the display area including a plurality of pixels configured to display an image and a pad area adjacent to the pad area and configured to transfer electrical signals. At least a portion of the pad area is bendable. The display device also includes an insulating layer formed over the substrate and including a bending groove in the pad area. The bending groove includes a sidewall. A plurality of peripheral wires is formed over the insulating layer, and a cutoff portion is connected to the sidewall and disposed between adjacent peripheral wires.