Abstract: Various embodiments of solid state transducer (“SST”) devices are disclosed. In several embodiments, a light emitter device includes a metal-oxide-semiconductor (MOS) capacitor, an active region operably coupled to the MOS capacitor, and a bulk semiconductor material operably coupled to the active region. The active region can include at least one quantum well configured to store first charge carriers under a first bias. The bulk semiconductor material is arranged to provide second charge carriers to the active region under the second bias such that the active region emits UV light.

Abstract: A light-emitting device includes a semiconductor diode structure with one or more light-emitting active layers, an anti-reflection coating on its front surface, and a redirection layer on its back surface. Active-layer output light propagates within the diode structure. The anti-reflection coating on the front surface increases transmission of active-layer output light incident below the critical angle ?C. Active-layer output light incident on the redirection layer at an incidence angle greater than ?C is redirected to propagate toward the front surface at an incidence angle that is less than ?C. Device output light is transmitted by the front surface to propagate in an ambient medium, and includes first and second portions of the active-layer output light incident on the front surface at an incidence angle less than ?C, the first portion without redirection by the redirection layer and the second portion with redirection by the redirection layer.

Abstract: A light-emitting diode includes a semiconductor light-emitting stack, a transparent conductive layer, a first current blocking layer, and a first electrode pad. The transparent conductive layer is disposed on the semiconductor light-emitting stack, and is formed with a first opening defined by an inner edge thereof. The first current blocking layer is formed on the semiconductor light-emitting stack, and is surrounded by and spaced apart from the inner edge of the transparent conductive layer by a first gap. The first electrode pad fully covers the first current blocking layer so as to permit the first electrode pad to be in contact with the semiconductor light-emitting stack through the first gap.

Abstract: This disclosure relates to an array substrate and a display device. The array substrate includes a display area and a lead area, the display area including a plurality of signal lines, and the lead area including fanout lines connected with the signal lines, wherein the lead area further includes capacitance adjustment sections non-electrically connected with at least one of the fanout lines, the capacitance adjustment sections are at a layer different from a layer where at least one of the fanout lines is.

Abstract: An ethylene-sensitive sensor is described that includes a power source; an ethylene-sensitive semiconductor component electrically connected to the power source, the semiconducting component comprising a semiconducting organic compound; an input electrode electrically connected to the semiconductor component; and an output electrode electrically connected to the semiconductor component. The semiconductor material is at least partially exposed such that it can be contacted by a vapor. Methods of using the ethylene-sensitive sensor to detect ethylenic compounds are also described.

Abstract: In various embodiments, a method is provided. The method includes forming a metallization layer above at least one first region of a substrate. After forming the metallization layer at least one second region of the substrate is free of the metallization layer. The method further includes forming a barrier layer above the at least one first region of the substrate and above the at least one second region of the substrate. The barrier layer in the at least one first region of the substrate directly adjoins the metallization layer. The method further includes removing the barrier layer in the at least one first region of the substrate by drive-in of the barrier layer into the metallization layer.

Abstract: A silicon carbide device includes at least one power electrode on a surface thereof, a solderable contract formed on the power electrode, and at least one passivation layer that surrounds the solderable contact but is spaced from the solderable contract, thereby forming a gap.

Abstract: According to the method for manufacturing an array substrate of the present disclosure, when two non-adjacent conductive layers are electrically connected to each other through the via-holes, the insulating layers between the adjacent conductive layers may be etched by several etching processes so as to form the corresponding via-holes in the insulating layer, thereby to achieve the electrical connection between the non-adjacent conductive layers. Meanwhile, it is also able to achieve the electrical connection between the adjacent conductive layers through the via-holes in each etching process. In other words, when at least three conductive layers are electrically connected with each other through the via-holes, merely the insulating layer between the adjacent conductive layers is etched in each etching process.

Abstract: An optoelectronic semiconductor chip includes a semiconductor body and a carrier, on which the semiconductor body is arranged. The semiconductor body has a semiconductor layer sequence with an active region provided for generating or receiving radiation, a first semiconductor layer and a second semiconductor layer. The active region is arranged between the first semiconductor layer and the second semiconductor layer. The first semiconductor layer is arranged on the side of the active region facing away from the carrier. A trench structure extends through the second semiconductor layer and the active region into the first semiconductor layer. An electrical contact structure with a plurality of contact strips is formed between the carrier and the semiconductor body. The contact strips in the trench structure are connected in an electrically conductive manner to the first semiconductor layer.

Abstract: A polymer light emitting element having a large light releasing surface, a high light emitting efficiency and a long life, a polymer light emitting display device and planar light source, as well as a method for manufacturing the polymer light emitting element are provided. The polymer light emitting element is characterized by comprising a first electrode, a second electrode and a light emitting layer provided between the first electrode and the second electrode and containing a polymer compound, wherein the second electrode is composed of three layers, a first layer, a second layer and a third layer arranged in this order viewed from the light emitting layer, and at least one of materials contained in the second layer has a reducing action on at least one of materials contained in the first layer, and the visible light transmittance of the third layer is 40% or more.

Abstract: An optical emitter includes a Light-Emitting Diode (LED) on a package wafer, transparent insulators, and one or more transparent electrical connectors between the LED die and one or more contact pads on the packaging wafer. The transparent insulators are deposited on the package wafer with LED dies attached using a lithography or a screen printing method. The transparent electrical connectors are deposited using physical vapor deposition, chemical vapor deposition, spin coating, spray coating, or screen printing and may be patterned using a lithography process and etching.

Abstract: A device includes a tube extending in a longitudinal direction and a hollow channel arranged in the tube. An end part of the tube is formed such that first electromagnetic radiation paths extending in the tube and outside of the hollow channel in the longitudinal direction are focused in a first focus.

Abstract: A fanout line structure of an array substrate includes a plurality of fanout lines arranged on a fanout area of the array substrate, where the fanout line is used to connect a signal line with a bonding pad. Lengths of different fanout lines are different. At least one fanout line includes a first subsection and a second subsection. An electrical resistivity of material of the second subsection of the fanout line is greater than an electrical resistivity of material of the first subsection of the fanout line. Length of a first fanout line is greater than length of a second fanout line, and length of a second subsection of the second fanout line is greater than length of a second subsection of the first fanout line.

Abstract: A dual-band infrared detector structure based on Type-II superlattices (T2SL) has been developed and experimentally validated. The structure according to the principles of the present invention is designed for a single Indium bump architecture and utilizes a T2SL barrier design that omits the traditional p-n junction region. The barrier design comprises multiple periods where each period comprises multiple monolayers doped P type. By selecting the composition, number of monolayers per period and number of periods, a transition region is created in the conduction band between a first absorber layer and a second absorber layer that allows operation at low biases (<100 mV for both bands) and exhibits a dark current density in the longer wavelength band comparable to that obtained with single-color detectors.

Abstract: The invention relates to a semiconductor device and a method for manufacturing the semiconductor device, which includes: an insulating film over a substrate; a first pixel electrode embedded in the insulating film; an island-shaped single-crystal semiconductor layer over the insulating film; a gate insulating film and a gate electrode; an interlayer insulating film which covers the island-shaped single-crystal semiconductor layer and the gate electrode; a wiring which electrically connects a high-concentration impurity region and the first pixel electrode to each other; a partition which covers the interlayer insulating film, the island-shaped single-crystal semiconductor layer, and the gate electrode and has an opening in a region over the first pixel electrode; a light-emitting layer formed in a region which is over the pixel electrode and surrounded by the partition; and a second pixel electrode electrically connected to the light-emitting layer.

Abstract: A two-color detector includes a first absorber layer. The first absorber layer exhibits a first valence band energy characterized by a first valence band energy function. A barrier layer adjoins the first absorber layer at a first interface. The barrier layer exhibits a second valence band energy characterized by a second valence band energy function. The barrier layer also adjoins a second absorber layer at a second interface. The second absorber layer exhibits a third valence band energy characterized by a third valence band energy function. The first and second valence band energy functions are substantially functionally or physically continuous at the first interface and the second and third valence band energy functions are substantially functionally or physically continuous at the second interface.

Abstract: Disclosed is a semiconductor device including: an insulating layer; a source electrode and a drain electrode embedded in the insulating layer; an oxide semiconductor layer in contact and over the insulating layer, the source electrode, and the drain electrode; a gate insulating layer over and covering the oxide semiconductor layer; and a gate electrode over the gate insulating layer, where the upper surfaces of the insulating layer, the source electrode, and the drain electrode exist coplanarly. The upper surface of the insulating layer, which is in contact with the oxide semiconductor layer, has a root-mean-square (RMS) roughness of 1 nm or less, and the difference in height between the upper surface of the insulating layer and the upper surface of the source electrode or the drain electrode is less than 5 nm. This structure contributes to the suppression of defects of the semiconductor device and enables their miniaturization.

Abstract: Embodiments of the invention discloses a space imaging overlay inspection method and an array substrate; the method comprises: forming a thin film having a space imaging overlay mark by photolithography; when the thin film is a transparent thin film, performing a color developing treatment on the space imaging overlay mark on the transparent thin film, so as to make the space imaging overlay mark appear in a non-transparent color; and conducting a space imaging overlay inspection between the transparent thin film and an adjacent thin film by using the space imaging overlay mark appear appearing in the non-transparent color. In the method, by conducting the color developing treatment to the space imaging overlay mark on the transparent thin film and then conducting positioning, the space imaging overlay mark can be positioned quickly and accurately, thus alignment condition between two photolithography procedures can be detected swiftly and effectively.

Abstract: Provided in this invention is a low-cost substrate provided with a transparent conductive film for photoelectric conversion device, which can improve performance of the photoelectric conversion device by enhanced light confinement effect achieved with effectively increased surface unevenness of the substrate. A method for manufacturing said substrate and a photoelectric conversion device using said substrate which can show improved performance are also provided. The substrate provided with the transparent conductive film for the photoelectric conversion device comprises a transparent insulating substrate and a transparent electrode layer containing at least zinc oxide deposited on the transparent insulating substrate, wherein the transparent electrode layer is composed of a double layer structure wherein first and second transparent conductive films are deposited in this order from a substrate side.

Abstract: The present invention discloses a method of preparing a transparent conducting oxide (TCO) film comprising the steps of: applying surface modified TCO nanoparticles onto a surface of a substrate; and cross-linking the surface modified TCO nanoparticles. The present invention also provides a transparent conducting oxide film prepared according to the method.

Abstract: The present invention relates to a liquid phase process for producing indium oxide-containing layers, in which a coating composition preparable from a mixture comprising at least one indium oxide precursor and at least one solvent and/or dispersion medium, in the sequence of points a) to d), a) is applied to a substrate, and b) the composition applied to the substrate is irradiated with electromagnetic radiation, c) optionally dried and d) converted thermally into an indium oxide-containing layer, where the indium oxide precursor is an indium halogen alkoxide of the generic formula InX(OR)2 where R is an alkyl radical and/or alkoxyalkyl radical and X is F, Cl, Br or I and the irradiation is carried out with electromagnetic radiation having significant fractions of radiation in the range of 170-210 nm and of 250-258 nm, to the indium oxide-containing layers producible with the process, and the use thereof.

Abstract: An optoelectronic semiconductor component comprising a semiconductor body (10) and a current spreading layer (3) is specified. The current spreading layer (3) is applied to the semiconductor body (10) at least in places. In this case, the current spreading layer (3) contains a metal (1) that forms a transparent electrically conductive metal oxide (2) in the current spreading layer, and the concentration (x) of the metal (1) decreases from that side of the current spreading layer (3) which faces the semiconductor body (10) toward that side of said current spreading layer which is remote from the semiconductor body (10). A method for producing such a semiconductor component is also disclosed.

Abstract: A conductive metal paste having no or only poor fire-through capability and including (a) particulate silver, (b) at least one lead-free glass frit including 0.5 to 15 wt. % SiO2, 0.3 to 10 wt. % Al2O3 and 67 to 75 wt. % Bi2O3, wherein the weight percentages are based on the total weight of the glass frit, and (c) an organic vehicle, wherein the content of the particulate silver in the conductive metal paste is 60 to 92 wt.-%, based on total conductive metal paste composition, and wherein the conductive metal paste is free from zinc oxide and compounds capable of generating zinc oxide on firing.

Abstract: In one aspect of the present invention, a method is provided. The method includes disposing a substantially amorphous cadmium tin oxide layer on a support; and thermally processing the substantially amorphous cadmium tin oxide layer in an atmosphere substantially free of cadmium from an external source to form a transparent layer, wherein the transparent layer has an electrical resistivity less than about 2×10?4 Ohm-cm. Method of making a photovoltaic device is also provided.

Abstract: A contact including an ohmic layer and a reflective layer located on the ohmic layer is provided. The ohmic layer is transparent to radiation having a target wavelength, while the reflective layer is at least approximately eighty percent reflective of radiation having the target wavelength. The target wavelength can be ultraviolet light, e.g., having a wavelength within a range of wavelengths between approximately 260 and approximately 360 nanometers.

Abstract: The invention relates to transparent rectifying contact structures for application in electronic devices, in particular appertaining to optoelectronics, solar technology and sensor technology, and also a method for the production thereof. The transparent rectifying contact structure according to the invention has the following constituents: a) a transparent semiconductor, b) a transparent, non-insulating and non-conducting layer composed of metal oxide, metal sulphide and/or metal nitride, the resistivity of which is preferably in the range of 102 ?cm to 107 ?cm and c) a layer composed of a transparent electrical conductor wherein the layer b) is formed between the semiconductor a) and the layer c) and the composition of the layer b) is defined in greater detail in the description of the patent.

Abstract: Two-dimensional chemical maps of a layered nanostructure are reconstructed from selected spectroscopy line scans in a scanning electron microscope. Embodiments include fast two-dimensional scanning a layered nanostructure to form a structure image having multiple layers, slow-rate spectroscopy scanning the nanostructure along selected scanning lines to form chemical profiles, warping the structure image into a warped structure image by flattening each of the layers in the structure image, aligning chemical profiles to the warped structure image, forming warped chemical maps, and inversely transforming the warped chemical maps into two-dimensional chemical maps.

Abstract: The invention relates to a substrate comprising at least one scattering film made of a transparent conductive oxide (TCO) and to a process for manufacturing such a substrate. It also relates to a solar cell comprising such a substrate. The substrate according to the invention comprises a layer of spherical particles made of a material chosen from dielectric and transparent conductive oxides, the layer being coated with a TCO film and the diameters of said spherical particles belonging to at least two populations of different diameters. The invention is applicable in particular to solar cells.

Abstract: Methods are generally provided for forming a conductive oxide layer on a substrate. In one particular embodiment, the method can include sputtering a transparent conductive oxide layer (e.g., including cadmium stannate) on a substrate from a target in a sputtering atmosphere comprising cadmium. The transparent conductive oxide layer can be sputtered at a sputtering temperature greater of about 100° C. to about 600° C. Methods are also generally provided for manufacturing a cadmium telluride based thin film photovoltaic device.

Abstract: Provision of a solid-state imaging device of a planarized structure with reduced dark currents, allowing for high sensitivities over a wide wavelength band ranging from visible wavelengths to near-infrared wavelengths, and a fabrication method of the same.

Abstract: In a display apparatus including pixels, each of which has organic EL elements which emit red, green, and blue (RGB) colors and a refractive index-control layer, an electrode at a light extraction side of each organic EL element is a silver layer in contact with a charge transport layer, the refractive index-control layer is arranged on the silver layer in common with the organic EL elements which emit RGB colors, and an effective refractive index (neff) represented by the following formula is in a range of 1.4 to 2.3. neff=0.7×nu+0.3×nd In the above formula, nu indicates the refractive index of the refractive index-control layer 3, and nd indicates the refractive index of the charge transport layer 1.

Abstract: The signal line structure is disposed between a gate driver and a display area of a display. The signal line structure includes a substrate, first metal layers, a first insulation layer, second metal layers, a second insulation layer and third metal layers. The first metal layers are arranged in parallel and toward a first direction in the substrate. The first insulation layer is disposed in the substrate and covers the first metal layers. The second metal layers are disposed on the positions of the first insulation layer corresponding to the first metal layers. The second insulation layer is disposed on the second metal layers and the first insulation layer. The third metal layers are disposed on the positions corresponding to the second metal layers in the second insulation layer. The distance between two adjacent second metal layers is less than that between two adjacent first metal layers.

Abstract: Methods of forming transparent conducting oxides and devices formed by these methods are shown. Monolayers that contain indium and monolayers that contain molybdenum are deposited onto a substrate and subsequently processed to form molybdenum-doped indium oxide. The resulting transparent conducing oxide includes properties such as an amorphous or nanocrystalline microstructure. Devices that include transparent conducing oxides formed with these methods have better step coverage over substrate topography and more robust film mechanical properties.

Abstract: The invention provides processes for the manufacture of conductive transparent films and electronic or optoelectronic devices comprising same.

Abstract: An article of manufacture comprising a nanowire and methods of making the same. In one embodiment, the nanowire includes a Ga-doped trace formed on a surface of an indium oxide layer having a thickness in nano-scale, and wherein the Ga-doped trace is formed with a dimension that has a depth is less than a quarter of the thickness of the indium oxide layer. In one embodiment, the indium oxide layer, which is optically transparent and electrically insulating, comprises an In2O3 film, and the thickness of the indium oxide layer is about 40 nm, and the depth of the nanowire is less than 10 nm.

Abstract: A transparent conductive film includes indium oxide containing hydrogen and cerium and having a substantially polycrystalline structure, in which specific resistance of the transparent conductive film is no greater than 3.4×10?4?·cm and the carrier mobility is no less than 70 cm2/Vs.

Abstract: Disclosed are a transparent electrode including a first light-transmission layer, a metal layer, and a second light-transmission layer sequentially formed, an organic light emitting device including the transparent electrode, and a method of manufacturing the same. The second light-transmission layer includes a conductive oxide and a metal catalyst.

Abstract: A structure and a method. The method includes: forming a dielectric layer on a substrate; forming electrically conductive first and second wires in the dielectric layer, top surfaces of the first and second wires coplanar with a top surface of the dielectric layer; and either (i) forming an electrically conductive third wire on the top surface of the dielectric layer, and over the top surfaces of the first and second wires, the third wire electrically contacting each of the first and second wires, the third wire not detectable by optical microscopy or (ii) forming an electrically conductive third wire between the top surface of the dielectric layer and the substrate, the third wire electrically contacting each of the first and second wires, the third wire not detectable by optical microscopy.

Abstract: Disclosed is a semiconductor electrode which comprises a transparent electrode that is arranged on the surface of a light-transmitting substrate. The transparent electrode is provided with a metal oxide layer on a surface that is on the reverse side of a surface that is in contact with the substrate. The metal oxide layer contains fine silicon particles, which absorb a specific wavelength (11), and fine metal oxide particles. The fine silicon particles are arranged between the fine metal oxide particles.

Abstract: An embodiment relates to an electronic component that may consist of an organic LED or organic solar cell, that comprises at least one substrate, one active layer provided between a first and a second electrode and having an active layer protected from dioxygen and the water vapor of the air by the second electrode that encapsulates the active layer.

Abstract: The invention relates to transparent rectifying contact structures for application in electronic devices, in particular appertaining to optoelectronics, solar technology and sensor technology, and also a method for the production thereof. The transparent rectifying contact structure according to the invention has the following constituents: a) a transparent semiconductor, b) a transparent, non-insulating and non-conducting layer composed of metal oxide, metal sulphide and/or metal nitride, the resistivity of which is preferably in the range of 102 ?cm to 107 ?cm and c) a layer composed of a transparent electrical conductor wherein the layer b) is formed between the semiconductor a) and the layer c) and the composition of the layer b) is defined in greater detail in the description of the patent.

Abstract: A photovoltaic module may contain a front contact configured to transfer electrical current from the module.

Abstract: An organic light emitting display (OLED) and a method of manufacturing the OLED is disclosed. The OLED, which has a transparent metal layer substantially preventing an oxide layer from forming on a pad metal, and a method of manufacturing the OLED are disclosed. The OLED includes a substrate, a display unit formed on the substrate including gate and source/drain electrodes, and a pad unit formed on the substrate configured to transmit electrical signals to the display unit. The pad unit includes a wiring line terminal in which a transparent metal layer is formed in a predetermined shape and a predetermined region.

Abstract: Disclosed is a substrate with a transparent conductive film, wherein an underlying layer and a transparent conductive film are arranged in this order on a transparent insulating substrate. The transparent conductive film-side surface of the underlying layer is provided with a pyramid-shaped or inverse pyramid-shaped irregular structures, and the transparent conductive film comprises a first transparent electrode layer which is formed on the underlying layer and a second transparent electrode layer which forms the outermost surface of the transparent conductive film. By forming a zinc oxide layer that serves as the second transparent electrode layer by a reduced pressure CVD method, a substrate with a transparent conductive film that is provided with an irregular structure smaller than that of the underlying layer can be obtained. The substrate with a transparent conductive film can improve the conversion efficiency of a photoelectric conversion device through an increased light trapping effect.

Abstract: A mount for a semiconductor device includes a carrier, at least two metal leads disposed on a bottom surface of the carrier, and a cavity extending through a thickness of the carrier to expose a portion of the top surfaces of the metal leads. A semiconductor light emitting device is positioned in the cavity and is electrically and physically connected to the metal leads. The carrier may be, for example, silicon, and the leads may be multilayer structures, for example a thin gold layer connected to a thick copper layer.

Abstract: A method of manufacturing an array substrate includes the following steps. A substrate having a thin film transistor disposed thereon is provided. The thin film transistor includes a gate electrode, a gate insulating layer, a source electrode, and a drain electrode. An organic material layer is formed to cover the substrate and the thin film transistor. A via hole is formed in the organic material layer to expose the drain electrode. A first inorganic material layer is formed to cover at least a sidewall of the via hole and a part of the organic material layer, and the first inorganic material layer exposes at least the drain electrode. A patterned transparent pixel electrode layer is formed on the first inorganic material layer, wherein the patterned transparent pixel electrode layer contacts the drain electrode through the via hole.

Abstract: There is provided an anode for an organic electronic device.

Abstract: A structure and a method. The method includes: forming a dielectric layer on a substrate; forming electrically conductive first and second wires in the dielectric layer, top surfaces of the first and second wires coplanar with a top surface of the dielectric layer; and either (i) forming an electrically conductive third wire on the top surface of the dielectric layer, and over the top surfaces of the first and second wires, the third wire electrically contacting each of the first and second wires, the third wire not detectable by optical microscopy or (ii) forming an electrically conductive third wire between the top surface of the dielectric layer and the substrate, the third wire electrically contacting each of the first and second wires, the third wire not detectable by optical microscopy.

Abstract: A zinc oxide transparent electroconductive oxide has been difficult to use as a substrate having a transparent electrode because the oxide, when configured as a thin film, because of increased resistivity due to air and/or moisture exposure. Though doping can inhibit increase of resistance to some extent, there has been difficulty in selecting a type and an amount of a doping substance and because doping causes high initial resistance. A substrate having a transparent electrode with stable resistivity against various environments is produced by a magnetron sputtering method using a target composed of a zinc oxide transparent electroconductive oxide containing 0.50 to 2.75% silicon dioxide by weight relative to the oxide.

Abstract: A method for forming a transparent electrode on a visible light-emitting diode is described. A visible light-emitting diode element is provided, and the visible light-emitting diode element has a substrate, an epitaxial structure and a metal electrode. The metal electrode and the epitaxial structure are located on the same side of the substrate, or located respectively on the different sides of the substrate. An ohmic metal layer is formed on a surface of the epitaxial structure. The ohmic metal layer is annealed. The ohmic metal layer is removed to expose the surface of the epitaxial structure. A transparent electrode layer is formed on the exposed surface. A metal pad is formed on the transparent electrode layer.