At Least Portion Of Which Is Transparent To Ultraviolet, Visible Or Infrared Light Patents (Class 257/749)
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Publication number: 20110126903Abstract: A photovoltaic device in which, by optimizing the structures for a substrate-side transparent electrode layer, an intermediate layer, and a back electrode layer, the extracted electrical current can be increased. The photovoltaic device includes at least a transparent electrode layer, a photovoltaic layer and a back electrode layer provided on a substrate, wherein the surface of the transparent electrode layer on which the photovoltaic layer is disposed includes a textured structure composed of ridges and a fine micro-texture provided on the surface of the ridges, the pitch of the textured structure is not less than 1.2 ?m and not more than 1.6 ?m, the height of the ridges is not less than 0.2 ?m and not more than 0.8 ?m, the pitch between peaks in the fine micro-texture is not less than 0.05 ?m and not more than 0.14 ?m, and the height of peaks is not less than 0.02 ?m and not more than 0.1 ?m.Type: ApplicationFiled: August 11, 2009Publication date: June 2, 2011Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Yasuyuki Kobayashi, Satoshi Sakai, Saneyuki Goya
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Patent number: 7935980Abstract: A semiconductor light-emitting device having a high light emission property and preventing an electrode from being peeled off during wire bonding. Also disclosed is a method of manufacturing a semiconductor light-emitting device 1 in which an n-type semiconductor layer (13), a light-emitting layer (14), and a p-type semiconductor layer (15) are formed on a substrate (11), a transparent positive electrode (16) is formed on the p-type semiconductor layer (15), a positive electrode bonding pad (17) is formed on the transparent positive electrode (16), and a negative electrode bonding pad (18) is formed on the n-type semiconductor layer (13).Type: GrantFiled: April 13, 2007Date of Patent: May 3, 2011Assignee: Showa Denko K.K.Inventors: Kenzo Hanawa, Yasunori Yokoyama
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Patent number: 7914885Abstract: Conductive paste allowing narrowing of an electrode prepared from the conductive paste and suppressing increase of resistance resulting from a small sectional area of the electrode is obtained. This conductive paste comprises binder resin, a conductive material dispersed in the binder resin and an additive, dispersed in the binder resin, containing at least either layered sulfide particles or spheroidal particles.Type: GrantFiled: August 29, 2006Date of Patent: March 29, 2011Assignee: Sanyo Electric Co., Ltd.Inventor: Shigeharu Taira
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Publication number: 20110049715Abstract: A method for depositing a metal oxide film on a surface of a supporting body for the film, comprising the steps of: —providing a deposition chamber; —providing a pulsed beam of electrons and plasma in the deposition chamber; —supplying a supporting body in the deposition chamber, the supporting body having a deposition surface; —providing a target body made of a material which comprises the metal oxide in the deposition chamber, the target body having a target surface; —forming a plume of metal oxide ablated from the target surface by means of the impact of the pulsed beam of electrons and plasma against the target surface; and —depositing a metal oxide film on the deposition surface by means of the contact of the plume with the deposition surface.Type: ApplicationFiled: December 19, 2007Publication date: March 3, 2011Inventors: Carlo Taliani, Petr Nozar
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Publication number: 20110012154Abstract: Provided is a GaN-based LED element having a novel structure for improving output by increasing light extraction efficiency.Type: ApplicationFiled: November 7, 2008Publication date: January 20, 2011Applicant: Mitsubishi Chemical CorporationInventors: Hiroaki Okagawa, Shin Hiraoka, Takahide Jouichi, Toshihiko Shima
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Patent number: 7868336Abstract: According to the present invention, protrusions 4 are formed on electrodes 3 of semiconductor elements 6, and an optical member 7 is secured on the semiconductor element 6 with an adhesive 8 so as to be pressed onto the protrusions 4.Type: GrantFiled: November 4, 2008Date of Patent: January 11, 2011Assignee: Panasonic CorporationInventors: Hiroaki Fujimoto, Yoshihiro Tomita
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Patent number: 7851828Abstract: The present invention provides a non-volatile phase change memory cell containing an electrode contact layer disposed between a metal electrode layer and a phase change material layer, the electrode contact layer being formed of a transparent conducting oxide-based material which has a high electric conductivity, a low thermal conductivity and a good thermal stability. A non-volatile phase change memory cell according to the present invention may be utilized to reduce the electric power needed for reset and set operation.Type: GrantFiled: November 29, 2005Date of Patent: December 14, 2010Assignees: Korea Institute of Science and Technology, Seoul National University Industry FoundationInventors: Byung-ki Cheong, Jeung-hyun Jeong, Dae-Hwan Kang, Taek Sung Lee, In Ho Kim, Kyeong Seok Lee, Won Mok Kim, Dong-Ho Ahn, Ki-Bum Kim
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Patent number: 7843061Abstract: The electrodes (7) and the contact zones (15) are structured in a film of a transparent conductive oxide (TCO), deposited on a transparent support (1) possibly coated with an intermediate film (3), while being separated by dielectric spaces (9) formed by nano fissures (11) obtained by UV radiation and passing through the TCO film. A protective film (13) can coat the electrodes (7) and the dielectric spaces (9).Type: GrantFiled: November 30, 2004Date of Patent: November 30, 2010Assignee: Asulab S.A.Inventors: Gian-Carlo Poli, Joachim Grupp, Pierre-Yves Baroni
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Patent number: 7800718Abstract: An electro-optical device includes: a light-shielding film provided below a transistor in a peripheral area surrounding a pixel area of the display. The light-shielding film includes a rectangular opening formed in a channel length direction of the transistor.Type: GrantFiled: July 15, 2008Date of Patent: September 21, 2010Assignee: Seiko Epson CorporationInventor: Masashi Nakagawa
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Publication number: 20100230814Abstract: An article of manufacture comprising a nanowire and methods of making the same. In one embodiment, the nanowire includes a Ga-doped trace formed on a surface of an indium oxide layer having a thickness in nano-scale, and wherein the Ga-doped trace is formed with a dimension that has a depth is less than a quarter of the thickness of the indium oxide layer. In one embodiment, the indium oxide layer, which is optically transparent and electrically insulating, comprises an In2O3 film, and the thickness of the indium oxide layer is about 40 nm, and the depth of the nanowire is less than 10 nm.Type: ApplicationFiled: June 22, 2009Publication date: September 16, 2010Applicant: NORTHWESTERN UNIVERSITYInventors: Tobin J. Marks, Mark C. Hersam, Norma E. S. Cortes
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Publication number: 20100181566Abstract: An electrode structure comprises a semiconductor junction comprising an n-type semiconductor layer and a p-type semiconductor layer; a hole exnihilation layer on the p-type semiconductor layer; and a transparent electrode layer on the hole exnihilation layer. The electrode structure further comprises a conductive layer between the hole exnihilation layer and the transparent electrode layer. In the electrode structure, one or more of the hole exnihilation layer, the conductive layer and the transparent electrode layer may be formed by an atomic layer deposition. In the electrode structure, a transparent electrode formed of a degenerated n-type oxide semiconductor does not come in direct contact with a p-type semiconductor, and thus, annihilation or recombination of holes generated in the p-type semiconductor can be reduced, which increases the carrier generation efficiency.Type: ApplicationFiled: January 19, 2010Publication date: July 22, 2010Applicant: SYNOS TECHNOLOGY, INC.Inventor: Sang In LEE
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Patent number: 7705353Abstract: A bonding pad includes a metal layer, a gate insulting layer, a passivation layer, and a transparent conductive layer. The metal layer has a first metal pattern and a second metal pattern which are separated from each other. The gate insulating layer covers the metal layer, and the passivation layer covers the gate insulating layer. The gate insulating layer and the passivation layer have a first contact opening and a second contact opening respectively exposing a portion of the first metal pattern and a portion of the second metal pattern. The transparent conductive layer covers the passivation layer and fills the first and second contact openings. The transparent conductive layer on the second contact opening serves as a testing-probe contact area. The present invention also provides an active device array substrate having the bonding pad.Type: GrantFiled: November 30, 2008Date of Patent: April 27, 2010Assignee: Chunghwa Picture Tubes, Ltd.Inventor: Shih-Chieh Lo
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Publication number: 20100090341Abstract: Patterned active layers formed by nano-imprint lithography for use in devices such as photovoltaic cells and hybrid solar cells. One such photovoltaic cell includes a first electrode and a first electrically conductive layer electrically coupled to the first electrode. The first conductive layer has a multiplicity of protrusions and recesses formed by a nano-imprint lithography process. A second electrically conductive layer substantially fills the recesses and covers the protrusions of the first conductive layer, and a second electrode is electrically coupled to the second conductive layer. A circuit electrically connects the first electrode and the second electrode.Type: ApplicationFiled: October 13, 2009Publication date: April 15, 2010Applicants: MOLECULAR IMPRINTS, INC., BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEMInventors: Fen Wan, Frank Y. Xu, Sidlgata V. Sreenivasan, Shuqiang Yang
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Patent number: 7663236Abstract: Disclosed herein is a semiconductor electrode with improved power conversion efficiency through inhibition of recombination reactions of electrons. The semiconductor electrode comprises a transparent electrode consisting of a substrate and a conductive material coated on the substrate, and a metal oxide layer formed on the transparent electrode wherein the metal oxide layer contains a phosphate. Further disclosed is a solar cell employing the semiconductor electrode.Type: GrantFiled: October 6, 2006Date of Patent: February 16, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Eun Sung Lee, Young Jun Park, Sang Cheol Park, Jung Gyu Nam, Ju Chul Park
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Publication number: 20100024862Abstract: Provided in this invention is a low-cost substrate provided with a transparent conductive film for photoelectric conversion device, which can improve performance of the photoelectric conversion device by enhanced light confinement effect achieved with effectively increased surface unevenness of the substrate. A method for manufacturing said substrate and a photoelectric conversion device using said substrate which can show improved performance are also provided. The substrate provided with the transparent conductive film for the photoelectric conversion device comprises a transparent insulating substrate and a transparent electrode layer containing at least zinc oxide deposited on the transparent insulating substrate, wherein the transparent electrode layer is composed of a double layer structure wherein first and second transparent conductive films are deposited in this order from a substrate side.Type: ApplicationFiled: November 12, 2007Publication date: February 4, 2010Applicant: KANEKA CORPORATIONInventor: Yuko Tawada
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Publication number: 20100001359Abstract: A transparent conductive layer includes a substrate, a first conductive layer disposed on the substrate, and a second conductive layer disposed on the first conductive layer, wherein the second conductive layer comprises a textured surface and an opening which exposes the first conductive layer, wherein the opening comprises a diameter of about 1 micrometer to about 3 micrometers. Also disclosed is a method of manufacturing the transparent conductive layer and a photoelectric device.Type: ApplicationFiled: March 30, 2009Publication date: January 7, 2010Applicant: Samsung Electronics Co., Ltd.Inventors: Seung-Jae JUNG, Yuk-Hyun NAM, Czang-Ho LEE, Myung-Hun SHIN, Min-Seok OH, Byoung-Kyu LEE, Mi-Hwa LIM, Joon-Young SEO
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Publication number: 20090179292Abstract: Methods of forming transparent conducting oxides and devices formed by these methods are shown. Monolayers that contain indium and monolayers that contain molybdenum are deposited onto a substrate and subsequently processed to form molybdenum-doped indium oxide. The resulting transparent conducing oxide includes properties such as an amorphous or nanocrystalline microstructure. Devices that include transparent conducing oxides formed with these methods have better step coverage over substrate topography and more robust film mechanical properties.Type: ApplicationFiled: March 24, 2009Publication date: July 16, 2009Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 7557391Abstract: An organic light-emitting display device wherein an IR drop across a first electrode can be prevented. The organic light-emitting display device includes a substrate; a plurality of stripe-shaped first electrodes disposed on the substrate and extending in a first direction; a plurality of stripe-shaped first insulators extending in a second direction to cross the stripe-shaped first electrodes; a plurality of stripe-shaped second electrodes disposed between the stripe-shaped first insulators to extend in the same direction as the stripe-shaped first insulators and cross the stripe-shaped first electrodes; an intermediate layer disposed at positions where the stripe-shaped first electrodes and the stripe-shaped second electrodes cross and including an emission layer; and first conductors disposed at positions where the stripe-shaped first electrodes and the stripe-shaped first insulators intersect and between the stripe-shaped first electrodes and the stripe-shaped first insulators.Type: GrantFiled: May 30, 2007Date of Patent: July 7, 2009Assignee: Samsung Mobile Display Co., Ltd.Inventors: Young-Mo Koo, Ok-Keun Song, Hye-In Jeong, Tae-Shick Kim, Jae-Goo Lee
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Patent number: 7541205Abstract: A method for forming a transparent electrode on a visible light-emitting diode is described. A visible light-emitting diode element is provided, and the visible light-emitting diode element has a substrate, an epitaxial structure and a metal electrode. The metal electrode and the epitaxial structure are located on the same side of the substrate, or located respectively on the different sides of the substrate. An ohmic metal layer is formed on a surface of the epitaxial structure. The ohmic metal layer is annealed. The ohmic metal layer is removed to expose the surface of the epitaxial structure. A transparent electrode layer is formed on the exposed surface. A metal pad is formed on the transparent electrode layer.Type: GrantFiled: March 9, 2007Date of Patent: June 2, 2009Assignee: Epistar CorporationInventors: Tse-Liang Ying, Shi-Ming Chen
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Publication number: 20080239217Abstract: Provided are a semi-transmitting and semi-reflecting electrode substrate provided with a transparent conductive layer which is almost free from the generation of residues caused by etching and is resistant to an etchant for a metal reflecting layer (metal layer), a method of producing the semi-transmitting and semi-reflecting electrode substrate and a liquid crystal display device using the semi-transmitting and semi-reflecting electrode substrate.Type: ApplicationFiled: February 18, 2005Publication date: October 2, 2008Inventors: Kazuyoshi Inoue, Shigekazu Tomai, Masato Matsubara
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Patent number: 7420215Abstract: A transparent conductive film substantially made from In2O3, SnO2 and ZnO, having a molar ratio In/(In+Sn+Zn) of 0.65 to 0.8 and also a molar ratio Sn/Zn of 1 or less: The transparent conductive film has a favorable electric contact property with an electrode or line made from Al or Al alloy film. Further, a semiconductor device having an electrode or line made from the transparent conductive film has high reliability and productivity.Type: GrantFiled: June 22, 2007Date of Patent: September 2, 2008Assignee: Mitsubishi Electric CorporationInventors: Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Toru Takeguchi, Kazumasa Kawase
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Publication number: 20070284742Abstract: A semiconductor device includes a semiconductor layer, an Al alloy film electrically connected to the semiconductor layer, and a transparent electrode layer directly contacting with the Al alloy film at least over an insulating substrate. The Al alloy film includes one or more kinds of elements selected from Fe, Co and Ni in total of 0.5 to 10 mol %, and a remaining substantially comprises Al.Type: ApplicationFiled: April 27, 2007Publication date: December 13, 2007Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Kazumasa Kawase
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Patent number: 7294906Abstract: An apparatus for supplying electrical power to a movable member. The apparatus includes a fixed member, the movable member moving relative to the fixed member, a flexible wiring member having an end connected to the movable member and another end connected to the fixed member, configured to transmit the electrical power from the fixed member to the movable member, and a cooling member configured to cool the fixed member.Type: GrantFiled: September 28, 2004Date of Patent: November 13, 2007Assignee: Canon Kabushiki KaishaInventor: Takao Ukaji
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Patent number: 7214971Abstract: A semiconductor light-receiving device has a substrate including upper, middle and lower regions in its front side. A p-type layer on the lower region has a top surface including a portion on a level with the middle region. An electrode covers at least part of the boundary between the portion of the p-type layer and the middle region. An n-type layer on the p-type layer has a top surface including a portion on a level with the upper region. Another electrode covers at least part of the boundary between the portion of the n-type layer and the upper region.Type: GrantFiled: June 10, 2004Date of Patent: May 8, 2007Assignee: Hamamatsu Photonics K.K.Inventors: Minoru Niigaki, Kazutoshi Nakajima
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Patent number: 7202511Abstract: Electromagnetic energy is detected with high efficiency in the spectral range having wavelengths of about 1–2 microns by coupling an absorber layer having high quantum efficiency in the spectral range having wavelengths of about 1–2 microns to an intrinsic semiconducting blocking region of an impurity band semiconducting device included in a solid state photon detector.Type: GrantFiled: August 18, 2004Date of Patent: April 10, 2007Assignee: DRS Sensors & Targeting Systems, Inc.Inventors: Maryn G. Stapelbroek, Henry H. Hogue, Arvind I. D'Souza
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Patent number: 7119411Abstract: An interconnect structure connecting two isolated metal lines in a non-display area of a TFT-array substrate. A first metal line is disposed on the substrate, covered with a first insulating layer. A second metal line is disposed on the first insulating layer and covered by a second insulating layer. ITO (indium tin oxide) wiring is disposed on the second insulating layer, electrically connecting the first and second metal lines. A passivation structure is disposed on the second insulating layer, with an opening therein to expose and surround the ITO wiring.Type: GrantFiled: February 17, 2004Date of Patent: October 10, 2006Assignee: AU Optronics Corp.Inventor: Kun-Hong Chen
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Patent number: 7084503Abstract: The present invention provides a semiconductor device in which occurrence of disclination caused by steps in a contact portion and steps between pixel electrodes is prevented. A method of fabricating a semiconductor device according to the invention includes forming an insulating film 2 on an electrode 1a so as to cover the electrode; forming contact holes 2a and 2b located on the electrode and concave portions 2c and 2d connected to the contact hole; embedding a conductive film 8 in the contact hole and the concave portion and forming a conductive film 8 on the insulating film; and applying the CMP polishing or the etching-back to the conductive film, and thereby forming a pixel electrode made of the conductive films 8a and 8b embedded in the contact hole and the concave portion.Type: GrantFiled: October 31, 2003Date of Patent: August 1, 2006Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki KaishaInventors: Akira Ishikawa, Shingo Eguchi, Seiji Oda, Yoshinori Higami
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Patent number: 7078737Abstract: An InGaN-based light-emitting diode that emits light in blue, for example, is mounted on a support substrate as a semiconductor light-emitting element, and a transparent film is fixed to the support substrate so as to cover the semiconductor light-emitting element. An electrode pattern is formed on an upper surface of the transparent film, and the electrode pattern is electrically connected to terminal electrodes of the semiconductor light-emitting element through, for example, through-holes. The transparent film can contain a phosphor excited by light emitted from the semiconductor light-emitting element. It is not necessary to perform wire bonding for connecting the semiconductor light-emitting element to the electrode pattern and sealing with a sealant.Type: GrantFiled: August 29, 2003Date of Patent: July 18, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masaaki Yuri, Daisuke Ueda
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Patent number: 7061106Abstract: The present invention discloses an image sensor module and forming method of wafer level package. The image sensor module comprises an isolating base, a wafer level package, a lens holder, and a F.P.C.. The wafer level package having a plurality of image sensor dies and a plurality of solder balls is attached to the isolating base. A plurality of lens are placed in the lens holder, and the lens holder is located on the image sensor dies. The lens holder is placed in the F.P.C., and the F.P.C. has a plurality of solder joints coupled to the solder balls for conveniently transmitting signal of the image sensor dies. Moreover, the image sensor dies may be packaged with passive components or other dies with a side by side structure or a stacking structure.Type: GrantFiled: April 28, 2004Date of Patent: June 13, 2006Assignee: Advanced Chip Engineering Technology Inc.Inventors: Wen-Kun Yang, Wen-Pin Yang
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Patent number: 7030004Abstract: The invention provides a method for forming bond pad openings through a three-layer passivation structure, which protects the semiconductor device prior to bonding and packaging. Two passivation layers are formed over a semiconductor device with bond pads formed thereon. Openings are formed through the passivation layers to expose the bond pads. The openings are then filled with a photoresist material before depositing a polyimide layer over the passivation layers. Openings are formed in the polyimide layer so as to expose the filled openings. The photoresist material in the filled openings is subsequently removed to expose the bond pads.Type: GrantFiled: November 10, 2003Date of Patent: April 18, 2006Assignee: 1st Silicon (Malaysia) Sdn BhdInventor: Su Hyun Kim
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Patent number: 7026713Abstract: A transistor device includes a channel of p-type substantially transparent delafossite material. Source and drain contacts are interfaced to the channel. Gate dielectric is between a gate contact and the channel.Type: GrantFiled: December 17, 2003Date of Patent: April 11, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Randy Hoffman, John Wager
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Patent number: 7023017Abstract: A thin film transistor substrate of horizontal electric field type includes: a gate line and a first common line formed on a substrate to be in parallel to each other; a data line crossing the gate line and the first common line with a gate insulating film therebetween to define a pixel area; a second common line crossing the first common line having the gate insulating film therebetween; a thin film transistor connected to the gate line and the data line; a common electrode extending from the second common line in said pixel area; a pixel electrode that is parallel to the common electrode and the second common line; a protective film for covering the thin film transistor; a gate pad having a lower gate pad electrode connected to an upper gate pad electrode through a first contact hole; a common pad having a lower common pad electrode connected to an upper common pad electrode through a second contact hole; and a data pad having a lower data pad electrode connected to an upper data pad electrode provided withType: GrantFiled: November 2, 2004Date of Patent: April 4, 2006Assignee: LG. Philips LCD Co., LTDInventors: Byung Chul Ahn, Oh Nam Kwon, Heung Lyul Cho
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Patent number: 7009295Abstract: A semiconductor device includes a semiconductor chip having a main surface provided with an integrated circuit including a photoelectric converter and a first wiring for electrically connecting the integrated circuit of the semiconductor chip to respective external terminals. The semiconductor device also includes a sealing resin for sealing the main surface of the semiconductor chip and the first wiring, formed so as to have an opening over the surface of the integrated circuit and a light-transmitting cap for covering the opening of the sealing resin.Type: GrantFiled: November 28, 2003Date of Patent: March 7, 2006Assignee: Oki Electric Industry Co., Ltd.Inventor: Takashi Noguchi
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Patent number: 7002241Abstract: Packages of semiconductor devices with non-opaque covers and methods for making the packages. The invention allows an encapsulant to be used with a non-opaque cover. By ensuring the cover is attached to a die in such a way as to expose bonding pads while sealing in the imaging portion of the die, the die can be electrically connected to a substrate and then encapsulated. Since the imaging portion is sealed, the encapsulant cannot get underneath the glass. By ensuring the encapsulant is not filled beyond the glass, encapsulant cannot get over the glass either.Type: GrantFiled: February 12, 2003Date of Patent: February 21, 2006Assignee: National Semiconductor CorporationInventors: Shahram Mostafazadeh, Joseph O. Smith
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Patent number: 6958261Abstract: An image sensor device includes a QFN type leadframe having a central die attach flag and an outer bonding pad area having a plurality of bonding pads. A sensor IC is attached to the flag. The IC has a first surface with an active area and a peripheral bonding pad area that includes bonding pads. Wires are wirebonded to respective ones of the IC bonding pads and corresponding ones of the leadframe bonding pads, thereby electrically connecting the IC and the leadframe. Stud bumps are formed on the first surface of the IC and a transparent cover is disposed over the IC active area and resting on the stud bumps. The cover allows light to pass therethrough onto the IC active area. A mold compound is formed over the leadframe, wirebonds and a peripheral portion of the cover.Type: GrantFiled: October 14, 2003Date of Patent: October 25, 2005Assignee: Freescale Semiconductor, Inc.Inventors: Wai Wong Chow, Man Hon Cheng, Wai Keung Ho
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Patent number: 6953949Abstract: An electro-optical device according to the present invention includes, above a substrate, pixel electrodes, thin film transistors connected to the pixel electrodes, an upper light shielding film to cover the upper side of the channel regions of the thin film transistors, and a lower light shielding film to cover the lower side of the channel regions of the thin film transistors. Each of the upper light shielding film and the lower light shielding film has projecting portions to define corner cuts in an opening region of each pixel, in the intersection regions where data lines and scanning lines intersect each other. Both projecting portions are connected to each other through contact holes. The channel region of the thin film transistors are disposed in the intersection regions.Type: GrantFiled: May 20, 2003Date of Patent: October 11, 2005Assignee: Seiko Epson CorporationInventor: Masao Murade
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Patent number: 6952022Abstract: The present invention relates to an image sensor comprising an amorphous silicon thin-film transistor optical sensor which functions as an image sensor used for an X-ray photography device, a fingerprint recognition apparatus, a scanner, etc., and a method of manufacturing the image sensor. Since the thin-film transistor optical sensor according to the present invention has a high-resistance silicon region by disposing an offset region in a channel region, a dark leakage current of the optical sensor remains in a low level even under a high voltage. Therefore, it is possible to apply a high voltage to the thin-film transistor optical sensor according to the present invention so that the image senor can be sensitive to a weak light. In addition, since the storage capacitance in the image sensor is formed in a double structure, the image sensor has a high value of capacitance.Type: GrantFiled: December 9, 2003Date of Patent: October 4, 2005Assignee: Silicon Display TechnologyInventors: Jin Jang, Ji Ho Hur, Hyun Chul Nam
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Patent number: 6943376Abstract: An object of this invention is to provide an electrode for p-type SiC which can provide improved surface morphology and less thermal damage for a semiconductor crystal layer due to formation of an electrode. In this invention, a p-type electrode is manufactured to contain at least one selected from the group consisting of nickel (Ni), cobalt (Co), palladium (Pd) and platinum (Pt).Type: GrantFiled: September 2, 2002Date of Patent: September 13, 2005Assignee: Toyoda Gosei Co., Ltd.Inventors: Osamu Nakatsuka, Ryohei Konishi, Ryuichi Yasukochi, Yasuo Koide, Masanori Murakami, Naoki Shibata
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Patent number: 6903461Abstract: An ultraviolet sensitive material may be formed within a semiconductor structure covered with a suitable hard mask. At an appropriate time, the underlying ultraviolet sensitive material may be exposed to ultraviolet radiation, causing the material to exhaust through the overlying hard mask. As a result, an air gap may be created having desirable characteristics as a dielectric.Type: GrantFiled: December 18, 2003Date of Patent: June 7, 2005Assignee: Intel CorporationInventors: Grant M. Kloster, Jihperng Leu, Hyun-Mog Park
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Patent number: 6897560Abstract: The present invention provides an ultraviolet-transparent conductive film comprising a Ga2O3 crystal. The film has a transparency in the wavelength range of 240 to 800 nm, or 240 to 400 nm, and an electric conductivity induced by an oxygen deficiency or dopant in the Ga2O3 crystal. The dopant includes at least one element selected from the group consisting of the Sn, Ge, Si, Ti, Zr, Hf, V, Nb, Ta, Cr, Mo and W. The ultraviolet-transparent conductive film is formed through either one of a pulsed-laser deposition method, sputtering method, CVD method and MBE method, under the conditions with a substrate temperature of 600 to 1500° C. and an oxygen partial pressure of 0 to 1 Pa.Type: GrantFiled: July 9, 2001Date of Patent: May 24, 2005Assignee: Japan Science & Technology CorporationInventors: Hiromichi Ota, Masahiro Orita, Hideo Hosono, Masahiro Hirano
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Patent number: 6885110Abstract: TFT array substrates used for liquid crystal display panels are disclosed of which the fabrication processes are simplified and the manufacturing costs are reduced by reducing the number of masks used in fabricating the TFT array substrates. A gate wiring line metal film, a gate insulating film, a semiconductor film, and a contact electrode metal film are formed on a substrate surface. The contact electrode metal film, the semiconductor film, the gate insulating film, and the gate wiring line metal film are sequentially etched, by photolithography, using a first pattern, and the side surfaces of a gate wiring line metal film pattern, which is formed into portions of gate wiring lines and gate electrodes, are oxidized. A transparent conductive film is formed, and part of the transparent conductive film, the contact electrode metal film, and the semiconductor film are sequentially etched, by photolithography, using a second pattern.Type: GrantFiled: September 8, 2000Date of Patent: April 26, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Kazufumi Ogawa
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Patent number: 6882036Abstract: Methods and apparatuses for forming thin microelectronic dies. A method in accordance with one embodiment of the invention includes releasably attaching a microelectronic substrate to a support member with an attachment device. The microelectronic substrate can have a first surface, a second surface facing opposite from the first surface, and a first thickness between the first and second surfaces. The attachment device can have a releasable bond with the microelectronic substrate, wherein the bond has a bond strength that is reduced upon exposure to at least one energy. The support member can be at least partially transmissive to the at least one energy. The method can further include reducing a thickness of the microelectronic substrate and directing a quantity of the at least one energy through the support member to the attachment device to reduce the strength of the bond between the attachment device and the microelectronic substrate.Type: GrantFiled: April 29, 2004Date of Patent: April 19, 2005Assignee: Micron Technology, Inc.Inventors: Nathan R. Draney, Michael E. Connell
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Patent number: 6872975Abstract: An active matrix driven electro-optical device, such as a liquid crystal device, enabled to add sufficient storage capacitance to pixel electrodes and decrease the diameter of contact holes connecting with pixel electrodes even when a fine pixel pitch is employed. The liquid crystal device has TFTs, data lines, scanning lines, storage capacitor lines, and pixel electrodes provided on a TFT array substrate. Each of the pixel electrodes is electrically connected to one of the TFTs by two contact holes through a barrier layer. A part of a semiconductor layer and each of the capacitor lines sandwich a first dielectric film and constitute a first storage capacitor, while a part of the barrier layer and each of the capacitor lines sandwich a second dielectric film and constitute a second storage capacitor.Type: GrantFiled: December 17, 2002Date of Patent: March 29, 2005Assignee: Seiko Epson CorporationInventor: Masao Murade
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Patent number: 6869814Abstract: A light emitting diode (LED), and a method for producing the same. The LED includes a substrate that may be made of silicon, a first conductive layer on one side, and a porous insulating layer on the opposite side. The insulating layer defines microcavities therein, the microcavities having sharp tips on their inner surfaces. The microcavities have gas inside. A second conductive layer is disposed over the insulating layer. When an electrical potential is applied between the conductive layers, the gas-filled microcavities act as plasma discharge lamps, emitting light. The light may be in the ultraviolet portion of the spectrum. The method includes etching a substrate to produce a porous insulating layer on one side, depositing a first conductive layer on the opposite side, and depositing a second conductive layer over the insulating layer. The microcavities in the insulating layer are then filled with gas.Type: GrantFiled: May 21, 2004Date of Patent: March 22, 2005Inventors: Kok Wai Cheah, Wai Kwok Wong, Hoi Lam Tam
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Patent number: 6858878Abstract: A light shield film is provided adjacent to an anode of an EL element that consists of the anode, an EL layer, and a cathode. The anode and the cathode are transparent or semitransparent to visible light and hence transmit EL light. With this structure, ambient light is absorbed by the light shield film and does not reach an observer. This prevents an external view from appearing on the observation surface.Type: GrantFiled: January 7, 2003Date of Patent: February 22, 2005Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama
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Patent number: 6853042Abstract: The present invention concerns a hybrid optical element including at least one optical element (2) attached to one surface of a substrate (1), a semiconductor laser (3) and a photodetector (4) attached to the other surface of the substrate (1) and an intermediate member (relay substrate) (5) interposed between the substrate (1) and the photodetector (4). The intermediate member (5) has a through hole (6) through which a light flux incident on the photodetector (4) is allowed to pass and a part with a conductivity by which a terminals of the photodetector (4) are connected to a conductor pattern on the substrate (1).Type: GrantFiled: September 19, 2002Date of Patent: February 8, 2005Assignee: Sony CorporationInventors: Hiroshi Yoshida, Tadashi Taniguchi, Masafumi Ozawa
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Publication number: 20040235286Abstract: The process according to the invention makes it possible to deposit a transparent conductive oxide film (12) on a toughened glass substrate (10) placed inside a chamber (26).Type: ApplicationFiled: June 24, 2004Publication date: November 25, 2004Inventors: Ulrich Kroll, Johannes Meier
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Patent number: 6774499Abstract: A non-leaded semiconductor package and method of fabricating the same is proposed, which can be used for the fabrication of a non-leaded type of semiconductor package, such as a CQFN (Carrierless Quad Flat No-lead) package. The proposed semiconductor packaging technology is characterized by the use of a metal plate as provisional chip carrier during fabrication and by the use of RDL (Redistribution Layer) technology to provide internal electrical interconnections between the I/O pads of the packaged chip and the non-leaded external electrical contacts. These features allow the fabrication of the CQFN package to be implemented without the use of bonding wires for internal electrical connections and without the use of substrate as a permanent chip carrier.Type: GrantFiled: May 13, 2003Date of Patent: August 10, 2004Assignee: Siliconware Precision Industries Co., Ltd.Inventor: Ke-Chuan Yang
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Patent number: 6765230Abstract: An active matrix driven electro-optical device, such as a liquid crystal device, enabled to add sufficient storage capacitance to pixel electrodes and decrease the diameter of contact holes connecting with pixel electrodes even when a fine pixel pitch is employed. The liquid crystal device has TFTs, data lines, scanning lines, storage capacitor lines, and pixel electrodes provided on a TFT array substrate. Each of the pixel electrodes is electrically connected to one of the TFTs by two contact holes through a barrier layer. A part of a semiconductor layer and each of the capacitor lines sandwich a first dielectric film and constitute a first storage capacitor, while a part of the barrier layer and each of the capacitor lines sandwich a second dielectric film and constitute a second storage capacitor.Type: GrantFiled: December 17, 2002Date of Patent: July 20, 2004Assignee: Seiko Epson CorporationInventor: Masao Murade
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Patent number: 6759749Abstract: The circuit structure of the present invention has a plurality of conductive path layers and at least one interlayer isolating layer formed between the plurality of conductive path layers. Each of the plurality of conductive path layers has at least one conductive path capable of transmitting light or electricity therethrough. Each of a plurality of input/output (I/O) sections is connected to any one of the plurality of conductive paths. Each of the plurality of conductive path layers has a first laminated structure that includes a plurality of first conductive layers and at least one first isolating layer formed therebetween. The interlayer isolating layer has a second laminated structure that includes a plurality of second isolating layers and at least one second conductive layer formed therebetween.Type: GrantFiled: April 5, 2002Date of Patent: July 6, 2004Assignee: Sharp Kabushiki KaishaInventors: Koichi Miyachi, Yoshihiro Izumi, Hiroshi Gohda