Abstract: A light emitting diode (LED) and a method of making the same are disclosed. The present invention uses a metal layer of high conductivity and high reflectivity to prevent the substrate from absorbing the light emitted. This invention also uses the bonding technology of dielectric material thin film to replace the substrate of epitaxial growth with high thermal conductivity substrate to enhance the heat dissipation of the chip, thereby increasing the performance stability of the LED, and making the LED applicable under higher current.

Abstract: A method for making a nitride read only memory device with buried diffusion spacers is disclosed. An oxide-nitride-oxide (ONO) layer is formed on top of a silicon substrate, and a polysilicon gate is formed over the ONO layer. The polysilicon gate is formed less than a length of the ONO layer. Two buried diffusion spacers are formed beside two sidewalls of the polysilicon gate and over the ONO layer. Two buried diffusion regions are implanted on the silicon substrate next to the two buried diffusion spacers. The two buried diffusion regions are then annealed such that the approximate interfaces of the buried diffusion regions are under the sidewalls of the polysilicon gate. The structure of a nitride read only memory device with buried diffusion spacers is also described.

Abstract: A method for fabricating a thin film transistor and a thin film transistor includes a polycrystalline silicon layer formed by irradiating an amorphous silicon layer with a laser beam through an organic layer formed on the amorphous silicon layer and removing the organic layer.

Abstract: A process for fabricating a highly stable and reliable semiconductor, comprising: coating the surface of an amorphous silicon film with a solution containing a catalyst element capable of accelerating the crystallization of the amorphous silicon film, and heat treating the amorphous silicon film thereafter to crystallize the film.

Abstract: High throughput systems and processes for recrystallizing thin film semiconductors that have been deposited at low temperatures on a substrate are provided. A thin film semiconductor workpiece (170) is irradiated with a laser beam (164) to melt and recrystallize target areas of the surface exposed to the laser beam. The laser beam is shaped into one or more beamlets using patterning masks (150). The mask patterns have suitable dimensions and orientations to pattern the laser beam radiation so that the areas targeted by the beamlets have dimensions and orientations that are conducive to semiconductor recrystallization. The workpiece is mechanically translated along linear paths relative to the laser beam to process the entire surface of the work piece at high speeds. Position sensitive triggering of a laser can be used generate laser beam pulses to melt and recrystallize semiconductor material at precise locations on the surface of the workpiece while it is translated on a motorized stage (180).

Abstract: Methods of preparing a thin crystalline silicon film for transfer and devices utilizing a transferred crystalline silicon film are disclosed. The methods include preparing a silicon growth substrate which has an interface defining substance associated with an exterior surface. The methods further include depositing an epitaxial layer of silicon on the silicon growth substrate at the surface and separating the epitaxial layer from the substrate substantially along the plane or other surface defined by the interface defining substance. The epitaxial layer may be utilized as a thin film of crystalline silicon in any type of semiconductor device which requires a crystalline silicon layer. In use, the epitaxial transfer layer may be associated with a secondary substrate.

Abstract: A method includes forming a stress compensation layer over a first side of a semiconductor substrate and forming a Group III-nitride layer over a second side of the substrate. Stress created on the substrate by the Group III-nitride layer is at least partially reduced by stress created on the substrate by the stress compensation layer. Forming the stress compensation layer could include forming a stress compensation layer from amorphous or microcrystalline material. Also, the method could include crystallizing the amorphous or microcrystalline material during subsequent formation of one or more layers over the second side of the substrate. Crystallizing the amorphous or microcrystalline material could occur during subsequent formation of the Group III-nitride layer and/or during an annealing process. The amorphous or microcrystalline material could create no or a smaller amount of stress on the substrate, and the crystallized material could create a larger amount of stress on the substrate.

Abstract: Methods for making and/or treating articles of semiconducting material are disclosed. In various methods, a first article of semiconducting material is provided, the first article of semiconducting material is heated sufficiently to melt the semiconducting material, and the melted semiconducting material is solidified in a direction substantially parallel to a shortest dimension of the melted article of semiconducting material. Articles of semiconducting materials made by methods described herein are also disclosed.

Abstract: A method for fabricating organic electroluminescent devices is disclosed. The method comprises providing a substrate divided into first and second regions, forming an amorphous silicon layer on the substrate, forming a protection film on the amorphous silicon layer within the second region, performing an excimer laser annealing process on the amorphous silicon layer for converting it to a polysilicon layer, removing the protection film, patterning the polysilicon layer, thus a first patterned polysilicon layer in the first region and a second patterned polysilicon layer in the second region are formed. A resultant organic electroluminescent device is obtained. Specifically, the grain size of the first patterned polysilicon layer is large than that of the second patterned polysilicon layer.

Abstract: A method for making a nitride read only memory device with buried diffusion spacers is disclosed. An oxide-nitride-oxide (ONO) layer is formed on top of a silicon substrate, and a polysilicon gate is formed over the ONO layer. The polysilicon gate is formed less than a length of the ONO layer. Two buried diffusion spacers are formed beside two sidewalls of the polysilicon gate and over the ONO layer. Two buried diffusion regions are implanted on the silicon substrate next to the two buried diffusion spacers. The two buried diffusion regions are then annealed such that the approximate interfaces of the buried diffusion regions are under the sidewalls of the polysilicon gate. The structure of a nitride read only memory device with buried diffusion spacers is also described.

Abstract: The disclosed systems and method for non-periodic pulse sequential lateral solidification relate to processing a thin film. The method for processing a thin film, while advancing a thin film in a selected direction, includes irradiating a first region of the thin film with a first laser pulse and a second laser pulse and irradiating a second region of the thin film with a third laser pulse and a fourth laser pulse, wherein the time interval between the first laser pulse and the second laser pulse is less than half the time interval between the first laser pulse and the third laser pulse. In some embodiments, each pulse provides a shaped beam and has a fluence that is sufficient to melt the thin film throughout its thickness to form molten zones that laterally crystallize upon cooling. In some embodiments, the first and second regions are adjacent to each other. In some embodiments, the first and second regions are spaced a distance apart.

Abstract: A thin film transistor and method of fabricating the same are provided. The thin film transistor includes: a metal catalyst layer formed on a substrate, and a first capping layer and a second capping layer pattern sequentially formed on the metal catalyst layer. The method includes: forming a first capping layer on a metal catalyst layer; forming and patterning a second capping layer on the first capping layer; forming an amorphous silicon layer on the patterned second capping layer; diffusing the metal catalyst; and crystallizing the amorphous silicon layer to form a polysilicon layer. The crystallization catalyst diffuses at a uniform low concentration to control a position of a seed formed of the catalyst such that a channel region in the polysilicon layer is close to a single crystal. Therefore, the characteristics of the thin film transistor device may be improved and uniformed.

Abstract: A method of making a crystalline film includes providing a film comprising seed grains of a selected crystallographic surface orientation on a substrate; irradiating the film using a pulsed light source to provide pulsed melting of the film under conditions that provide a mixed liquid/solid phase and allowing the mixed solid/liquid phase to solidify under conditions that provide a textured polycrystalline layer having the selected surface orientation. One or more irradiation treatments may be used. The film is suitable for use in solar cells.

Abstract: A thin film semiconductor device is provided which includes an insulating substrate, a Si thin film formed over the insulating substrate, and a transistor with the Si thin film as a channel thereof. The Si thin film includes a polycrystal where a plurality of narrow, rectangular crystal grains are arranged. A surface of the polycrystal is flat at grain boundaries thereof. Also, an average film thickness of the boundaries of crystals of the Si thin film ranges from 90 to 110% of an intra-grain average film thickness.

Abstract: The disclosed subject matter generally relates a method of irradiating a large area thin film with a pulsed light source. In some embodiments, the disclosed subject matter particularly relates to utilizing flash lamp annealing in combination with patterning techniques for making thin film devices. The flash lamp annealing can trigger lateral growth crystallization or explosive crystallization in large area thin films. In some embodiments, capping layers or proximity masks can be used in conjunction with the flash lamp annealing.

Abstract: Systems, methods, and products of processes consistent with the innovations herein relate to aspects involving crystallization of layers on substrates. In one exemplary implementation, there is provided a method of fabricating a device. Moreover, such method may include placing a seed layer on a base substrate, covering the seed layer with an amorphous/poly material, and heating the seed layer/material to transform the material into crystalline form.

Abstract: A semiconductor structure that includes a monocrystalline germanium-containing layer, preferably substantially pure germanium, a substrate, and a buried insulator layer separating the germanium-containing layer from the substrate. A porous layer, which may be porous silicon, is formed on a substrate and a germanium-containing layer is formed on the porous silicon layer. The porous layer may be converted to a layer of oxide, which provides the buried insulator layer. Alternatively, the germanium-containing layer may be transferred from the porous layer to an insulating layer on another substrate. After the transfer, the insulating layer is buried between the latter substrate and the germanium-containing layer.

Abstract: A crystalline material structure with reduced dislocation density and method of producing same is provided. The crystalline material structure is annealed at temperatures above the brittle-to-ductile transition temperature of the crystalline material structure. One or more stress elements are formed on the crystalline material structure so as to annihilate dislocations or to move them into less harmful locations.

Abstract: A laser method is provided for minimizing variations in transistor threshold voltages. The method supplies a wafer with a laser-crystallized active semiconductor film having a top surface with a first surface roughness. The method laser anneals the active semiconductor film, and in response to the laser annealing, melts the top surface of the active semiconductor film. The result is a top surface with a second roughness, less than the first roughness. More explicitly, the wafer active semiconductor film is crystallized using a laser with a first fluence, and then laser annealed with a second fluence, less than the first fluence. As compared with complementary metal-oxide-semiconductor field-effect (CMOSFET) thin-film transistor (TFT) structures formed in unprocessed regions of the active semiconductor film, the TFT threshold voltage standard deviation for TFTs in laser annealed portions of the active film are 60% less for n-channel and 30% less for p-channel TFTs.

Abstract: A method of forming a polysilicon film having smooth surface using a lateral growth and a step-and-repeat laser process. Amorphous silicon formed in a first irradiation region of a substrate is crystallized to form a first polysilicon region by a first laser shot. Then, the substrate is moved a predetermined distance, and irradiated by a second laser shot. The polysilicon region is then recrystallized and locally planarized by subsequent laser shots. After multiple repetitions of the irradiation procedure, the amorphous silicon film formed on a substrate is completely transformed into a polysilicon film. The polysilicon film includes lateral growth crystal grains and nano-trenches formed in parallel on the surface of the polysilicon film. A longitudinal direction of the nano-trenches is substantially perpendicular to a lateral growth direction of the crystal grains.

Abstract: An organic light emitting diode (OLED) display device having a pixel area and a pad area. The pad area includes a silicon layer pattern arranged on the substrate, an insulating layer arranged on the silicon layer pattern, an interconnection layer arranged on the insulating layer, and a protective layer surrounding an edge of the interconnection layer and having an opening exposing the interconnection layer. Since a surface area of the interconnection layer is increased due to a roughness of the underlying polycrystalline silicon layer pattern in the pad area, resulting in increased contact area and reduced contact resistance between parts configured to operate a flat panel display device and the interconnection layer is increased.

Abstract: The invention relates to a carrier for a thin layer and a method for the analysis of molecular interactions on and/or in such a thin layer. A thin layer disposed on a carrier is illuminated with electromagnetic radiation from at least one radiation source and a reflected radiation part on boundary surfaces of the thin layer is detected by means of an optoelectronic converter that converts the detected radiation into a frequency- and intensity-dependant photocurrent. A reading voltage is applied to the optoelectronic converter. By changing the reading voltage, the spectral sensitivity of the optoelectronic converter is varied such that a substantially constant photocurrent is obtained. Alternatively or in addition to varying the spectral sensitivity by changing the reading voltage, the reflected radiation part is detected with an optoelectronic converter that is designed as a sensor layer in the carrier.

Abstract: An electronically active sheet includes a bottom substrate having a bottom electrically conductive surface. A top substrate having a top electrically conductive surface is disposed facing the bottom electrically conductive surface. An electrical insulator separates the bottom electrically conductive surface from the top electrically conductive surface. At least one bare die electronic element is provided having a top conductive side and a bottom conductive side. Each bare die electronic element is disposed so that the top conductive side is in electrical communication with the top electrically conductive surface and so that the bottom conductive side is in electrical communication with the bottom electrically conductive surface.

Abstract: Example embodiments relate to a poly-crystalline silicon (Si) thin film, a thin film transistor (TFT) formed from a poly-crystalline silicon (Si) thin film and methods of manufacturing the same. The method of manufacturing the poly-crystalline Si thin film includes forming an active layer formed of amorphous Si on a substrate, coating a gold nanorod on the active layer, and irradiating infrared rays onto the gold nanorod to crystallize the active layer.

Abstract: An article includes a polycrystalline semiconductor layer having a plurality of single crystal crystallites of semiconductor material and a substrate having a melting or softening point of <200° C. supporting the semiconductor layer. An average grain size of the plurality of single crystal crystallites is less at an interface proximate to the substrate as compared to an average grain size in the semiconductor layer remote from the interface. The semiconductor layer is fused exclusive of any bonding agent or intermediate layer to the surface of the substrate.

Abstract: To provide a thin film transistor having a high field effect mobility and a small variation in characteristics thereof, a second amorphous semiconductor layer patterned in a predetermined shape is formed on a first crystalline semiconductor layer 17 for constituting source and drain regions. By irradiating an irradiated region 21 of continuous wave laser beam while scanning along a channel length direction, the second amorphous semiconductor layer is crystallized to form a second crystalline semiconductor layer 22. The first crystalline semiconductor layer 17 is crystallized by selectively adding nickel and therefore, an orientation rate of {111} is increased.

Abstract: Phosphorus is implanted into a crystalline semiconductor film by an ion dope method. However, a concentration of phosphorus required for gettering is 1×1020/cm3 or higher which hinders recrystallization by later anneal, and thus this becomes a problem. Also, when phosphorus is added at a high concentration, processing time required for doping is increased and throughput in a doping step is reduced, and thus this becomes a problem. The present invention is characterized in that impurity regions to which an element belonging to the group 18 of the periodic table is added are formed in a semiconductor film having a crystalline structure and gettering for segregating in the impurity regions a metal element contained in the semiconductor film is performed by heat treatment. Also, a one conductivity type impurity may be contained in the impurity regions.

Abstract: A method for fabricating semiconductor components includes the steps of providing a semiconductor substrate having a circuit side, a back side and integrated circuits and circuitry on the circuit side; thinning the substrate from the back side to a selected thickness; laser processing the back side of the thinned substrate to form at least one lasered feature on the back side; and dicing the substrate into a plurality of components having the lasered feature. The lasered feature can cover the entire back side or only selected areas of the back side, and can be configured to change electrical properties, mechanical properties or gettering properties of the substrate. A semiconductor component includes a thinned semiconductor substrate having a back side and a circuit side containing integrated circuits and associated circuitry. The semiconductor component also includes at least one lasered feature on the back side configured to provide selected electrical or physical characteristics for the substrate.

Abstract: Provided are oxide semiconductors and thin film transistors of the same. An oxide semiconductor includes Zn, In and Hf. The amount of Hf is in the range of about 2-16 at %, inclusive, based on the total amount of Zn, In, and Hf. A thin film transistor includes a gate and a gate insulating layer arranged on the gate. A channel corresponding to the gate is formed on the gate insulating layer. The channel includes an oxide semiconductor. The semiconductor oxide includes Zn, In and Hf. The amount of Hf is in the range of about 2-16 at %, inclusive, based on the total amount of Zn, In, and Hf. A source and a drain contact respective sides of the channel.

Abstract: A method of forming a localized SOI structure in a substrate (10) wherein a trench (18) is formed in the substrate, and a dielectric layer (20) is formed on the base of the trench (18). The trench is filled with semiconductor material (22) by means of epitaxial growth.

Abstract: An integrated circuit including a memory cell includes a vertical bipolar select device including a base and an emitter. The memory cell includes a resistive memory element coupled to the emitter and a buried metallized word line contacting the base.

Abstract: An indirect bandgap thin film semiconductor circuit can be combined with a compound semiconductor LED such as to provide an active matrix LED array that can have high luminous capabilities such as for a light projector application. In another example, a highly efficient optical detector is achievable through the combination of indirect and direct bandgap semiconductors. Applications can include display technologies, light detection, MEMS, chemical sensors, or piezoelectric systems. An LED array can provide structured illumination, such as for a light and pattern source for projection displays, such as without requiring spatial light modulation (SLM). An example can combine light from separate monolithic light projector chips, such as providing different component colors. An example can provide full color from a single monolithic light projector chip, such as including selectively deposited phosphors, such as to contribute individual component colors to an overall color of a pixel.

Abstract: A polycrystalline silicon thin film to be used in display devices, the thin film comprising adjacent primary grain boundaries that are not parallel to each other and do not contact each other, wherein an area surrounded by the primary grain boundaries is larger than 1 ?m2, a fabrication method of the polycrystalline silicon thin film, and a thin film transistor fabricated using the method.

Abstract: Example embodiments relate to a crystalline nanowire substrate having a structure in which a crystalline nanowire film having a relatively fine line-width may be formed on a substrate, a method of manufacturing the same, and a method of manufacturing a thin film transistor using the same. The method of manufacturing the crystalline nanowire substrate may include preparing a substrate, forming an insulating film on the substrate, forming a silicon film on the insulating film, patterning the insulating film and the silicon film into a strip shape, reducing the line-width of the insulating film by undercut etching at least one lateral side of the insulating film, and forming a self-aligned silicon nanowire film on an upper surface of the insulating film by melting and crystallizing the silicon film.

Abstract: The present invention provides a compound semiconductor epitaxial wafer and a fabrication method thereof, a first silicon buffer layer is deposited on a metal substrate, and then a second compound semiconductor buffer layer is deposited on the first silicon buffer layer, and a third compound semiconductor buffer layer is deposited on the second compound semiconductor buffer layer, and a first compound semiconductor epitaxial layer is crystallized on the third compound semiconductor buffer layer, and a first thermal treatment process is applied, and a second compound semiconductor epitaxial layer is crystallized on the first compound semiconductor epitaxial layer, and a second thermal treatment process is applied to obtain a good-quality compound semiconductor epitaxial wafer.

Abstract: A thin film transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate and including source and drain regions, each having a first metal catalyst crystallization region and a second metal catalyst crystallization region, and a channel region having the second metal catalyst crystallization region, a gate electrode disposed in a position corresponding to the channel region of the semiconductor layer, a gate insulating layer interposed between the semiconductor layer and the gate electrode to electrically insulate the semiconductor layer from the gate electrode, and source and drain electrodes electrically insulated from the gate electrode and electrically connected to the source and drain regions, respectively. An OLED display device includes the thin film transistor and a first electrode, an organic layer, and a second electrode electrically connected to the source and drain electrodes.

Abstract: A TFT and the like capable of realizing performances such as a low threshold voltage value, high carrier mobility and a low leak current easily. A TFT consists of a polycrystalline Si film having a small heat capacity part and a large heat capacity part, and the small heat capacity part is used at least as a channel part. The polycrystalline Si film is formed of a crystal grain film through laser annealing of an energy density with which the small heat capacity part melts completely but the large heat capacity part does not melt completely. Since the channel part is formed of large crystal grains grown from the boundaries between the small heat capacity part and the large heat capacity parts, it is possible to realize performances such as a low threshold voltage value, high carrier mobility and a low leak current by using a typical laser annealing device.

Abstract: A silicon nanowire substrate having a structure in which a silicon nanowire film having a fine line-width is formed on a substrate, a method of manufacturing the same, and a method of manufacturing a thin film transistor using the same. The method of manufacturing the silicon nanowire substrate includes preparing a substrate, forming an insulating film on the substrate, forming a silicon film on the insulating film, patterning the insulating film and the silicon film into a strip shape, reducing the line-width of the insulating film by undercut etching at least one lateral side of the insulating film, and forming a self-aligned silicon nanowire film on an upper surface of the insulating film by melting and crystallizing the silicon film.

Abstract: Methods and systems use laser pulses to process a selected structure on or within a semiconductor substrate. The structure has a surface, a width, and a length. The laser pulses propagate along axes that move along a scan beam path relative to the substrate as the laser pulses process the selected structure. The method simultaneously generates on the selected structure first and second laser beam pulses that propagate along respective first and second laser beam axes intersecting the selected structure at distinct first and second locations. The first and second laser beam pulses impinge on the surface of the selected structure respective first and second beam spots. Each beam spot encompasses at least the width of the selected link. The first and second beam spots are spatially offset from one another along the length of the selected structure to define an overlapping region covered by both the first and the second beam spots and a total region covered by one or both of the first and second beam spots.

Abstract: A process and system for processing a thin film sample are provided. In particular, a beam generator can be controlled to emit at least one beam pulse. The beam pulse is then masked to produce at least one masked beam pulse, which is used to irradiate at least one portion of the thin film sample. With the at least one masked beam pulse, the portion of the film sample is irradiated with sufficient intensity for such portion to later crystallize. This portion of the film sample is allowed to crystallize so as to be composed of a first area and a second area. Upon the crystallization thereof, the first area includes a first set of grains, and the second area includes a second set of grains whose at least one characteristic is different from at least one characteristic of the second set of grains. The first area surrounds the second area, and is configured to allow an active region of a thin-film transistor (“TFT”) to be provided at a distance therefrom.

Abstract: Disclosed are a crystallization pattern, and a method for crystallizing amorphous silicon. The method includes the steps of forming an amorphous silicon film on a glass substrate, forming a crystallization pattern by patterning the amorphous silicon film, and crystallizing the crystallization pattern into polycrystalline silicon by irradiating a laser onto the crystallization pattern. The crystallization pattern includes a peripheral region located within a first distance from an edge of the crystallization pattern, and an internal region located away from the edge of the crystallization pattern by more than the first distance. The internal region is divided into at least one sub-region, each sub-region includes one crystallization inducement pattern, and an edge of each sub-region is located within a second distance from the crystallization inducement pattern.

Abstract: There is provided a technique to form a single crystal semiconductor thin film or a substantially single crystal semiconductor thin film. A catalytic element for facilitating crystallization of an amorphous semiconductor thin film is added to the amorphous semiconductor thin film, and a heat treatment is carried out to obtain a crystalline semiconductor thin film. After the crystalline semiconductor thin film is irradiated with ultraviolet light or infrared light, a heat treatment at a temperature of 900 to 1200° C. is carried out in a reducing atmosphere. The surface of the crystalline semiconductor thin film is extremely flattened through this step, defects in crystal grains and crystal grain boundaries disappear, and the single crystal semiconductor thin film or substantially single crystal semiconductor thin film is obtained.

Abstract: A polycrystalline silicon plate has grain boundary lines on a surface thereof, and at least one of the grain boundary lines is a quasi-linear grain boundary line (1). The silicon plate is used to produce a solar cell. The silicon plate is formed using a base substrate having an irregular surface provided with dotted or linear protrusions, which makes it possible to control the grain boundary lines. As such, an inexpensive and high-quality silicon plate can be provided. Further, by employing this silicon plate to produce a solar cell, an inexpensive and high-quality solar cell can be provided as well.

Abstract: Seeds are implanted in a regular pattern upon an undersubstrate. An AlxInyGa1?x?yN (0?x?1, 0?y?1, 0<x+y?1) mixture crystal is grown on the seed implanted undersubstrate by a facet growth method. The facet growth makes facet pits above the seeds. The facets assemble dislocations to the pit bottoms from neighboring regions and make closed defect accumulating regions (H) under the facet bottoms. The closed defect accumulating regions (H) arrest dislocations permanently. Release of dislocations, radial planar defect assemblies and linear defect assemblies are forbidden. The surrounding accompanying low dislocation single crystal regions (Z) and extra low dislocation single crystal regions (Y) are low dislocation density single crystals.

Abstract: The present invention provides a manufacturing method of a high performance active matrix substrate at a high throughput with a less expensive apparatus, and an image display device using the active matrix substrate. On a stage moving in the short axis direction X and long axis direction Y on a rail, a glass substrate is carried, which has an amorphous silicon semiconductor film formed. Polycrystallized and large grain silicon film may be obtained by intensity modulating the pulsed laser beam in a line beam shape by means of a phase shift mask with a periodicity in the long axis direction Y of the laser beam, moving the laser beam randomly in the modulation direction of the amorphous silicon semiconductor film formed on the glass substrate to expose to crystallize the film. The image display device may incorporate an active matrix substrate having active elements such as thin film transistors formed by this silicon film.

Abstract: A sequential lateral solidification (SLS) mask comprises a plurality of parallelizing repeat patterns. Each of the patterns further comprises a major symmetrical axis and a short axis, and each of the patterns is also composed of first units and second units, in which both the first unit and the second unit comprise respectively a plurality of light transmitting portions and light absorption portions. The first units are positioned in mirror symmetry to the second units via the major symmetrical axis.

Abstract: A method for manufacturing wafers using a low EPD crystal growth process and a wafer annealing process is provided that results in GaAs/InGaP wafers that provide higher device yields from the wafer.

Abstract: A system, method and masking arrangement are provided of enhancing the width of polycrystalline grains produced using sequential lateral solidification using a modified mask pattern is disclosed. One exemplary mask pattern employs rows of diamond or circular shaped areas in order to control the width of the grain perpendicular to the direction of primary crystallization.

Abstract: In accordance with one aspect, the present invention provides a method for providing polycrystalline films having a controlled microstructure as well as a crystallographic texture. The methods provide elongated grains or single-crystal islands of a specified crystallographic orientation. In particular, a method of processing a film on a substrate includes generating a textured film having crystal grains oriented predominantly in one preferred crystallographic orientation; and then generating a microstructure using sequential lateral solidification crystallization that provides a location-controlled growth of the grains orientated in the preferred crystallographic orientation.

Abstract: A method for fabricating polysilicon film is disclosed. First, a first substrate is provided, wherein a plurality of sunken patterns has been formed on the front surface of the first substrate. Then, a second substrate is provided and an amorphous polysilicon film is formed on the second substrate. Next, the amorphous polysilicon film formed on the second substrate is in contact with the front surface of the first substrate. The amorphous polysilicon film is transferred into a polysilicon film by performing an annealing process. Then, the first substrate and the second substrate are separated from each other. This method reduces the cost and the time for fabricating polysilicon film.