Abstract: Seeds are implanted in a regular pattern upon an undersubstrate. An AlxInyGa1-x-yN (0?x?1, 0?y?1, 0<x+y?1) mixture crystal is grown on the seed implanted undersubstrate by a facet growth method. The facet growth makes facet pits above the seeds. The facets assemble dislocations to the pit bottoms from neighboring regions and make closed defect accumulating regions (H) under the facet bottoms. The closed defect accumulating regions (H) arrest dislocations permanently. Release of dislocations, radial planar defect assemblies and linear defect assemblies are forbidden. The surrounding accompanying low dislocation single crystal regions (Z) and extra low dislocation single crystal regions (Y) are low dislocation density single crystals.

Abstract: The irregularities of characteristics of a pair of transistors, which are prepared by a pseudo single crystallizing technique, are reduced. To achieve this, semiconductor layers are formed on a substrate and have pseudo single crystal regions therein, and a plurality of thin film transistors are arranged inside of the pseudo single crystal regions. Two or more of the plurality of thin film transistors, which are required to exhibit small irregularities relative to each other as characteristics thereof, have the direction of the length of the gates of the respective thin film transistors arranged at an inclination of within ±20 degree with respect to the longitudinal direction of the strip-like grown crystals, and they are arranged such that, when channel regions of respective thin film transistors are imaginarily extended in parallel to the growth direction of the strip-like grown crystals, at least portions of the channel regions are superposed on each other.

Abstract: A magnetic sensor using efficient injection of spin polarized electrons at room temperature can be fabricated by forming a semiconductor layer sandwiched between ferromagnets and forming ?-doped layers between the semiconductor layer and the ferromagnets. A sensing method applies a magnetic field to be measured to the semiconductor layer and observes the conductivity of the sensor. The sensing techniques can achieve high magneto-sensitivity and very high operating speed, which in turn provides ultra fast and sensitive magnetic sensors.

Abstract: A magnetic sensor based on efficient spin injection of spin-polarized electrons from ferromagnets into semiconductors and rotation of electron spin under a magnetic field. Previous spin injection structures suffered from very low efficiency (less than 5). A spin injection device with a semiconductor layer sandwiched between ?-doped layers and ferromagnets allows for very high efficient (close to 100%) spin polarization to be achieved at room temperature, and allows for high magneto-sensitivity and very high operating speed, which in turn allows devising ultra fast and sensitive magnetic sensors.

Abstract: A display device includes a display area composed of pixels in a matrix. Each pixel has a light-emitting element and a driving element to supply a driving current to the light-emitting element. The driving element includes a thin film transistor with a semiconductor layer of a poly-crystalline film. The semiconductor layer is provided with channel region, and a source and drain region disposed on both sides of the channel region. The channel region connects the source region to the drain region and has at least two conductive regions with different average grain sizes. The characteristics of the driving elements are made substantially uniform so that the display quality of the display device can be improved remarkably.

Abstract: Disclosed are a spin injection device applicable as a memory and a logical device using a spin valve effect obtained by injecting a carrier spin-polarized from a ferromagnet into a semiconductor at an ordinary temperature, and a spin-polarized field effect transistor.

Abstract: A method of manufacturing a thin-film solar cell, comprising the steps of: forming an amorphous silicon film on a substrate; placing a metal element that accelerates the crystallization of silicon in contact with the surface of the amorphous silicon film; subjecting the amorphous silicon film to a heat treatment to obtain a crystalline silicon film; depositing a silicon film to which phosphorus has been added in contact with the crystalline silicon film; and subjecting the crystalline silicon film and the silicon film to which phosphorus has been added to a heat treatment to getter the metal element from the crystalline film.

Abstract: A polycrystalline silicon plate has grain boundary lines on a surface thereof, and at least one of the grain boundary lines is a quasi-linear grain boundary line. The silicon plate is used to produce a solar cell. The silicon plate is formed using a base substrate having an irregular surface provided with dotted or linear protrusions, which makes it possible to control the grain boundary lines. As such, an inexpensive and high-quality silicon plate can be provided. Further, by employing this silicon plate to produce a solar cell, an inexpensive and high-quality solar cell can be provided as well.

Abstract: A 3 group–5 group compound ferromagnetic semiconductor, comprising one material ‘A’ selected from the group of Ga, Al and In and one material ‘B’ selected from the group consisting of N and P, wherein one material ‘C’ selected from the group consisting of Mn, Mg, Co, Fe, Ni, Cr and V is doped as a material for substituting the material ‘A’, the compound semiconductor has a single phase as a whole. The ferromagnetic semiconductor can be fabricated by a plasma-enhance molecular beam epitaxy growing method and since it shows the ferromagnetic characteristics at a room temperature, it can be applied as various spin electron devices.

Abstract: A silicon film is crystallized in a predetermined direction by selectively adding a metal element having a catalytic action for crystallizing an amorphous silicon and annealing. In manufacturing TFT using the crystallized silicon film, TFT provided such that the crystallization direction is roughly parallel to a current-flow between a source and a drain, and TFT provided such that the crystallization direction is roughly vertical to a current-flow between a source and a drain are manufactured. Therefore, TFT capable of conducting a high speed operation and TFT having a low leak current are formed on the same substrate.

Abstract: In a fabrication process of a semiconductor device for use in a TFT liquid crystal display system, before the start of crystallizing amorphous silicon (a-Si), dehydrogenation annealing is carried out to not only decrease the density of hydrogen in the p-Si film (13) to 5×1020 atoms/cm3 at most but also to prevent crystallization of the a-Si film (13) being obstructed due to possible excessive hydrogen remaining in the film. With the p-Si film (13) covered with an interlayer insulation film (15) in the form of a plasma nitride film, annealing is then carried out in nitrogen atmosphere at a temperature of 350° C. to 400° C. for one to three hours, more preferably 400° C. for two hours. The result is that hydrogen atoms in the p-Si film (13) efficiently terminate dangling bonds of the film and hence do not become excessive, thus improving the electrical characteristics of the semiconductor device.

Abstract: A thin film transistor including: an insulating layer; a gate electrode; a semiconductor layer including coalesced structurally ordered polymer aggregates of a self-organizable polymer, wherein the self-organizable polymer is of a type capable of gelling; a source electrode; and a drain electrode, wherein the insulating layer, the gate electrode, the semiconductor layer, the source electrode, and the drain electrode are in any sequence as long as the gate electrode and the semiconductor layer both contact the insulating layer, and the source electrode and the drain electrode both contact the semiconductor layer.

Abstract: A method for processing integrated circuit devices. The method includes providing a monitor wafer, which comprising a silicon material. The method introduces a plurality of particles within a depth of the silicon material. The plurality of particles have a reduced activation energy within the silicon material. The method subjects the monitor wafer including the plurality of particles into a rapid thermal anneal process. The method includes applying the rapid thermal anneal process at a first state including a first temperature. The first temperature is within a range defined as a low temperature range, which is less than 650 Degrees Celsius. The method includes removing the monitor wafer and measuring a sheet resistivity of the monitor wafer. The method also determines the first temperature within a tolerance of less than 2 percent across the monitor wafer.

Abstract: A bottom-gate thin-film transistor includes a gate electrode, a gate insulating film, an active layer, and a protective insulating film deposited in that order on a substrate. The protective insulating film has a thickness of 100 nm or less, and the protective insulating film is formed on any one of the active layer, and LDD region, and a source-drain region. A method for making a bottom-gate thin-film transistor, a liquid crystal display device including a TFT substrate using the bottom-gate thin-film transistor and a method for fabricating the same, and an organic EL device including the bottom-gate thin-film transistor and a method for fabricating the same are also disclosed.

Abstract: A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition.

Abstract: A method of forming a periodic index of refraction pattern in a superlattice of a solid material to achieve photonic bandgap effects at desired optical wavelengths is disclosed. A plurality of space group symmetries, including a plurality of empty-spaced buried patterns, are formed by drilling holes in the solid material and annealing the solid material to form empty-spaced patterns of various geometries. The empty-spaced patterns may have various sizes and may be formed at different periodicities, so that various photonic band structures can be produced for wavelength regions of interest.

Abstract: This invention concerns with a semiconductor device which is characterized in that the device is provided with a thin film transistor 40 having a polycrystalline semiconductor layer 11, the semiconductor layer 11 including a channel area 22, highly doped drain areas 24, 17 positioned on both sides of the channel area 22 and LDD areas 18a, 18b positioned between the channel area 22 and the highly doped drain areas 24, 17 and lower in dopant density than the highly doped drain areas 24, 17, wherein any diameter of the crystal 14 at least partly existing in the LDD area 18b is larger than the size of other crystals 15.

Abstract: An electronic apparatus employs a polycrystalline semiconductor thin film structure formed of an insulating substrate and a plurality of polycrystalline layers laminated on the insulating substrate. A plurality of transistors are formed at the surface of the polycrystalline semiconductor thin film structure, each transistor being formed in a region of one of a plurality of crystal grains disseminated on the surface of the polycrystalline layers. A number of crystal grains in each of the polycrystalline layers is gradually reduced from a lower layer to an upper layer.

Abstract: A metallic element is effectively removed from a semiconductor film crystallized by using the metallic element. The concentration distribution of phosphorous or antimony in the depth direction of at least one of a source and a drain of a TFT semiconductor film has: a region in which the concentration is 1×1020 atoms/cm3 or less is 5 nm or greater in thickness, and 5×1019 atoms/cm3 or greater in the maximum value. By creating this concentration distribution, and by thermal annealing at about between 500 and 650° C., the metallic element within a channel forming region diffuses to the source or the drain, and at the same time as gettering is accomplished, the region in which the concentration is 1×1020 atoms/cm3 or less is made into a nucleus and the source region/drain region is recrystallized.

Abstract: A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.

Abstract: The present invention relates to a structure and a fabrication method of a storage capacitor used in the pixel region of a display panel such as LCD or OELD. The present invention simultaneously forms a poly-crystalline silicon TFT and a storage capacitor in the pixel region of a display panel using MILC phenomena. By applying MILC inducing metal along at least two edges of storage capacitor, the time required to crystallize the silicon layer in storage capacitor region may be significantly reduced.

Abstract: Sequential lateral solidification (SLS) crystallization of amorphous silicon using a mask having striped light transmitting portions. An amorphous silicon bearing substrate is located in an SLS apparatus. The amorphous silicon film is functionally divided into a driving region (for driving devices) and a display region (for TFT switches). Part of the driving region is crystallized by a laser that passes through the mask. The mask is then moved relative to the substrate by a translation distance that is less than half the width of the light transmitting portions. Thereafter, subsequent crystallizations are performed to crystallize the driving region. Then, part of the display region is crystallized by a laser that passes through the mask. The mask is then moved relative to the substrate by a translation distance that is more than half the width of the light transmitting portions. Thereafter, subsequent crystallizations are performed to crystallize the display region.

Abstract: To a polycrystalline silicon layer crystallized by irradiation with laser light, a mixed gas comprised of ozone gas and H2O or N2O gas is fed at a processing temperature of 500° C. or below, or the polycrystalline silicon layer is previously treated with a solution such as ozone water or an aqueous NH3/hydrogen peroxide solution, followed by oxidation treatment with ozone, to form a silicon oxide layer with a thickness of 4 nm or more at the surface of the polycrystalline silicon layer for forming a thin-film transistor having characteristics that are less varying on a glass substrate previously not annealed.

Abstract: A thin-film transistor is formed by a polycrystalline silicon film having a thin-film part and a thick-film part, the thin-film part minimally being used as a channel part. The polycrystalline silicon film is formed by laser annealing with an energy density that completely melts the thin-film part but does not completely melt the thick-film part. Because large coarse crystal grains growing from the boundary between the thin-film part and the thick-film part form the channel part, it is possible to use a conventional laser annealing apparatus to easily achieve high carrier mobility and low leakage current and the like.

Abstract: The present invention provides a thin film semiconductor element which is small in area with high on-current enough to be suitable for the power saving, miniaturization, and high definition display of a device. According to the present invention, an outer shape of a semiconductor thin film is processed and regions (a channel region, a source region, and a drain region) in the semiconductor thin film are formed by using, as masks, other element components such as a gate electrode. Specifically, ion-implanted regions are formed by implanting impurity ions into predetermined regions of the semiconductor thin film using, as a mask, the gate electrode overlapped on the thin film via an insulation film. Thereafter, the semiconductor is processed into a predetermined shape by etching using, as masks, previously formed element components such as the gate electrode.

Abstract: A semiconductor device with which a panel having a large area or a narrowly margined with the circumferential space minimized can be manufactured stably with a high yield. The semiconductor device comprises a TFT substrate having a plurality of pixels of a plurality of TFT (thin film transistors) provided on the substrate in which a peripheral wire is arranged along the outer periphery of the TFT substrate and connected to a constant potential.

Abstract: A magnetic sensor based on efficient spin injection of spin-polarized electrons from ferromagnets into semiconductors and rotation of electron spin under a magnetic field. Previous spin injection structures suffered from very low efficiency (less than 5%). A spin injection device with a semiconductor layer sandwiched between &dgr;-doped layers and ferromagnets allows for very high efficient (close to 100%) spin polarization to be achieved at room temperature, and allows for high magneto-sensitivity and very high operating speed, which in turn allows devising ultra fast and sensitive magnetic sensors.

Abstract: An object is to enhance the orientation ratio of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film while using as a substrate a less-heat-resistive material such as glass thereby. providing a semiconductor device using a crystalline semiconductor film with high quality equivalent to a single crystal. A first crystalline semiconductor film and a second crystalline semiconductor film are formed overlying a substrate, which integrally structure a crystalline semiconductor layer. The first and second crystalline semiconductor films are polycrystalline bodies aggregated with a plurality of crystal grains. However, the crystal grains are aligned toward a (101)-plane orientation at a ratio of 30 percent or greater, preferably 80 percent or greater.

Abstract: A method of irradiation of plural pulse laser beams onto one position of a non-single crystal semiconductor, wherein the pulse laser beams are not higher in energy density than an energy density threshold value necessary for causing a micro-crystallization of the non-single crystal semiconductor.

Abstract: A gate-overlap-drain structure is obtained by a single pair of a single impurity implantation process and a single laser anneal process, wherein the improved gate-overlap-drain structure includes lightly activated high impurity concentration regions exhibiting substantially the same function as the lightly doped drain regions, wherein the lightly activated high impurity concentration regions are bounded with high impurity concentration regions serving as source and drain regions. The boundaries are self-aligned to edges of a gate electrode. Side regions of the gate electrode overlap the lightly activated high impurity concentration regions.

Abstract: Concave and convex are formed on the substrate 1, the amorphous silicon layer 4 is formed on the metallic catalyst 3 dispersed and arranged in a dotted shape in the concave portion of the concave and convex, the crystal phases 5 having respective orientations from the metallic catalyst 3 are grown, further the crystal phases 5 are integrated with each other by continuing heat treatment and the polycrystalline silicon layer 6 is formed. A crystalline silicon semiconductor device and its method for fabrication which are costly advantageous and capable of efficiently forming the polycrystalline silicon layer of a predetermined thickness needed as a semiconductor device are provided.

Abstract: An efficient spin injection into semiconductors. Previous spin injection devices suffered from very low efficiency (less than 2% at room temperature) into semiconductors. A spin injection device with a &dgr;-doped layer placed between a ferromagnetic layer and a semiconductor allows for very high efficient (close to 100%) spin injection to be achieved at room temperature.

Abstract: Nickel is selectively held in contact with a particular region of an amorphous silicon film. Crystal growth parallel with a substrate is effected by performing a heat treatment. A thermal oxidation film is formed by performing a heat treatment in an oxidizing atmosphere containing a halogen element. During this step, the crystallinity is improved and the gettering of nickel elements proceeds. A thin-film transistor is formed so that the direction connecting source and drain regions coincides with the above crystal growth direction. As a result, a TFT having superior characteristics such as a mobility larger than 200 cm2/Vs and an S value smaller than 100 mV/dec. can be obtained.

Abstract: In a method for manufacturing a semiconductor device and devices formed thereby, a semiconductor material layer (e.g., amorphous silicon or microcrystallized silicon film) is formed on a substrate. At least a region of the semiconductor material layer is irradiated with a laser for heating and melting the semiconductor material in the region. The manufacturing method is controlled to promote uniform cooling of the semiconductor material in the irradiated region. Uniform cooling of the semiconductor material after irradiation is promoted so that, after irradiation, a desirable polycrystalline microstructure is formed in the semiconductor material layer by lateral solidification from a boundary of the region.

Abstract: Semiconductor crystal grains are formed by metal-induced lateral crystallisation. The positions of the grain boundaries normal to the crystallisation direction are controlled, to position the grains correctly for subsequent formation of electronic devices within them. In a first technique, the grains are positioned by depositing the metal in short strips which each induce the crystallisation of a single corresponding grain. In a second technique, the grains are positioned by pre-patterning the amorphous silicon which is used to form the grains. Electronic circuit elements can be formed in each grain. The resultant structure can be used in a microelectronic mechanical system. Several grains can be formed successively and circuit elements formed in each layer to form a three-dimensional integrated circuit.

Abstract: High quality epitaxial layers of monocrystalline materials (26) can be grown overlying monocrystalline substrates (22) such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer (24) comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer (28) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Some preferred electronic devices are described that use a layer or pattern of a perovskite cuprate (2125, 2305, 2310, 2315, 2405) such as YBa2Cu3O7−y(YBCO) or Y1−xPrxBa2Cu3O7−y(YPBCO, 0<x<1) over a buffer layer (2120) of lanthanum strontium aluminum tantalate (LSAT).

Abstract: A polycrystalline silicon thin film for a TFT and a display device using the same where the number of crystal grain boundaries exerts a fatal influence on movement of electric charge carrier, providing a distance “S” between active channels of the TFT having dual or multiple channels with a relation S=mGs·sec &thgr;−L, and also providing a display device in which uniformity of TFT characteristics is improved by synchronizing the number of the crystal grain boundaries included in each of the channels of the dual or multiple channels S=mGs·sec &thgr;−L Gs is a size of crystal grains of the polycrystalline silicon thin film, m is an integer of 1 or more, &thgr; is an inclined angle where fatal crystal grain boundaries, that is, “primary” crystal grain boundaries are inclined in a direction perpendicular to an active channel direction, and L represents a length of active channels for each TFT having dual or multiple channels.

Abstract: A thin film transistor and its fabrication method. The transistor includes a buffer layer on a substrate, and a poly-crystalline semiconductor layer on the buffer layer. The poly-crystalline semiconductor layer includes a channel layer, offset regions along sides of the channel layer, sequential doping regions along sides of the offset regions, and source and drain regions. The doping concentration is sequentially changed in the sequential doping region. A sloped gate insulation layer is on the poly-crystalline semiconductor layer. A gate electrode having a main gate electrode and auxiliary gate electrodes is on the sloped insulation layer. An interlayer is over the gate electrode and source and drain electrodes are formed in contact with the source and drain regions and on the interlayer. The poly-crystalline semiconductor layer is formed by ion doping a poly-crystalline semiconductor layer through the gate insulation layer while using the gate electrode as a mask.

Abstract: The present invention discloses a TFT array substrate (and method for making the same) having the large storage capacitance for use in a liquid crystal display device. In a four-mask process, the conventional storage capacitor of the TFT array substrate includes the capacitor electrodes and the insulation layer and semiconductor layer as a dielectric layer. However, the present invention includes the capacitor electrodes and the insulation layer as a dielectric layer so that the thickness of the dielectric layer becomes thinner. Therefore, much more electric charges can be stored in the storage capacitor. That means the liquid crystal display device can have a high picture quality and a high definition. Moreover, the present invention has a structure that can achieve the high manufacturing yield.

Abstract: A plurality of linear catalytic metal element portions are arranged at predetermined intervals just on or just beneath an amorphous silicon layer, and, in this state, the amorphous silicon layer is heat treated to crystallize the amorphous silicon layer and consequently to form a polycrystalline silicon layer. This construction can realize the provision of a method for the formation of an evenly oriented, high-quality crystalline silicon layer in a large area, and a crystalline silicon semiconductor device produced by this method.

Abstract: A practical operational amplifier circuit is formed using thin film transistors. An operational amplifier circuit is formed by thin film transistors formed on a quartz substrate wherein 90% or more of n-channel type thin film transistors have mobility at a value of 260 cm2/Vs or more and wherein 90% or more of p-channel type thin film transistors have mobility at a value of 150 cm2/Vs or more. The thin film transistors have active layers formed using a crystalline silicon film fabricated using a metal element that promoted crystallization of silicon. The crystalline silicon film is a collection of a multiplicity of elongate crystal structures extending in a certain direction, and the above-described characteristics can be achieved by matching the extending direction and the moving direction of carriers.

Abstract: To provide a TFT that can operate at a high speed by forming a crystalline semiconductor film while controlling the position and the size of a crystal grain in the film to use the crystalline semiconductor film for a channel forming region of the TFT. Instead of a metal or a highly heat conductive insulating film, only a conventional insulating film is used as a base film to introduce a temperature gradient. A level difference of the base insulating film is provided in a desired location to generate the temperature distribution in the semiconductor film in accordance with the arrangement of the level difference. The starting point and the direction of lateral growth are controlled utilizing the temperature distribution.

Abstract: An a-Si film 12 is formed on the whole surface of a quartz substrate 11, and a protection film 13 is formed in a region to be used as a display unit on the a-Si film 12. Subsequently, after a catalyst metal is selectively introduced into the whole surface of a region to be used as a peripheral drive circuit on the a-Si film 12, crystal growth is allowed by heating the a-Si film 12 to form a CG silicon film 14 and a p-Si film 15. Then, the catalyst metal in the CG silicon film 14 and the p-Si film 15 is removed by gettering. The concentration of the catalyst metal in the CG silicon film 14 is in the range of 1×1013 atoms/cm13 or higher and lower than 1×1015 atoms/cm3. The concentration of the catalyst metal in the p-Si film for a display unit 15 is made lower than the concentration of the catalyst metal in the CG silicon film 14b for a peripheral drive circuit.

Abstract: A semiconductor device using a crystalline semiconductor film is manufactured. The crystalline semiconductor film is formed by providing an amorphous silicon film with a catalyst metal for promoting a crystallization thereof and then heated for performing a thermal crystallization, following which the crystallized film is further exposed to a laser light for improving the crystallinity. The concentration of the catalyst metal in the semiconductor film and the location of the region to be added with the catalyst metal are so selected in order that a desired crystallinity and a desired crystal structure such as a vertical crystal growth or lateral crystal growth can be obtained. Further, active elements and driver elements of a circuit substrate for an active matrix type liquid crystal device are formed by such semiconductor devices having a desired crystallinity and crystal structure respectively.

Abstract: There is provided a flexible circuit module, including at least one rigid carrier, at least one solid state device mounted over a first side of the at least one rigid carrier, a flexible base supporting a second side of the at least one rigid carrier, a conductive interconnect pattern on the flexible base, and a plurality of feed through electrodes extending from the first side to the second side of the at least one rigid carrier and electrically connecting the conductive interconnect pattern with the at least one of a plurality of the solid state devices. The solid state devices may be LED chips to form an LED array module.

Abstract: A method and structure for crystallizing film is disclosed. The method includes the steps of forming a film on a substrate, forming a lens on the film to focus an electromagnetic wave on the film and directing the electromagnetic wave on the film inclusive of the lens to crystallize the film.

Abstract: A method is provided to optimize the channel characteristics of thin film transistors (TFTs) on polysilicon films. The method is well suited to the production of TFTs for use as drivers on liquid crystal display devices. Regions of polycrystalline silicon can be formed with different predominant crystal orientations. These crystal orientations can be selected to match the desired TFT channel orientations for different areas of the device. The crystal orientations are selected by rotating a mask pattern to a different orientation for each desired crystal orientation. The mask is used in connection with lateral crystallization ELA processes to crystallize deposited amorphous silicon films.

Abstract: A method of forming a periodic index of refraction pattern in a superlattice of a solid material to achieve photonic bandgap effects at desired optical wavelengths is disclosed. A plurality of space group symmetries, including a plurality of empty-spaced buried patterns, are formed by drilling holes in the solid material and annealing the solid material to form empty-spaced patterns of various geometries. The empty-spaced patterns may have various sizes and may be formed at different periodicities, so that various photonic band structures can be produced for wavelength regions of interest.

Abstract: Directionally solidified, multicrystalline silicon having a low proportion of electrically active grain borders, its manufacturing and utilisation, as well as solar cells comprising said silicon and a method of manufacturing said cells.

Abstract: System and methods for processing an amorphous silicon thin film sample into a single or polycrystalline silicon thin film are disclosed.