Including Polysiloxane (e.g., Silicone Resin) Patents (Class 257/791)
  • Patent number: 7781794
    Abstract: The present invention provides a resin sheet for encapsulating an optical semiconductor element, the resin sheet containing an encapsulation resin layer, an adhesive resin layer, a metal layer and a protective resin layer, in which the encapsulation resin layer and the metal layer adhered onto the adhesive resin layer are disposed adjacently to each other, the protective resin layer is laminated on the encapsulation resin layer and the metal layer so as to cover both the encapsulation resin layer and the metal layer, and the encapsulation resin layer has a taper shape expanding toward the protective resin layer; and an optical semiconductor device containing an optical semiconductor element encapsulated by using the resin sheet. The optical semiconductor element encapsulation resin sheet of the invention can be suitably used for back lights of liquid crystal screens, traffic signals, large-sized outdoor displays, billboards and the like.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: August 24, 2010
    Assignee: Nitto Denko Corporation
    Inventors: Ichiro Suehiro, Kouji Akazawa, Hideyuki Usui
  • Patent number: 7781900
    Abstract: One aspect of the invention relates to a semiconductor device including a housing and a semiconductor chip partly embedded in a plastic housing composition. Another aspect relates to a method for producing the same. The plastic housing composition has at least one host component having a softening temperature and an incorporated component having a phase change temperature. In this case, the softening temperature of the host component is greater than the phase change temperature of the incorporated component.
    Type: Grant
    Filed: June 9, 2005
    Date of Patent: August 24, 2010
    Assignee: Infineon Technologies AG
    Inventors: Manuel Carmona, Anton Legen, Ingo Wennemuth
  • Patent number: 7777356
    Abstract: A modified polyaluminosiloxane obtained by treating a polyaluminosiloxane with a silane coupling agent represented by the formula (I): wherein each of R1, R2 and R3 is independently an alkyl group or an alkoxy group; X is a methacryloxy group, a glycidoxy group, an amino group, a vinyl group or a mercapto group, with proviso that at least two of R1, R2 and R3 are alkoxy groups. The photosemiconductor element encapsulating material of the present invention is suitably used for, for example, photosemiconductor devices mounted with blue or white LED elements (backlights for liquid crystal displays, traffic lights, outdoor big displays, advertisement sign boards, and the like).
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: August 17, 2010
    Assignee: Nitto Denko Corporation
    Inventors: Hiroyuki Katayama, Kouji Akazawa
  • Publication number: 20100148378
    Abstract: The present invention relates to a thermosetting silicone resin composition including a condensation reactable substituent group-containing silicon compound and an addition reactable substituent group-containing silicon compound; a silicone resin; a silicone resin sheet obtained from the thermosetting silicone resin composition or the silicone resin, and a use thereof.
    Type: Application
    Filed: December 11, 2009
    Publication date: June 17, 2010
    Applicant: NITTO DENKO CORPORATION
    Inventors: Hiroyuki KATAYAMA, Kazuya FUJIOKA
  • Publication number: 20100123259
    Abstract: A photosensitive resin composition comprising a photosensitive silicone compound of specified molecular weight having any of specified photosensitive substituents and a photopolymerization initiator in any of specified proportions is used. Thus, there can be obtained a resin composition containing a photosensitive silicone compound that provides a material suitable for a rewiring layer or a buffer coat material of LSI chip, less in a film loss between before and after curing and improved in the stickiness of pre-exposure stage. Further, there can be obtained a resin insulating film utilizing the resin composition.
    Type: Application
    Filed: March 25, 2008
    Publication date: May 20, 2010
    Inventor: Tomohiro Yorisue
  • Patent number: 7682977
    Abstract: This invention includes methods of forming trench isolation. In one implementation, isolation trenches are provided within a semiconductor substrate. A liquid is deposited and solidified within the isolation trenches to form a solidified dielectric within the isolation trenches. The dielectric comprises carbon and silicon, and can be considered as having an elevationally outer portion and an elevationally inner portion within the isolation trenches. At least one of carbon removal from and/or oxidation of the outer portion of the solidified dielectric occurs. After such, the dielectric outer portion is etched selective to and effective to expose the dielectric inner portion. After the etching, dielectric material is deposited over the dielectric inner portion to within the isolation trenches.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: March 23, 2010
    Assignee: Micron Technology, Inc.
    Inventor: Li Li
  • Patent number: 7682878
    Abstract: An assembly for a circuit board includes a substrate, at least one circuit component formed on the substrate, and a frame. The frame comprises a first substantially planar surface attached to the substrate, and a hole formed through the frame and defined by a wall that surrounds the at least one circuit component. A method of manufacturing the circuit board includes the step of attaching the substantially planar surface of the frame to the substrate in an arrangement in which the at least one circuit component is surrounded by a wall that defines the hole.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: March 23, 2010
    Assignee: Medtronic, Inc.
    Inventors: David A. Ruben, Scott B. Sleeper, Peter C. Tortorici
  • Patent number: 7674865
    Abstract: An epoxy resin composition for photosemiconductor element encapsulation, which is excellent in both light transmissibility and low stress property, as well as light resistance against short wavelength light (for example, 350 to 500 nm), is provided. The epoxy resin composition for photosemiconductor element encapsulation, which comprises the following components (A) to (C): (A) an epoxy resin, (B) an acid anhydride curing agent, and (C) a specific silicone resin.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: March 9, 2010
    Assignee: Nitto Denko Corporation
    Inventor: Hisataka Ito
  • Patent number: 7667182
    Abstract: A semiconductor photodetector which can obtain spectral sensitivity characteristics close to relative luminous characteristics compared to a conventional semiconductor photodetector is obtained at low cost. The semiconductor photodetector includes a semiconductor light receiving element having high spectral sensitivity in wavelengths in a range from approximately 400 nm to 1,100 nm and an optical transmitting resin where micro particles is dispersed in a transparent resin with an amount which can be obtain photocurrent from the semiconductor light receiving element by transmitting light in wavelengths in the visible light region while blocking light in wavelengths in the infrared region. The semiconductor photodetector further includes a converging structure on a light receiving surface of the semiconductor photodetector.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: February 23, 2010
    Assignee: New Japan Radio Co., Ltd.
    Inventors: Daisuke Nakamura, Haruo Fukawa, Fumio Takamura
  • Publication number: 20100019399
    Abstract: Disclosed is a polyorganosiloxane composition containing the following components (a)-(c). (a) 100 parts by mass of a polyorganosiloxane obtained by mixing at least one silanol compound represented by the general formula (1) below, at least one alkoxysilane compound represented by the general formula (2) below, and at least one catalyst selected from the group consisting of compounds represented by the general formula (3) below, compounds represented by the general formula (4) below and Ba(OH)2, and polymerizing the mixture without actively adding water thereinto [chemical formula 1] R2Si(OH)2 (1) [chemical formula 2] R?Si(OR?)3 (2) (chemical formula 3] M(OR??)4 (3) [chemical formula 4] M?(OR??)3 (4) (b) 0.1-20 parts by mass of a photopolymerization initiator (c) 1-100 parts by mass of a compound other than the component (a) having two or more photopolymerizable unsaturated bonding groups.
    Type: Application
    Filed: September 28, 2007
    Publication date: January 28, 2010
    Inventors: Masashi Kimura, Masato Mikawa, Hideyuki Fujiyama, Takaaki Kobayashi, Tomohiro Yorisue
  • Patent number: 7642661
    Abstract: A liquid epoxy resin composition comprising: (A) a liquid epoxy resin; (B) an amine type curing agent; (C) a sulfur-containing phenol compound in an amount of from 1 to 20 parts by weight per total 100 parts by weight of the components (A) and (B); and (D) an inorganic filler in an amount of from 50 to 900 parts by weight per 100 parts by weight of the component (A).
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: January 5, 2010
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Masatoshi Asano, Kaoru Katoh, Kazuaki Sumita
  • Patent number: 7629398
    Abstract: An epoxy resin composition for encapsulating semiconductors which comprises as essential components (A) an epoxy resin, (B) a phenol resin, (C) a curing accelerator, (D) an inorganic filler and (E) a component comprising (e1) a butadiene-acrylonitrile copolymer having carboxyl group and/or (e2) a reaction product of (e1) a butadiene-acrylonitrile copolymer having carboxyl group with an epoxy resin, wherein the content of component (e1) in the entire epoxy resin composition is 0.01 to 1% by weight. The composition exhibits excellent releasing property in molding, continuous molding property and resistance to solder reflow.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: December 8, 2009
    Assignee: Sumitomo Bakelite Company Limited
    Inventor: Yasuhiro Mizuno
  • Patent number: 7622515
    Abstract: The object of the present invention is to provide an epoxy resin composition which is excellent in flash characteristics and thermal conductivity, and gives an area mounting type semiconductor apparatus having little warpage and excellent temperature cycle properties. According to the present invention, there is provided an epoxy resin composition for semiconductor encapsulation which comprises, as essential components, (A) a spherical alumina, (B) an ultrafine silica having a specific surface area of 120-280 m2/g, (C) a silicone compound, (D) an epoxy resin, (E) a phenolic resin as a curing agent, and (F) a curing accelerator, in which said ultrafine silica is contained in an amount of 0.2-0.8% by weight based on the total weight of the resin composition, and said silicone compound is a polyorganosiloxane and is contained in an amount of 0.3-2.0% by weight based on the total weight of the resin composition.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: November 24, 2009
    Assignee: Sumitomo Bakelite Company Limited
    Inventor: Hironori Osuga
  • Publication number: 20090236759
    Abstract: A curable silicone rubber composition, comprising: (A) an organopolysiloxane containing two or more alkenyl groups within each molecule, (B) an organohydrogenpolysiloxane having two or more hydrogen atoms bonded to silicon atoms within each molecule, (C) a metal-based condensation reaction catalyst, (D) a platinum group metal-based addition reaction catalyst, and (E) an adhesion-imparting agent, wherein among the refractive indices of component (A), a mixture of component (A) and component (B), and component (E), the difference between the maximum refractive index and the minimum refractive index is not more than 0.03.
    Type: Application
    Filed: March 23, 2009
    Publication date: September 24, 2009
    Inventor: Tsutomu KASHIWAGI
  • Patent number: 7592399
    Abstract: An epoxy/silicone hybrid resin composition is provided comprising (A) an organosilicon compound having at least one silicon-bonded hydroxyl group, (B) a modified epoxy resin which is free of a phenylene ether skeleton and has reactive hydroxyl groups wherein some or all of the hydrogen atoms of the reactive hydroxyl groups are substituted by monovalent hydrocarbon groups or silyl groups, and (C) an aluminum base curing catalyst. The compatibility between silicone and epoxy resins is improved without a need for compatibilizing agent.
    Type: Grant
    Filed: December 18, 2006
    Date of Patent: September 22, 2009
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventor: Kinya Kodama
  • Patent number: 7579698
    Abstract: A semiconductor photodetector which can achieve spectral sensitivity characteristics close to relative luminous characteristics at low cost while using a light receiving element of a semiconductor made from such as silicon, has a semiconductor light receiving element having high spectral sensitivity in a wavelength range between approximately 400 nm to 1100 nm and an optical transmitting resin for sealing at least a light receiving surface of the semiconductor light receiving element. The optical transmitting resin is formed by dispersing metal boride micro particles whose particle diameter is not more than approximately 100 nm in a transparent resin and blocks light in wavelengths approximately 700 nm or above.
    Type: Grant
    Filed: January 17, 2006
    Date of Patent: August 25, 2009
    Assignee: New Japan Radio Co., Ltd.
    Inventors: Fumio Takamura, Seiji Koike
  • Patent number: 7569925
    Abstract: A module with a built-in component is produced by disposing a cavity on a mounting surface side of a ceramic multilayer substrate, storing a circuit component therein and, thereafter, performing resin molding. A second resin portion is disposed on the mounting surface side of the ceramic multilayer substrate so as to continuously cover a frame-shaped portion and a first resin portion molded. External terminal electrodes are disposed on an outer surface of the second resin portion.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: August 4, 2009
    Assignee: Murata Manufacturing Co. Ltd.
    Inventors: Yoshihiko Nishizawa, Norio Sakai
  • Publication number: 20090146323
    Abstract: The present invention relates to a resin for optical-semiconductor-element encapsulation which comprises a polyaluminosiloxane obtained by reacting a silicon compound with an aluminum compound, and an optical semiconductor device obtained with the resin. The resin has satisfactory light-transmitting properties and low hygroscopicity and suffers no discoloration when used at a high temperature.
    Type: Application
    Filed: November 25, 2008
    Publication date: June 11, 2009
    Applicant: NITTO DENKO CORPORATION
    Inventor: Hiroyuki Katayama
  • Publication number: 20090146324
    Abstract: A curable phenoxyphenyl polysiloxane composition is disclosed. A cured phenoxyphenyl polysiloxane composition is further disclosed, along with a method of making that cured phenoxyphenyl polysiloxane composition from the curable phenoxyphenyl silicon composition. An encapsulated semiconductor device, and a method of making that encapsulated semiconductor device by coating a semiconductor element of a semiconductor device with cured phenoxyphenyl polysiloxane are further disclosed.
    Type: Application
    Filed: December 5, 2008
    Publication date: June 11, 2009
    Applicant: Rohm and Haas Company
    Inventors: Kathleen A. Auld, David M. Conner, Garo Khanarian, David Wayne Mosley
  • Patent number: 7521813
    Abstract: A silicone rubber composition comprising (A) an organopolysiloxane containing at least two aliphatic unsaturated bonds, (B) an organopolysiloxane of resin structure comprising SiO2 units, R3nR4pSiO0.5 units and R3qR4rSiO0.5 units wherein R3 is vinyl or allyl, R4 is a monovalent hydrocarbon group free of aliphatic unsaturation, n is 2 or 3, p is 0 or 1, n+p=3, q is 0 or 1, r is 2 or 3, q+r=3, (C) an organohydrogenpolysiloxane having at least two SiH groups, and (D) a platinum catalyst cures into a silicone rubber having excellent rubbery and strength properties and little surface tack.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: April 21, 2009
    Assignee: Shin-Estu Chemical Co., Ltd.
    Inventors: Tsutomu Kashiwagi, Toshio Shiobara
  • Publication number: 20090091045
    Abstract: A thermosetting composition for an optical semiconductor containing a silicone resin having a cyclic ether-containing groups and a thermosetting agent capable of reacting with said cyclic ether-containing group, wherein the silicone resin has, as the principal components, a structural unit expressed by the following formula (1) and a structural unit expressed by the following formula (2). The content of the structural unit expressed by the formula (1) is 0.6 to 0.95 (on a molar basis) and the content of the structural unit expressed by the formula (2) is 0.05 to 0.4 (on a molar basis) when total number of the structural units contained is taken as 1, and the content of the cyclic ether-containing group is 5 to 40 mol %: [formula 1] (R1R2SiO2/2)??(1) and [formula 2] (R3SiO3/2)??(2) at least one of R1, R2 and R3 represents a cyclic ether-containing group, R1, R2 and R3 other than the cyclic ether-containing group represent hydrocarbon having 1 to 8 carbon atoms or fluoride thereof.
    Type: Application
    Filed: April 25, 2007
    Publication date: April 9, 2009
    Inventors: Mitsuru Tanikawa, Takashi Watanabe, Takashi Nishimura
  • Patent number: 7504670
    Abstract: A semiconductor device includes: a substrate; a semiconductor element mounted on the substrate; a sealing structure for sealing the semiconductor element, the sealing structure being mounted on the substrate; and an adhesive for bonding the sealing structure and the substrate, wherein the sealing structure has a groove for storing the adhesive.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: March 17, 2009
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Satoshi Shiraishi, Yoichi Kazama
  • Publication number: 20090051053
    Abstract: The object of the present invention is to provide an epoxy resin composition which is excellent in flash characteristics and thermal conductivity, and gives an area mounting type semiconductor apparatus having little warpage and excellent temperature cycle properties. According to the present invention, there is provided an epoxy resin composition for semiconductor encapsulation which comprises, as essential components, (A) a spherical alumina, (B) an ultrafine silica having a specific surface area of 120-280 m2/g, (C) a silicone compound, (D) an epoxy resin, (E) a phenolic resin as a curing agent, and (F) a curing accelerator, in which said ultrafine silica is contained in an amount of 0.2-0.8% by weight based on the total weight of the resin composition, and said silicone compound is a polyorganosiloxane and is contained in an amount of 0.3-2.0% by weight based on the total weight of the resin composition.
    Type: Application
    Filed: October 22, 2008
    Publication date: February 26, 2009
    Inventor: Hironori Osuga
  • Patent number: 7485489
    Abstract: A circuit with embedding components (13) is produced by placing the components (13) on a substrate (14) and applying sheets (15) of prepreg. The prepreg sheets (15) have apertures to accommodate the -components, the number of sheets and arrangement of apertures being chosen to accommodate a variety of component X, Y and Z dimensions. A top layer with Cu foil (16(b)) is applied. The assembly is pressed in an operation analogous to conventional multilayer board lamination pressing. This causes all of the prepreg resin to flow to completely embed the components without raids or damage. Electrical connections are made by drilling and plating vias.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: February 3, 2009
    Inventor: Sten Björbell
  • Patent number: 7466012
    Abstract: A power semiconductor package that includes a semiconductor die having at least two power electrodes and a conductive clip electrically and mechanically coupled to each power electrode.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: December 16, 2008
    Assignee: International Rectifier Corporation
    Inventors: Martin Standing, Robert J Clarke
  • Patent number: 7449789
    Abstract: A light-emitting device (12) includes a base (14) and two red light-emitting chips (22), two green light-emitting chips (24) and a blue light-emitting chip (26) arranged on the base red, green, blue, green, red in a left-to-right order. The red light-emitting chips, the green light-emitting chips and the blue light-emitting chip include a plurality of red-color quantum dots, green-color quantum dots and blue-color quantum dots respectively. A planar light source (10) includes a planar plate (102), and a plurality of the light-emitting devices arranged in an array on the planar plate. A direct type backlight module (20) includes a diffusing sheet (18) and the planar light source facing a surface of the diffusing sheet.
    Type: Grant
    Filed: April 3, 2006
    Date of Patent: November 11, 2008
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Ga-Lane Chen
  • Patent number: 7442653
    Abstract: An exemplary manufacturing method of an inter-metal dielectric of a semiconductor device according to an embodiment of the present invention includes forming a first silicon-rich oxide (SRO) layer on a silicon substrate provided with or otherwise having a copper line layer therein, forming a plasma enhanced fluorosilicate glass (PEFSG) layer on the first SRO layer, plasma-treating the PEFSG layer, and forming a second SRO layer on the plasma-treated PEFSG layer. According to the present invention, the thickness of the second SRO layer of the inter-metal dielectric can be reduced. Consequently, process cost can be reduced, and the total thickness of the inter-metal dielectric can be reduced so as to lower the dielectric constant thereof, reduce the aspect ratio of any via holes that are subsequently formed in the inter-metal dielectric, and potentially increase the yield as a result of the reduced via hole aspect ratio.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: October 28, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Tae-Young Lee
  • Patent number: 7399657
    Abstract: Ball grid array packages for semiconductor die include a thermally conductive container and a substrate that substantially enclose a semiconductor die. The die is positioned with respect to the container by thermally conductive supports formed in the container or attached to the container. The die contacts the supports so that the die and the container form a cavity that is at least partially filled with a thermally conductive material such as a conductive epoxy to promote thermal conduction between the die and the container. The die electrically connects to the substrate with bond wires that extend through an aperture in the substrate and attach to bond pads provided on the substrate. The aperture is typically filled with a protective layer of resin, epoxy, or other material that also encapsulates the bond wires.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: July 15, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Todd O. Bolken, Chad A. Cobbley
  • Patent number: 7378616
    Abstract: A heating apparatus and method for heating a semiconductor device during bonding of electrical contacts onto the device is provided, which includes a heating plate that is provided for heating the semiconductor device and a layer of compliant material extending over at least a portion of the heating plate for mounting the semiconductor device. A holding mechanism secures the semiconductor device on the layer of compliant material during bonding of electrical contacts onto the semiconductor device while it is being heated by the heating plate.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: May 27, 2008
    Assignee: ASM Technology Singapore Pte. Ltd.
    Inventors: Tin Kwan Bobby Chan, Choong Kead Leslie Lum
  • Patent number: 7358618
    Abstract: A semiconductor device having a semiconductor substrate, at least one of a protruding electrode and wiring formed on one surface of the semiconductor substrate, and a first resin film formed on this surface. The first resin film has elasticity low enough to reduce stress induced by a difference in thermal expansion coefficient between the semiconductor substrate and the first resin film. A second resin film, having higher elasticity or higher strength than the first resin film, may be formed on the other surface of the semiconductor substrate.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: April 15, 2008
    Assignee: Rohm Co., Ltd.
    Inventor: Kazutaka Shibata
  • Patent number: 7332822
    Abstract: A system for underfilling in a chip package includes an underfill mixture that ameliorates the CTE mismatch that typically exists between a packaged die and a resin-impregnated fiberglass mounting substrate. In one embodiment, the system includes an underfill mixture that comprises a principal underfill composition of a rigid octaaminophenyl silsesquioxane (OAPS) that is used as a curing agent for a tetrafunctional, low viscosity, and relatively rigid TGMX epoxy resin. An embodiment is also directed to the assembly of a flip chip package that uses the underfill mixture.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: February 19, 2008
    Assignee: Delphi Technologies, Inc.
    Inventors: Rafil Basheer, Richard M. Laine, Santy Sulaiman, Chad M. Brick, Christopher M. Desana
  • Patent number: 7317258
    Abstract: An apparatus and system, as well as fabrication methods therefor, may include a unitary, substantially uniformly distributed transfer material coupled to a carrier material.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: January 8, 2008
    Assignee: Intel Corporation
    Inventors: Rajen C. Dias, Yongmei Liu
  • Publication number: 20070290378
    Abstract: The present invention provides chip containing electronic devices such as Multichip Ceramic Modules (MCM's) containing a plurality of chips on a substrate which chips are underfilled with a reworkable composition which allows one or more chips to be removed from the device and replaced. The reworkable compositions contain a base resin which is not cross-linkable and which forms a matrix with a linear curable component or preferably a combination of linear curable components which curable components are cross-linkable and when cured form a cross-linked domain in the base resin matrix. A suitable cross-linking catalyst such as Pt is used and optionally a filler preferably silane surface treated silica. The preferred base resin is linear polydimethylsiloxane and the preferred curable components are vinyl terminated linear poly dimethyl siloxane and hydrogen terminated linear poly dimethyl siloxane.
    Type: Application
    Filed: June 20, 2006
    Publication date: December 20, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeffrey T. Coffin, Steven P. Ostrander, Frank L. Pompeo, Jiali Wu
  • Patent number: 7294933
    Abstract: A semiconductor wafer includes a redistribution layer which is electrically connected with a pad which is an end portion of an interconnect, a first resin layer which is formed over the redistribution layer, a second resin layer which is formed over the first resin layer and covers the side surface of the first resin layer, and an external terminal which is formed to be electrically connected with the redistribution layer in a manner to avoid the pad.
    Type: Grant
    Filed: January 5, 2007
    Date of Patent: November 13, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Terunao Hanaoka
  • Patent number: 7288489
    Abstract: The present invention provides an apparatus and method for use in processing semiconductor workpieces. The new apparatus and method allows for the production of thinner workpieces that at the same time remain strong. Particularly, a chuck is provided that includes a body, a retainer removeably attached to the body and a seal forming member. When a workpiece is placed on the chuck body and the retainer is engaged to the body, a peripheral portion of the back side of the workpiece is covered by the retainer while an interior region of the back side of the workpiece is exposed. The exposed back side of the workpiece is then subjected to a wet chemical etching process to thin the workpiece and form a relatively thick rim comprised of semiconductor material at the periphery of the workpiece. The thick rim or hoop imparts strength to the otherwise fragile, thinned semiconductor workpiece.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: October 30, 2007
    Assignee: Semitool, Inc.
    Inventors: Kert L. Dolechek, Raymon F. Thompson
  • Patent number: 7288847
    Abstract: An assembly for a circuit board includes a substrate, at least one circuit component formed on the substrate, and a frame. The frame comprises a first substantially planar surface attached to the substrate, and a hole formed through the frame and defined by a wall that surrounds the at least one circuit component. A method of manufacturing the circuit board includes the step of attaching the substantially planar surface of the frame to the substrate in an arrangement in which the at least one circuit component is surrounded by a wall that defines the hole.
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: October 30, 2007
    Assignee: Medtronic, Inc.
    Inventors: David A. Ruben, Scott B. Sleeper, Peter C. Tortorici
  • Patent number: 7262510
    Abstract: A process for fabricating a chip package structure with the following steps is provided. First, a chip having an active surface is provided. A plurality of solder bumps is disposed on the active surface. Then, a polymer material including flux is placed on the surface of the solder bumps by a dipping process. The chip is disposed on a carrier such that the carrier is in contact with the solder bumps. A reflow process is carried out so that the chip and the carrier are electrically connected through the solder bumps and a plurality of supporting structures made from the polymer material are formed around the junctions between the solder bumps and the carrier. The supporting structures enhance the endurance of the solder bumps to thermal stress and reduce damage due to fatigue.
    Type: Grant
    Filed: July 15, 2005
    Date of Patent: August 28, 2007
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Chih-Ming Chung
  • Patent number: 7186591
    Abstract: A method for encapsulating an assembly with a methyl phenyl silicone rubber compound is provided. In various embodiments, the method can include exposing the assembly to a solvent, plasma etching the assembly, and producing a potting mixture, wherein the potting mixture comprises a methyl phenyl room temperature vulcanization silicone and a curing agent. The method can further include pouring the potting mixture over the assembly while under a vacuum until the assembly is encapsulated, pouring at least two control samples of the potting mixture while under the vacuum, curing the encapsulated assembly and the control samples in a first environment and monitoring the one of the control samples for hardness, and determining whether additional cure time in the first environment is needed based upon the results of the control sample hardness tests.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: March 6, 2007
    Assignee: Honeywell International, Inc.
    Inventors: Lance T. Nehr, Leon L. Vail, Patricia C. Tarr, Daniel McAlister
  • Patent number: 7176572
    Abstract: A semiconductor wafer includes a redistribution layer which is electrically connected with a pad which is an end portion of an interconnect, a first resin layer which is formed over the redistribution layer, a second resin layer which is formed over the first resin layer and covers the side surface of the first resin layer, and an external terminal which is formed to be electrically connected with the redistribution layer in a manner to avoid the pad.
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: February 13, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Terunao Hanaoka
  • Patent number: 7173322
    Abstract: The present invention provides a COF flexible printed wiring board whose insulating layer is not melt-adhered to a heating tool, to thereby enhance reliability and productivity of a semiconductor chip mounting line, and also provides a method of producing the COF flexible printed wiring board. The COF flexible printed wiring board contains an insulating layer, a wiring pattern, on which a semiconductor chip being mounted, formed of a conductor layer provided on at least one side of the insulating layer and a releasing layer, wherein the releasing layer is formed from a releasing agent containing at least one species selected from a silane compound and silica sol and is provided on a surface of the insulating layer, which is opposite to the mounting side of the semiconductor chip.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: February 6, 2007
    Assignee: Mitsui Mining & Smelting Co., Ltd.
    Inventors: Ken Sakata, Katsuhiko Hayashi
  • Patent number: 7144763
    Abstract: Epoxy resin compositions are disclosed which comprise (A) at least one silicone epoxy resin, (B) at least one hydroxyl-containing compound, (C) at least one anhydride curing agent, (D) at least one ancillary curing catalyst, and optionally at least one of thermal stabilizers, UV stabilizers, cure modifiers, coupling agents, or refractive index modifiers. Also disclosed are packaged solid state devices comprising a package, a chip (4), and an encapsulant (11) comprising an epoxy resin composition of the invention. A method of encapsulating a solid state device is also provided.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: December 5, 2006
    Assignee: General Electric Company
    Inventors: Malgorzata Iwona Rubinsztajn, Slawomir Rubinsztajn
  • Patent number: 7115989
    Abstract: An adhesive sheet for producing a semiconductor device, which includes a base layer and an adhesive layer and is used in the process for producing the semiconductor device including the step of sealing a semiconductor element connected to an electric conductor with a sealing resin on the adhesive layer, wherein the adhesive layer of the adhesive sheet includes a rubber component and an epoxy resin component and the ratio of the rubber component in organic materials in the adhesive layer is from 5 to 40% by weight. According to this adhesive sheet, pollution is not caused by silicon components, a sufficient elastic modulus can be kept even at high temperature, and a problem that paste remains is not easily caused.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: October 3, 2006
    Assignee: Nitto Denko Corporation
    Inventor: Kazuhito Hosokawa
  • Patent number: 7109591
    Abstract: An integrated circuit device having a semiconductor device and an encapsulating material on at least a portion of the semiconductor device and a method for encapsulating an integrated circuit device is disclosed. The encapsulating material includes a plurality of nanoparticles.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: September 19, 2006
    Inventors: Jonathan A. Hack, Timothy M. Hsieh
  • Patent number: 7098545
    Abstract: A package of a semiconductor device comprising an integrated circuit (10) generally comprises an inner layer (21) and an outer layer (16), which layers (16,21) have a mutual interface (24). An improved stability of the package is realized in that the interface (24) encloses a delamination area (22), which area (22) is isolated from any bond pads (18) of the integrated circuit (10). The delamination area (22) may be created by a pattern-wise activation of a surface of the inner layer (21). A quantity of a curable polymer may be disposed on this surface to achieve this.
    Type: Grant
    Filed: November 20, 2002
    Date of Patent: August 29, 2006
    Assignee: Koninklijke Phllips Electronics N.V.
    Inventor: Jacob Wijdenes
  • Patent number: 7095124
    Abstract: A semiconductor device comprises a semiconductor chip in which a multilayer interconnection structure having an interlayer insulation film with a low relative dielectric constant is formed on a silicon substrate and a sealing resin layer which coats the semiconductor chip. The sealing resin layer meets, in coefficient of linear expansion (?) at room temperature, Young's modulus (E) at room temperature and thickness (h) thereof, a relationship of the following formula (1) E<0.891/{(???s)2×h}??(1) where E represents the Young's modulus (GPa) of the sealing resin at room temperature; ? represents the coefficient of linear expansion (ppm) of the sealing resin at room temperature; ?s represents the coefficient of linear expansion (3.5 ppm) of the silicon substrate; and h represents the thickness (m) of the sealing resin on the device-formed surface of the semiconductor chip.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: August 22, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiko Hasunuma, Akitsugu Hatazaki
  • Patent number: 7075187
    Abstract: There is disclosed a coating material formulation for layering a plurality of electrodes to provide a substrate for the electrochemical synthesis of organic oligomers. Specifically, there is disclosed a coating layer of from about 0.5 to about 100 microns thick and is composed of a mixture of controlled porosity glass (CPG) particles having an average particle size of from about 0.25 to about 25 microns, and a thickening agent.
    Type: Grant
    Filed: November 9, 2001
    Date of Patent: July 11, 2006
    Assignee: CombiMatrix Corporation
    Inventor: Karl Maurer
  • Patent number: 7038328
    Abstract: The present invention relates to an anti-reflective coating composition characterized by comprising a resin made from triazine compounds having at least two nitrogen atoms substituted a hydroxymethyl group and/or an alkoxymethyl group, and a light absorbing compound and/or a light absorbing resin. The present invention offers an anti-reflective coating composition for the anti-reflective coating having high light absorption property of the light used for the lithography process in the preparation of semiconductor device, showing high reflective light preventing effect, being used at thinner film thickness more than before, and having greater dry etching rate in comparison to photoresist layer.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: May 2, 2006
    Assignee: Brewer Science Inc.
    Inventors: Tomoyuki Enomoto, Keisuke Nakayama, Rama Puligadda
  • Patent number: 7015501
    Abstract: A substrate and an organic electroluminescence device employing the substrate are provided. The substrate has at least one non-continuous photo-resist coating layer formed on at least one surface of a supporting substrate and the non-continuous photo-resist coating has a plurality of continuous portions. The continuous portions may have high surface energy areas and low surface energy areas. A second photo-resist coating layer is used to at least temporarily overlap the continuous portion which corresponds to the high surface energy area in order to form the low surface energy area.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: March 21, 2006
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Michael Redecker, Marcus Schaedig, Michael Kubiak
  • Patent number: 6989595
    Abstract: The invention includes methods of forming patterns in low-k dielectric materials by contact lithography. In a particular application, a mold having a first pattern is pressed into a low-k dielectric material to form a second pattern within the material. The second pattern is substantially complementary to the first pattern. The mold is then removed from the low-k dielectric material. The invention also includes a method of forming a mold; and includes a mold configured to pattern a mass over a semiconductor substrate during contact lithography of the mass.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: January 24, 2006
    Assignee: Micron Technology, Inc.
    Inventor: James J. Hofmann
  • Patent number: 6974762
    Abstract: A method of silanizing the surface of a low-k interlayer dielectric oxides (carbon doped oxides or organo-silicate glasses) to improve surface adhesion to adjacent thin film layers in damascene integration of microelectronic devices. A low-k interlayer dielectric oxide may be exposed to the vapor of a silane-coupling agent in order to modify its surface energy to improve adhesion with adjacent thin film layers. A low-k interlayer dielectric oxide can also be silanized by dipping the low-k interlayer dielectric oxide in a solution of silane-coupling agent. The silane-coupling agent will cause covalent bonds between the low-k interlayer dielectric oxide and the adjacent thin film thereby improving adhesion.
    Type: Grant
    Filed: August 1, 2002
    Date of Patent: December 13, 2005
    Assignee: Intel Corporation
    Inventors: David H. Gracias, Vijayakumar S. Ramachandrarao