Discrete Light Emitting And Light Responsive Devices Patents (Class 257/82)
  • Patent number: 7808006
    Abstract: A phosphor has a general formula of (M1-m-nCemEun)3Al2O5X2, wherein M is at least one selected from the group consisting of Ca, Sr and Ba; and X is at least one selected from the group consisting of Cl and Br, while 0<m<1 and 0<n<1.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: October 5, 2010
    Assignee: National Chiao Tung University
    Inventors: Teng-Ming Chen, Chun-Kuei Chang
  • Patent number: 7803254
    Abstract: A process for forming an electronic device includes forming a first layer over a substrate, wherein the first layer includes an organic layer, and depositing a second layer over the substrate after forming the first layer, wherein depositing the second layer is performed using ion beam sputtering. In another embodiment, a process for forming an electronic device includes placing a workpiece within a depositing chamber of a depositing apparatus, wherein the workpiece includes a substrate and an organic layer overlying the workpiece. The process includes generating a plasma within a plasma-generating chamber of the depositing apparatus, wherein the plasma is not in direct contact with the workpiece. The process also includes sending an ion beam from the plasma-generating chamber towards a target within the depositing chamber, wherein the target includes a material, and depositing a layer of the material over the organic layer.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: September 28, 2010
    Assignee: E. I. du Pont de Nemours and Company
    Inventor: Shiva Prakash
  • Patent number: 7800093
    Abstract: An integrated circuit including a memory cell includes a vertical bipolar select device including a base and an emitter. The memory cell includes a resistive memory element coupled to the emitter and a buried metallized word line contacting the base.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: September 21, 2010
    Assignee: Qimonda North America Corp.
    Inventors: Thomas Happ, Jan Boris Philipp
  • Patent number: 7795653
    Abstract: An electronic device can include a first radiation region, a second radiation region spaced apart from the first radiation region, and an insulating region. The insulating region can have a first side and a second side opposite the first side. The first radiation region can lie immediately adjacent to the first side, and the second radiation region can lie immediately adjacent to the second side. Within the insulating region, no other radiation region may lie between the first and second radiation regions, and the insulating region can include an insulating layer that includes a plurality of openings. In another aspect, a process for forming the electronic device can include patterning an insulating layer.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: September 14, 2010
    Assignees: E. I. du Pont de Nemours and Company, DuPont Displays, Inc.
    Inventors: Charles Douglas Macpherson, Gordana Srdanov, Gang Yu
  • Patent number: 7791084
    Abstract: A die package is disclosed. The die package includes a substrate, a first device attached to the substrate, and a leadframe structure attached to the substrate. The leadframe structure includes a portion disposed over the first device, and a second device is attached to the first portion of the leadframe structure.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: September 7, 2010
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Yong Liu, Yumin Liu
  • Patent number: 7791085
    Abstract: Disclosed herein is a semiconductor light emitting apparatus that includes: a semiconductor light emitting device having a first semiconductor laminate structure including a light emitting region, and a light outgoing window permitting the light emitted from the light emitting region to go out therethrough in the lamination direction; a light transmitting part provided in a region corresponding to the light emitting region; a metal part provided in a region, corresponding to an outer peripheral region of the light emitting region, of the first semiconductor laminate structure; and a semiconductor light detector having a second semiconductor laminate structure including a light absorbing layer for absorbing a part of the light incident from the lamination direction. In the apparatus, the semiconductor light emitting device, a layer including the light transmitting part and the metal part, and the semiconductor light detector are integrally formed in the state of being laminated in this order.
    Type: Grant
    Filed: November 27, 2006
    Date of Patent: September 7, 2010
    Assignee: Sony Corporation
    Inventors: Rintaro Koda, Takahiro Arakida, Yoshinori Yamauchi, Norihiko Yamaguchi, Yuji Masui
  • Publication number: 20100219422
    Abstract: A photo-coupler is provided. The photo-coupler comprises a light emitting chip, a light-sensing chip, a light-transmissive inner encapsulant package and an outer package. Both the light emitting chip and the light-sensing chip face the same direction, while the light-sensing chip receives a light beam emitted by the light emitting chip. The light-transmissive inner encapsulant package encloses the light emitting chip and the light-sensing chip, while the outer package encloses the light-transmissive inner encapsulant package. An interface is formed between the light-transmissive inner encapsulant package and the outer package for reflecting the light beam. A reflective curve surface adjacent to the light emitting chip is formed on the interface of the light-transmissive inner encapsulant package for reflecting and converging the first portion of the light beam to the light-sensing chip.
    Type: Application
    Filed: February 24, 2010
    Publication date: September 2, 2010
    Applicant: EVERLIGHT ELECTRONICS CO., LTD.
    Inventors: Chao-Hsuan SU, Lu-Ming LAI, Ying-Zhong CHEN
  • Patent number: 7785930
    Abstract: The present invention relates to affixing components of optical packages. The optical packages can include an optical component, such as a TO-Can. The TO-Can can house an optical transmitter and/or an optical receiver. Another optical component of the optical package can be a barrel for aligning the TO-Can with an optical fiber. The TO-Can can be affixed within an open end of the optical barrel using a bonding substance, such as an epoxy, that has wicking properties. The wicking properties cause the bonding substance to enter a gap between the optical barrel and the TO-Can by capillary action. Use of the bonding substance with wicking properties creates a more robust optical package in a cost effective manner.
    Type: Grant
    Filed: August 11, 2008
    Date of Patent: August 31, 2010
    Assignee: Finisar Corporation
    Inventor: Christopher William Johnson
  • Patent number: 7786498
    Abstract: There is provided a light emitting device that can minimize reflection or absorption of emitted light, maximize luminous efficiency with the maximum light emitting area, enable uniform current spreading with a small area electrode, and enable mass production at low cost with high reliability and high quality. A light emitting device according to an aspect of the invention includes a light emitting lamination including a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer, and a conductive substrate at one surface thereof. Here, the light emitting device includes a barrier unit separating the light emitting lamination into a plurality of light emitting regions, a first electrode structure, and a second electrode structure. The first electrode structure includes a bonding unit, contact holes, and a wiring unit connecting the bonding unit to the contact holes.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: August 31, 2010
    Assignee: Samsung LED Co., Ltd.
    Inventors: Pun Jae Choi, Jin Hyun Lee, Si Hyuk Lee, Seon Young Myoung, Ki Yeol Park
  • Patent number: 7786491
    Abstract: A semiconductor light-emitting device includes: a substrate; a plurality of semiconductor layers grown on the substrate and including an active layer; and an electrode formed on the semiconductor layers. An opening in which at least a portion of the semiconductor layers is exposed is formed in the substrate. The electrode faces the opening in the substrate and a portion of the substrate surrounding the opening.
    Type: Grant
    Filed: February 2, 2007
    Date of Patent: August 31, 2010
    Assignee: Panasonic Corporation
    Inventors: Tetsuzo Ueda, Kenji Orita
  • Publication number: 20100213471
    Abstract: A light-emitting device reliably supplying electric power to a light-emitting element on a supporting base and securing heat dissipation, and a method of manufacturing the light-emitting device are provided. A light-emitting device includes: a light-emitting element arranged on a first supporting base; a package covering the first supporting base and the light-emitting element therewith, and supporting the first supporting base; and a thermal conductive member having ends which are bonded to the light-emitting element and the package, respectively, so as to also have a wiring function.
    Type: Application
    Filed: February 17, 2010
    Publication date: August 26, 2010
    Applicant: SONY CORPORATION
    Inventors: Hiroyuki Fukasawa, Hiroshi Nishida
  • Patent number: 7781854
    Abstract: An image sensor chip package structure includes a transparent substrate, a chip, a sealing ring, a number of conductive posts, and a number of conductive bumps. The transparent substrate has a number of through holes. The through holes pass through the transparent substrate. The chip has an active surface, an image sensitive area, and a number of die pads. The image sensitive area and the die pads are located on the active surface. The sealing ring is disposed between the chip and the transparent substrate and surrounds the image sensitive area and the die pads. The conductive posts are disposed in the through holes, respectively. Here, the chip is electrically connected with the conductive posts via the die pads. The conductive bumps are disposed on the die pads, respectively. The conductive bumps are connected with the conductive posts, respectively.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: August 24, 2010
    Assignee: Unimicron Technology Corp.
    Inventor: Chih-Wei Lu
  • Patent number: 7777236
    Abstract: With a light-emitting diode arrangement (1) having a light-emitting diode chip (2) arranged on a base (3), and colour conversion material (7) surrounding the light-emitting diode chip (2), which material is constituted to convert at least a part of the light emitted by the light-emitting diode chip (2) into light of another wavelength, the colour conversion material (7) is surrounded to the side by a reflector (8), the lateral distance (x) of the light-emitting diode chip (2) to the reflector (8) amounting to at most 0.5 mm.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: August 17, 2010
    Assignee: Tridonic Optoelectronics GmbH
    Inventor: Peter Pachler
  • Patent number: 7777235
    Abstract: A light emitting diode with improved light collimation comprises a substrate-supported LED die disposed within a transparent dome. A portion of the dome laterally circumscribe the die comprises light reflecting material to reflect emitted light back to the die. A portion of the dome centrally overlying the die is substantially free of light reflecting material to permit exit of light within a desired radiation pattern. The LED die may be packaged for high temperature operation by disposing them on a ceramic-coated metal base which can be coupled to a heat sink. The packaged LED can be made by the low temperature co-fired ceramic-on-metal technique (LTCC-M).
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: August 17, 2010
    Assignee: Lighting Science Group Corporation
    Inventors: Joseph Mazzochette, Greg Blonder
  • Patent number: 7777234
    Abstract: A light-receiving element has a photodiode formed in part of the top surface of a semiconductor substrate so as to function as a light-receiving region, and has a light-emitting element mount electrode formed on top of the semiconductor substrate where the light-receiving region is not formed. A high concentration impurity layer is formed below the top surface of the semiconductor substrate along the peripheral edges of the light-emitting element mount electrode. This helps prevent the voltage applied to the light-emitting element mount electrode from influencing the output of the light-receiving element. Alternatively, a photonic semiconductor device has a light-emitting element and a light-receiving element, and has the light-receiving region of the light-receiving element formed parallel to the direction in which the light-emitting element emits light.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: August 17, 2010
    Assignees: Sanyo Electric Co., Ltd., Tottori Sanyo Electric Co., Ltd.
    Inventors: Susumu Nishimura, Shoji Honda, Koji Ueyama
  • Publication number: 20100200868
    Abstract: A semiconductor light-emitting device includes a semiconductor light-emitting element including a first multilayer reflector, an active layer having a light-emitting region, and a second multilayer reflector in the stated order; a semiconductor light-detecting element disposed opposite the first multilayer reflector in relation to the semiconductor light-emitting element and including a light-absorbing layer configured to absorb light emitted from the light-emitting region; a transparent substrate disposed between the semiconductor light-emitting element and the semiconductor light-detecting element; a first metal layer having a first opening in a region including a region opposite the light-emitting region and bonding the semiconductor light-emitting element and the substrate; and a second metal layer having a second opening in a region including a region opposite the light-emitting region and bonding the semiconductor light-detecting element and the substrate.
    Type: Application
    Filed: January 28, 2010
    Publication date: August 12, 2010
    Applicant: Sony Corporation
    Inventors: Yuji Masui, Rintaro Koda, Osamu Maeda, Takahiro Arakida, Terukazu Naruse, Naoki Jogan
  • Patent number: 7768020
    Abstract: Disclosed herein is an AC light emitting diode. The light emitting diode comprises a plurality of light emitting cells two-dimensionally arranged on a single substrate. Wires electrically connect the light emitting cells to one another to thereby form a serial array of the light emitting cells. Further, the light emitting cells are spaced apart from one another by distances within a range of 10 to 30 D, and the serial array is operated while connected to an AC power source. Accordingly, the excellent operating characteristics and light output power can be secured in an AC light emitting diode with a limited size.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: August 3, 2010
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Dae Won Kim, Yeo Jin Yoon, Dae Sung Kal
  • Patent number: 7768022
    Abstract: A light emitting diode and its fabricating method are disclosed. A light emitting diode epitaxy structure is formed on a substrate, and then the light emitting diode epitaxy structure is etched to form a recess. The recess is then filled with a transparent dielectric material. An adhesive layer is utilized to adhere a conductive substrate and the light emitting diode epitaxy structure. Next, the substrate is removed.
    Type: Grant
    Filed: April 19, 2005
    Date of Patent: August 3, 2010
    Assignee: Epistar Corporation
    Inventors: Tzong-Liang Tsai, Way-Jze Wen, Chang-Han Chiang, Chih-Sung Chang
  • Patent number: 7763896
    Abstract: An exemplary LED includes a substrate, an LED chip, a light pervious encapsulation, and an auxiliary electric component. The substrate includes a first surface, an opposite second surface, and an accommodating space defined therein between the first surface and the second surface. The LED chip is mounted on the first surface of the substrate. The light pervious encapsulation is formed on the substrate and covers the LED chip. The auxiliary electric component is received in the accommodating space between the first and second surfaces of the substrate.
    Type: Grant
    Filed: July 7, 2008
    Date of Patent: July 27, 2010
    Assignee: Foxsemicon Integrated Technology, Inc.
    Inventors: Chun-Wei Wang, Hung-Kuang Hsu, Wen-Jang Jiang
  • Patent number: 7763900
    Abstract: Disclosed are a light emitting device having a plurality of light emitting cells connected in series and a method of fabricating the same. The light emitting device includes a buffer layer formed on a substrate. A plurality of rod-shaped light emitting cells are located on the buffer layer to be spaced apart from one another. Each of the light emitting cells has an n-layer, an active layer and a p-layer. Meanwhile, wires connect the spaced light emitting cells in series or parallel. Accordingly, arrays of the light emitting cells connected in series are connected to be driven by currents flowing in opposite directions. Thus, there is provided a light emitting device that can be directly driven by an AC power source.
    Type: Grant
    Filed: July 4, 2005
    Date of Patent: July 27, 2010
    Assignee: Seoul Opto Device Co., Ltd.
    Inventor: Chung Hoon Lee
  • Publication number: 20100181578
    Abstract: A package structure is described. A light emitting element and a light sensing element are disposed on a substrate, and are both wrapped by a package layer. Meanwhile, the light emitting element and the light sensing element are separated by a trench of the package layer, such that lights generated by the light emitting element are blocked, thereby reducing the noise interference on the light sensing element and improving the sensing precision of the light sensing element.
    Type: Application
    Filed: March 17, 2009
    Publication date: July 22, 2010
    Applicant: PixArt Imaging Inc.
    Inventors: Kuo-Hsiung LI, Hui-Hsuan Chen
  • Patent number: 7745836
    Abstract: Provided are a superluminescent diode with a high optical power and a broad wavelength band, and a method of fabricating the same. The superluminescent diode includes: at least one high optical confinement factor (HOCF) region; and at least one low optical confinement factor (LOCF) region having a lower optical confinement factor than the HOCF region. The method includes obtaining a difference of optical confinement factors in the HOCF region and the LOCF region through a selective area growth method, the selective area growth method using a deposition thicknesses difference of thin layers according to a width difference of openings that expose a substrate.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: June 29, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jung-Ho Song, Ki-Soo Kim, Young-Ahn Leem, Gyung-Ock Kim
  • Patent number: 7741666
    Abstract: A backside illuminated imaging sensor includes a semiconductor layer having a P-type region. A frontside and backside P+ doped layers are formed within the semiconductor layer. An imaging pixel having a photodiode is formed within the semiconductor layer, where the photodiode is an N? region formed within the P-type region of the semiconductor layer between the frontside P+ doped layer and the backside P+ doped layer.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: June 22, 2010
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hidetoshi Nozaki, Howard E. Rhodes
  • Patent number: 7736070
    Abstract: Double mold opto-coupler and method for manufacture. A first subassembly is formed that includes a light detector. The first subassembly is molded with a first mold material to form a molded first subassembly. A light source is attached to the molded first sub-assembly to form a second sub-assembly. The second sub-assembly is molded with a second mold material to form a final assembly with predetermined dimensions.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: June 15, 2010
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Soo Kiang Ho, Hong Sia Tan, Thiam Siew Gary Tay
  • Patent number: 7732825
    Abstract: Disclosed herein is an AC light emitting diode. The light emitting diode comprises a plurality of light emitting cells two-dimensionally arranged on a single substrate. Wires electrically connect the light emitting cells to one another to thereby form a serial array of the light emitting cells. Further, the light emitting cells are spaced apart from one another by distances within a range of 10 to 30 ?m, and the serial array is operated while connected to an AC power source. Accordingly, the excellent operating characteristics and light output power can be secured in an AC light emitting diode with a limited size.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: June 8, 2010
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Dae Won Kim, Yeo Jin Yoon, Dae Sung Kal
  • Patent number: 7732828
    Abstract: A flat panel display is provided. The flat panel display includes a display panel. A light guide plate is disposed below the display panel. At least one optical film is disposed between the display panel and the light guide plate. At least one illuminating device package is disposed in proximity to the side of the light guide plate. The illuminating device package includes an illuminating semiconductor device and a lens encapsulating the illuminating semiconductor device. The lens includes two reflective surfaces disposed at either side of a central axis. A plurality of diffractive surfaces are disposed between the reflective surfaces. Each of the diffractive surfaces has a tilt angle respective to the central axis. A first portion of light beams incident to each of the reflective surfaces is reflected to at least one diffractive surface and then diffracted and collected into a first convergent angle.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: June 8, 2010
    Assignee: Chimei-InnoLux Corporation
    Inventor: Chen-Pin Hung
  • Publication number: 20100127280
    Abstract: Provided is a photo sensor that can be downsized while suppressing occurrence of noise caused by a dark current, and a display device including the photo sensor. The photo sensor used includes a plurality of photodiodes (9-11) formed in a same silicon layer (8). The photodiodes (9-11) have p-type semiconductor regions (9a, 10a, 11a) and n-type semiconductor regions (9c, 10c, 11c) formed respectively in the silicon layer (8). Further, the photodiodes (9-11) are arranged in series so that the respective forward directions will be aligned with each other. In two photodiodes adjacent to each other, the n-type semiconductor region of one of the photodiodes and the p-type semiconductor region of the other photodiode are formed to overlap each other in the thickness direction of the silicon layer.
    Type: Application
    Filed: April 10, 2008
    Publication date: May 27, 2010
    Inventors: Hiromi Katoh, Masakazu Satoh, Benjamin Hadwen
  • Patent number: 7718942
    Abstract: Systems and methods for illumination and color management in a system having a plurality of color sources and a plurality of color sensors, wherein there are more color sources than color sensors are described herein. An embodiment of the method includes emitting a plurality of different colors of light from at least two of the color sources, wherein the plurality of colors consist of different intensities of light emitted by the plurality of color sources. Colors of light emitted by the at least two color sources are detected using at least one of the color sensors. The color rendering index for each of the plurality of colors emitted is determined. A color of light to be emitted by the light sources is selected. The intensities of light to be emitted by the color sources is selected, based at least in part on the color rendering index, to achieve the selected color of light.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: May 18, 2010
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Kevin Len Li Lim, George Panotopoulos, Joon Chok Lee, Yoke Peng Boay, Selvan Manlam
  • Patent number: 7719073
    Abstract: A multilayer device includes an electronic device layer, a first electrode associated with the electronic device layer, an optical layer, a second electrode associated with the optical layer, and an insulator layer provided between the first and second electrodes. The first and second electrodes are capacitively coupled to each other to facilitate electrical communication between the electronic device layer and the optical layer through transmission of an electrical signal between the first and second electrodes. The electrical signal may be transmitted through the insulator layer. In addition, the electronic device layer and the optical layer may be in electrical communication with each other through capacitive coupling of the first electrode and the second electrode.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: May 18, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore I. Kamins, Duncan Stewart, Nathaniel J. Qultoriano
  • Publication number: 20100109021
    Abstract: A reflection-type photointerrupter of the present invention includes a substrate, a light emitting element and a light receiving element. The substrate includes a first surface, a second surface opposite the first surface, and a first and a second recesses that are open in the first surface side. The light emitting element is arranged in the first recess, while the light receiving element is arranged in the second recess. The light emitting element is capable of emitting light. The light receiving element is capable of receiving the light emitted from the light emitting element and reflected by an object to be detected.
    Type: Application
    Filed: November 3, 2009
    Publication date: May 6, 2010
    Applicant: ROHM CO., LTD.
    Inventor: Tomoharu HORIO
  • Patent number: 7710019
    Abstract: An organic light-emitting diode (OLED) display includes a substrate, an auxiliary electrode disposed on the substrate, a first signal line disposed on the substrate, a second signal line crossing the first signal line, a driving voltage line disposed on the substrate, a first thin film transistor connected to the first signal line and the second signal line, a second thin film transistor connected to the first thin film transistor and the driving voltage line, a first electrode connected to the second thin film transistor, a second electrode facing the first electrode, and a light-emitting member disposed between the first electrode and the second electrode. The auxiliary electrode is connected to one of the driving voltage line and the second electrode.
    Type: Grant
    Filed: November 7, 2006
    Date of Patent: May 4, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-Chul Jung, Beohm-Rock Choi, Nam-Deog Kim
  • Patent number: 7709851
    Abstract: A thin-film light-emitting diode chip, in which the distance between a mirror layer (4) and a light-generating active zone (3) is set in such a way that a radiation emitted by the active zone (3) interferes with a light reflected from the mirror layer (4), the internal quantum efficiency of the active zone (3) being influenced by this interference and the emission characteristic of the active zone (3) of at least one preferred direction thereby being obtained.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: May 4, 2010
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Stefan Bader, Wolfgang Schmid
  • Patent number: 7709774
    Abstract: The invention relates to a color lighting device comprising at least one light-emitting source (1a, 1b, 1c) fixed on a common substrate (3), each light-emitting source (1a, 1b, 1c) comprising at least one light-emitting diode (LED) (1a, 1b, 1c), each light-emitting source (1a, 1b, 1c) comprising one photosensor (2a, 2b, 2c) that detects the light output only of the associated light source (1a, 1b, 1c), and each light-emitting source (1a, 1b, 1c) being connected to an analog control circuit (4a, 4b, 4c) that controls the drive of each light-emitting source (1a, 1b, 1c) separately on the basis of a light output detected by the associated photosensor (2a, 2b, 2c), while each control circuit (4a, 4b, 4c) comprises a comparator (5a, 5b, 5c) connected to the associated photosensor (2a, 2b, 2c).
    Type: Grant
    Filed: October 9, 2006
    Date of Patent: May 4, 2010
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Volkmar Schulz, Eduard Johannes Meijer
  • Patent number: 7710028
    Abstract: Reducing the manufacturing cost of an EL display device and an electronic device furnished with the EL display device is taken as an objective. A textured structure in which projecting portions are formed on the surface of a cathode is used. External stray light is diffusely (irregularly) reflected by the action of the projecting portions when reflected by the surface of the cathode, and therefore a defect in which the face of an observer or the surrounding scenery is reflected in the surface of the cathode can be prevented. This can be completed without using a conventionally necessary high price circular polarizing film, and therefore it is possible to reduce the cost of manufacturing the EL display device.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: May 4, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 7709358
    Abstract: Optoelectronic device including integrated light emitting device and photodiode. The optoelectronic device includes a light emitting device such as a vertical cavity surface emitting laser (VCSEL) or resonant cavity light emitting diode (RCLED). A photodiode is also included in the optoelectronic device. Between the light emitting device and the photodiode is a transition region. At least part of the transition region is shorted. A metal contact provides a contact to both the light emitting device and the photodiode.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: May 4, 2010
    Assignee: Finisar Corporation
    Inventors: James Guenter, James R. Biard
  • Publication number: 20100096640
    Abstract: Optical analysis system fluidically self-assembled using shape-coded freestanding optoelectronic components and a template having shape-coded recessed binding sites connected by an embedded interconnect network. Also includes methods of manufacture and use for optical analyses.
    Type: Application
    Filed: July 2, 2009
    Publication date: April 22, 2010
    Applicant: WASHINGTON, UNIVERSITY OF
    Inventors: Samuel Kim, Babak Amirparviz, Deirdre Meldrum, Ehsan Saeedi
  • Patent number: 7700957
    Abstract: The invention proposes a process for producing electrical contact connections for at least one component which is integrated in a substrate material, the substrate material having a first surface region, and at least one terminal contact being arranged at least partially in the first surface region for each component, which is distinguished in particular by application of a covering to the first surface region and production of at least one contact passage which, in the substrate material, runs transversely with respect to the first surface region, in which process, in order to form at least one contact location in a second surface region which is to be provided, at least one electrical contact connection from the contact location to at least one of the terminal contacts is produced via the respective contact passages.
    Type: Grant
    Filed: September 22, 2004
    Date of Patent: April 20, 2010
    Assignee: Schott AG
    Inventors: Florian Bieck, Jürgen Leib
  • Patent number: 7700941
    Abstract: A surface-emitting semiconductor laser includes an active zone, the active zone having a p-n-junction and surrounded by a first n-doped semiconductor layer and at least one p-doped semiconductor layer; a tunnel contact layer on the p-side of the active zone; an n-doped current-carrying layer that covers the tunnel contact layer, the n-doped current-carrying layer comprising a raised portion; and a structured layer having an optical thickness at least equal to the optical thickness of the current-carrying layer in the region of the raised portion, wherein the structured layer is disposed on the current-carrying layer within a maximum distance of 2 ?m from the raised portion.
    Type: Grant
    Filed: April 11, 2006
    Date of Patent: April 20, 2010
    Assignee: Vertilas GmbH
    Inventor: Markus Ortsiefer
  • Patent number: 7696590
    Abstract: A housing accommodating a semiconductor chip is set out. The housing and chip may be used for sending and/or receiving radiation. Popular applications of the housing may be in light emitting diodes. The housing includes a conductor strip that is punched into two electrically isolated portions. The housing further includes a cavity extending inwards from the top of the housing. The conductor portions include respective areas that are exposed at the bottom of the cavity. The semiconductor chip is bonded to one of the exposed areas and a wire bonds the chip to the second exposed area. The conductor portions also terminate in exposed electrodes, which allow for electrical connection of the chip with external devices. A window is formed in the cavity and the walls of the housing that form the cavity may be made of a reflective material. The electrodes remain unexposed to the window but for any residual areas about the chip and bonding wire within the first and second exposed areas.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: April 13, 2010
    Assignee: OSRAM GmbH
    Inventors: Gunter Waitl, Herbert Brunner
  • Patent number: 7692101
    Abstract: A model and method are provided for lowering device jitter by controlling the stackup of PCB planes so as to minimize inductance between a FPGA and PCB voltage planes for critical core voltages within the FPGA. Furthermore, a model and method are provided for lowering jitter by controlling the stackup of package substrate planes so as to minimize inductance between a die and substrate voltage planes for critical core voltages within the die.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: April 6, 2010
    Assignee: Xilinx, Inc.
    Inventor: Anthony T. Duong
  • Patent number: 7692199
    Abstract: An object of the invention is to provide a lighting device which can suppress luminance nonuniformity in a light emitting region when the lighting device has large area. A layer including a light emitting material is formed between a first electrode and a second electrode, and a third electrode is formed to connect to the first electrode through an opening formed in the second electrode and the layer including a light emitting material. An effect of voltage drop due to relatively high resistivity of the first electrode can be reduced by electrically connecting the third electrode to the first electrode through the opening.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: April 6, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventor: Yasuyuki Arai
  • Patent number: 7690805
    Abstract: There is provided a lighting device that lights a liquid crystal panel, including a substrate (51) on which red, green and blue light separating plates (52R, 52G, 52B) are alternately disposed with a pitch of w in array. Red LEDs (53R) are disposed one at every other center between the green and blue light separating plates (52G, 52B), green LEDs 53G are disposed one at every other center between the blue and red light separating plates (52B, 52R), and blue LEDs (53B) are disposed one at every other center between the red and green light separating plates (52R, 52G).
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: April 6, 2010
    Assignee: Sony Corporation
    Inventors: Shigeo Kubota, Toshitaka Kawashima, Junichi Osako, Hiroyuki Okita
  • Publication number: 20100065859
    Abstract: A semiconductor device includes a substrate, and a semiconductor thin film bonded to the substrate, wherein the semiconductor thin film includes a plurality of discrete operating regions and an element isolating region which isolates the plurality of discrete operating regions, and the element isolating region is etched to a shallower depth than a thickness of the semiconductor thin film, and is a thinner region than the plurality of discrete operating regions.
    Type: Application
    Filed: October 22, 2009
    Publication date: March 18, 2010
    Inventors: Takahito Suzuki, Hiroyuki Fujiwara
  • Patent number: 7675070
    Abstract: An LED has a light-generating semiconductor region formed on a baseplate via an electroconductive reflector layer. The light-generating semiconductor region has an active layer sandwiched between a pair of claddings of opposite conductivity types for generating light. For good ohmic contact with the light-generating semiconductor region without any substantive diminution of reflectivity compared to that of unalloyed silver, the reflector layer is made from a silver-base alloy containing a major proportion of silver and at least either one of copper, gold, palladium, neodymium, silicon, iridium, nickel, tungsten, zinc, gallium, titanium, magnesium, yttrium, indium, and tin.
    Type: Grant
    Filed: January 2, 2007
    Date of Patent: March 9, 2010
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Hidekazu Aoyagi, Koji Otsuka
  • Patent number: 7671373
    Abstract: An LED chip package structure using a ceramic material as a substrate includes a ceramic substrate, a conductive unit, a hollow ceramic casing, a plurality of LED chips, and a package colloid. The ceramic substrate has a main body, and a plurality of protrusions extended from three faces of the main body. The conductive unit has a plurality of conductive layers formed on the protrusions, respectively. The hollow casing is fixed on a top face of the main body to form a receiving space for exposing a top face of each conductive layer. The LED chips are received in the receiving space, and each LED chip has a positive electrode side and a negative electrode side respectively and electrically connected to different conductive layers. In addition, the packaging colloid is filled into the receiving space for covering the LED chips.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: March 2, 2010
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Jonnie Chuang, Chia-Hung Chen
  • Publication number: 20100044723
    Abstract: A package for a photoelectric wiring in which a pair of light emitting and receiving devices are mounted as optical devices on a lead frame having an optical waveguide in which an optical waveguide having a plurality of core portions disposed in parallel and surrounded by a cladding is mounted on a support plate of a lead frame having a mirror section including the support plate for supporting the optical waveguide, mirror sections having a mirror surface portion formed by bending both edges of the support plate at an angle of 45 degrees with respect to a planar direction of the support plate in a side direction, and lead portions to be electrically connected to the optical devices, the support plate, the mirror sections and the lead sections being formed by pressing a metallic material, wherein the light emitting device and the light receiving device are mounted in alignment with an optical path of a light reflected by the mirror surface portion and transmitted through the core portions at one of sides and t
    Type: Application
    Filed: August 24, 2009
    Publication date: February 25, 2010
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Takanori Yamamoto
  • Patent number: 7667237
    Abstract: A light-emitting device operating on a high drive voltage and a small drive current. LEDs (1) are two-dimensionally formed on an insulating substrate (10) of e.g., sapphire monolithically and connected in series to form an LED array. Two such LED arrays are connected to electrodes (32) in inverse parallel. Air-bridge wiring (28) is formed between the LEDs (1) and between the LEDs (1) and electrodes (32). The LED arrays are arranged zigzag to form a plurality of LEDs (1) to produce a high drive voltage and a small drive current. Two LED arrays are connected in inverse parallel, and therefore an AC power supply can be used as the power supply.
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: February 23, 2010
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Shiro Sakai, Jin-Ping Ao, Yasuo Ono
  • Patent number: 7659531
    Abstract: A method is disclosed. The method includes forming a substrate with a leadframe and a molding compound. The molding compound fills internal spaces in the leadframe and forms a dam structure. An optical emitter and an optical receiver are placed on the substrate. An optically transmissive medium is formed between the optical emitter and optical receiver.
    Type: Grant
    Filed: April 13, 2007
    Date of Patent: February 9, 2010
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Yoon Hwa Choi, Yong Suk Kwon, Maria Clemens Y. Quinones
  • Publication number: 20100027577
    Abstract: An optoelectronics chip-to-chip interconnects system is provided, including at least one packaged chip to be connected on the printed-circuit-board with at least one other packaged chip, optical-electrical (O-E) conversion mean, waveguide-board, and (PCB). Single to multiple chips interconnects can be interconnected provided using the technique disclosed in this invention. The packaged chip includes semiconductor die and its package based on the ball-grid array or chip-scale-package. The O-E board includes the optoelectronics components and multiple electrical contacts on both sides of the O-E substrate. The waveguide board includes the electrical conductor transferring the signal from O-E board to PCB and the flex optical waveguide easily stackable onto the PCB to guide optical signal from one chip-to-other chip. Alternatively, the electrode can be directly connected to the PCB instead of including in the waveguide board. The chip-to-chip interconnections system is pin-free and compatible with the PCB.
    Type: Application
    Filed: July 31, 2007
    Publication date: February 4, 2010
    Applicant: BANPIL PHOTONICS, INC.
    Inventor: ACHYUT KUMAR DUTTA
  • Patent number: RE41336
    Abstract: A fabrication process for a semiconductor device including a plurality of semiconductor layers, the plurality of semiconductor layers including at least a nitrogen-containing alloy semiconductor AlaGabIn1-a-bNxPyAszSb1-x-y-z (0?a?1, 0?b?1, 0<x<1, 0?y<1, 0?z<1), and a method of making the semiconductor device and apparatus. For at least two semiconductor layers out of the plurality of semiconductor layers, a value of lattice strain of said at least two semiconductor layers is set at less than a critical strain at which misfit dislocations are generated at an interface between said two adjacent semiconductor layers.
    Type: Grant
    Filed: January 2, 2003
    Date of Patent: May 18, 2010
    Assignee: Opnext Japan, Inc
    Inventors: Masahiko Kondow, Kazuhisa Uomi, Hitoshi Nakamura