Light Coupled Transistor Structure Patents (Class 257/83)
  • Publication number: 20040135157
    Abstract: A combined semiconductor apparatus includes a semiconductor substrate having an integrated circuit, a planarized region formed in a surface of the semiconductor substrate, and a semiconductor thin film including at least one semiconductor device and bonded on the planarized region. A surface of the semiconductor thin film, in which the semiconductor device is formed, is disposed on a side of the planarized region. The apparatus may further include a planarized film disposed between the planarized region and the semiconductor thin film.
    Type: Application
    Filed: December 23, 2003
    Publication date: July 15, 2004
    Inventors: Mitsuhiko Ogihara, Hiroyuki Fujiwara, Masaaki Sakuta, Ichimatsu Abiko
  • Patent number: 6759682
    Abstract: An electro-luminescence panel that is adaptive for maximizing a capacitance of a storage capacitor. A plurality of electro-luminescence cells are arranged at crossings between gate lines and data lines in the panel. An electro-luminescence cell driving circuit drives the electro-luminescence cells. In the driving circuit, a power supply supplies power to the electro-luminescence cells. A first thin film transistor is connected between the power supply and the electro-luminescence cell. A second thin film transistor is connected between the data line and a gate electrode of the first thin film transistor to serve a switch of the electro-luminescence cell. A storage capacitor is connected between the gate electrode of the first thin film transistor and a pre-stage gate line. Accordingly, a capacitance value of the storage capacitor is maximized with the aid of the pre-stage gate line upon formation of the storage capacitor, thereby preventing flicker caused by a kickback phenomenon.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: July 6, 2004
    Assignee: LG.Philips LCD Co., Ltd.
    Inventor: Sung Joon Bae
  • Publication number: 20040113161
    Abstract: The present invention provides a thin film transistor structure in which at least a trench is formed in an insulating polymer film formed on a substrate. In the thin film transistor structure, a trench formed in the insulating polymer film accommodates a gate wiring constituted of a plurality of conductive layers. Provided also are a method of manufacturing the thin film transistor structure, and a display device including a thin film transistor array composed of the thin film transistors constituted as described above.
    Type: Application
    Filed: January 16, 2004
    Publication date: June 17, 2004
    Inventors: Hiroshi Suzuki, Kuniaki Sueoka
  • Patent number: 6744198
    Abstract: The invention provides a method for manufacturing a display device that includes a light-transmitting substrate and, above the light-transmitting substrate, a plurality of light-emitting elements arrayed in a plane, driving elements connected to the light-emitting elements, a bank layer disposed in the boundary areas between the plurality of light-emitting elements, and wires connected to the driving elements. In this method, the wires are formed by patterning a light-shielding, conductive layer on the light-transmitting substrate so as to have a shape in plan view corresponding to the shape of the bank layer in plan view. Then, the wires, acting as a mask, are exposed from the rear surface of the substrate to form the bank layer by self-aligning above the wires. Then, the light-emitting elements are formed in the areas surrounded by the bank layer.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: June 1, 2004
    Assignee: Seiko Epson Corporation
    Inventor: Yukiya Hirabayashi
  • Patent number: 6738119
    Abstract: A liquid crystal display includes a first substrate; a second substrate cohered to the first substrate with a separation from the first substrate; a first orientation film formed on an inner surface of the first substrate; a second orientation film formed on an inner surface of the second substrate; and a liquid crystal injected between the first substrate and the second substrate, wherein the first orientation film and the second orientation film are formed to face each other, and the thickness of the first orientation film or the second orientation film is formed differently in different portions.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: May 18, 2004
    Assignee: LG.Philips LCD Co., Ltd.
    Inventors: Yong Bum Kim, Woo Hyun Kim, Jae Hong Jun
  • Patent number: 6720197
    Abstract: The present invention provides a surface-emitting laser wherein the transverse modes are controlled and phase-synchronized laser beams are emitted from a plurality of light-emitting portions to produce what appears to be a single laser beam, and a method of fabrication thereof. This laser comprises a columnar portion (20) forming part of a reflective mirror on a light-emitting side, an embedding layer (22) surrounding the periphery of the columnar portion (20), an upper electrode (23) formed on the columnar portion (20) and the embedding layer (22), and an insulating layer (18) formed below the columnar portion (20) and the embedding layer (22). A plurality of aperture portions (23a) are formed in the upper electrode (23) above the columnar portion (20), and aperture portions (18a) are formed in the insulation layer (18) at positions corresponding to the aperture portions (23a).
    Type: Grant
    Filed: June 5, 2001
    Date of Patent: April 13, 2004
    Assignee: Seiko Epson Corporation
    Inventor: Takeo Kaneko
  • Patent number: 6717182
    Abstract: A self-scanning light-emitting element array using an end face light-emitting thyristor having improved external emission efficiency is provided. To improve the external emission efficiency of the end face light-emitting thyristor, the present invention adopts such structure that the current injected from an anode is concentrated to near the end face of the light-emitting thyristor. A self-scanning light-emitting element array is implemented by using such end face light-emitting thyristor.
    Type: Grant
    Filed: February 8, 2001
    Date of Patent: April 6, 2004
    Assignee: Nippon Sheet Glass Co., Ltd.
    Inventors: Takashi Tagami, Yukihisa Kusuda, Seiji Ohno, Nobuyuki Komaba
  • Publication number: 20040061422
    Abstract: A light emitting device comprises a gate electrode, a channel comprising a molecule for electrically stimulated optical emission, wherein the molecule is disposed within an effective range of the gate electrode, a source coupled to a first end of the channel injecting electrons into the channel, and a drain coupled to a second end of the channel injecting holes into the channel.
    Type: Application
    Filed: September 26, 2002
    Publication date: April 1, 2004
    Applicant: International Business Machines Corporation
    Inventors: Phaedon Avouris, Richard Martel, James A. Misewich, James Chen-Hsiang Tsang
  • Publication number: 20040046176
    Abstract: Disclosed is an avalanche phototransistor capable of being used as a photo detector of high performance. The avalanche phototransistor comprises an emitter photoabsorption layer having a function to detect an infrared light, a thin avalanche-gain layered-structure including a charge layer and a multiplication layer having a thickness of 5,000 Å or less, and a hot electron transition layer. The avalanche phototransistor employs a three-terminal structure which consists of an emitter, a base and a collector. Even if a lower voltage than that of an avalanche photodiode is applied to the avalanche phototransistor, high gain can be obtained and sensitivity of the phototransistor can be increased. High current, high output and high operation speed can be accomplished using a hot electron effect. Further, stability of elements and reliance can be increased, and multiple operation functions can be obtained due to the increased number of terminals.
    Type: Application
    Filed: February 12, 2003
    Publication date: March 11, 2004
    Inventors: Gyung-Ock Kim, In-Gyoo Kim
  • Patent number: 6700138
    Abstract: A modular semiconductor die package is provided. The semiconductor die package includes a polymer base for mounting at least one semiconductor die. A polymer cap is operatively secured over the base forming a cavity. The cap includes a light transmissive member operatively positioned to allow light of predetermined wavelengths to pass between at least a portion of the surface of the die and the light transmissive member. A plurality of conductive leads extend through the base to form connections with the semiconductor die(s) positioned in the cavity.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: March 2, 2004
    Assignee: Silicon Bandwidth, Inc.
    Inventors: Stanford W. Crane, Jr., Jennifer Colegrove, Zsolt Horvath, Myoung-soo Jeon, Joshua Nickel, Lei-Ming Yang
  • Patent number: 6693303
    Abstract: A nitride semiconductor device is composed of Group III nitride semiconductors. The device includes an active layer, and a barrier layer made from a predetermined material and provided adjacent to the active layer. The barrier layer has a greater band-gap than that of the active layer. The device also includes a barrier portion formed of the predetermined material for surrounding a threading dislocation in the active layer. The barrier portion has a vertex. The device also includes a semiconductor layer having an impurity concentration ranging from 1E16/cc to 1E17/cc in which the vertex is placed.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: February 17, 2004
    Assignees: Pioneer Corporation, Rohm Co., Ltd.
    Inventors: Hiroyuki Ota, Masayuki Sonobe, Norikazu Ito, Tetsuo Fujii
  • Patent number: 6690041
    Abstract: The present invention relates to the design of and includes monolithically integrated diodes for use in planar, thin-film, photovoltaic devices, such as solar cells.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: February 10, 2004
    Assignee: Global Solar Energy, Inc.
    Inventors: Joseph H. Armstrong, Scott Wiedeman, Lawrence M. Woods
  • Patent number: 6677613
    Abstract: There is provided an active matrix type display device in which the display device is formed of a driver circuit with an insulated gate FET capable of operating at high speed, and even if an area of a pixel electrode per unit pixel is made small, sufficient storage capacitance can be obtained. In a semiconductor device comprising an active matrix circuit with an insulated gate field effect transistor having at least an active layer made of single crystalline semiconductor, an organic resin insulating layer is formed over the insulated gate field effect transistor, a storage capacitance is formed of a light shielding layer formed over the organic resin insulating layer, a dielectric layer formed to be in close contact with the light shielding layer, and a light reflecting electrode connected to the insulated gate field effect transistor.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: January 13, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Murakami, Yasuyuki Arai
  • Patent number: 6677616
    Abstract: A method of fabricating a thin film transistor substrate for an X-ray detector reduces the number of steps in etching processes using masks. In the method, a gate line, a gate pad and a gate electrode of a thin film transistor are simultaneously formed on a certain substrate. A gate insulating layer is entirely coated, and then a semiconductor layer of the thin film transistor is formed. A data pad, a data line, source and drain electrodes of the thin film transistor and a ground electrode are simultaneously formed. An electrode for a charging capacitor is formed, and then an insulating film for the charging capacitor is formed. An electrode for preventing an etching of the insulating film for the charging capacitor is formed. A protective film for protecting the thin film transistor is formed. Contact holes are formed in the protective film. Finally, a pixel electrode is provided.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: January 13, 2004
    Assignee: LG.Philips LCD Co., Ltd.
    Inventor: Ik Soo Kim
  • Publication number: 20030227021
    Abstract: A light emission device manufactured by a method of forming a curved surface having a radius of curvature to the upper end of an insulator 19, exposing a portion of the first electrode 18c to form an inclined surface in accordance with the curved surface, and applying etching so as to expose the first electrode 18b in a region to form a light emission region, in which emitted light from the layer containing the organic compound 20 is reflected on the inclined surface of the first electrode 18c to increase the total take-out amount of light in the direction of an arrow shown in FIG.
    Type: Application
    Filed: June 4, 2003
    Publication date: December 11, 2003
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takeshi Noda, Yoshinari Higaki
  • Patent number: 6657237
    Abstract: A GaN based III-V nitride semiconductor light-emitting device and a method for fabricating the same are provided. In the GaN based III-V nitride semiconductor light-emitting device including first and second electrodes arranged facing opposite directions or the same direction with a high-resistant substrate therebetween and material layers for light emission or lasing, the second electrode directly contacts a region of the outmost material layer exposed through an etched region of the high-resistant substrate. A thermal conductive layer may be formed on the bottom of the high-resistant substrate to cover the exposed region of the outmost material layer.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: December 2, 2003
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Joon-seop Kwak, Kyo-yeol Lee, Jae-hee Cho, Su-hee Chae
  • Publication number: 20030197182
    Abstract: A thin film transistor array substrate including a gate pattern having a gate electrode, a gate line connected to the gate electrode, and a gate pad connected to the gate line, a source/drain pattern having a source electrode, a drain electrode, a data line connected to the source electrode, and a data pad connected to the data line, a gate insulating pattern formed along a matrix pattern including the gate pattern and the source/drain pattern except for a pixel area, a semiconductor pattern formed on the gate insulating pattern having a same pattern as the gate insulating pattern and partially removed at a thin film transistor area and the gate line area, and a transparent electrode pattern having a pixel electrode formed at the pixel area and connected to the drain electrode, a gate pad protective electrode formed on the gate-pad, and a data pad protective electrode formed on the data pad.
    Type: Application
    Filed: March 12, 2003
    Publication date: October 23, 2003
    Applicant: LG. PHILIPS LCD CO., LTD.
    Inventors: Woong Kwon Kim, Heung Lyul Cho
  • Publication number: 20030197187
    Abstract: A thin film transistor array substrate, and its manufacturing method, that is made using a three-round mask process. Gate patterns, each of which includes a gate line consisting of a transparent metal pattern and a gate metal pattern, a gate electrode, a lower gate pad, a lower data pad, and a pixel electrode are formed using a first mask process. A second mask process forms a gate insulating pattern and a semiconductor pattern. A third mask process forms source and drain patterns, each of which includes a data line, a source electrode, a drain electrode, an upper gate pad and an upper data pad. Additionally, the gate metal pattern on an upper portion of the pixel electrode is removed.
    Type: Application
    Filed: October 21, 2002
    Publication date: October 23, 2003
    Inventors: Woong Kwon Kim, Heung Lyul Cho, Seung Hee Nam
  • Publication number: 20030178628
    Abstract: A display apparatus according to the present invention is provided with a gate line 2 formed on an insulating substrate, a source line 13 intersecting with the gate line 2 with an insulating film in between, a source electrode 6 connected to the source line 13, a drain electrode 10 connected to a pixel electrode 9, a semiconductor layer 4 formed below the source electrode 6, the source line 13, and the drain electrode 10, a light-shielding pattern 12 configured below the semiconductor layer 4 lying below the source line 13, and a backlight emitting lights from a light source to the surface of the insulating substrate opposite to where pixels are formed. In this configuration, leakage current arisen in the semiconductor layer lying below the source line, the extending pattern of the drain electrode, and so on can be suppressed.
    Type: Application
    Filed: September 9, 2002
    Publication date: September 25, 2003
    Applicant: ADVANCED DISPLAY INC.
    Inventors: Hironori Aoki, Shigeaki Noumi, Takafumi Hashiguchi
  • Publication number: 20030173570
    Abstract: An insulated-gate field-effect transistor adapted to be used in an active-matrix liquid-crystal display. The channel length, or the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the channel. Offset regions are formed in the channel region on the sides of the source and drain regions. No or very weak electric field is applied to these offset regions from the gate electrode.
    Type: Application
    Filed: March 18, 2003
    Publication date: September 18, 2003
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki, Yasuhiko Takemura, Hongyong Zhang, Hideki Uochi, Hideki Nemoto
  • Patent number: 6617608
    Abstract: An electro-luminescent display and a method of manufacturing thereof prevents the formation of a barrier interface between the anode electrode and the electro-luminescent layer by placing the electro-luminescent layer directly on the anode electrode so that there is no need to etch a subsidiary layer so that the electro-luminescent layer and the anode electrode have excellent electrical contact. The elimination of this etching step prevents damage to the anode electrode caused by collision of ions with the anode electrode during the etching process. Further, etch remainders or contaminant particles that exist in the etchant gas are prevented from accumulating on the anode electrode. Thus, the charge carriers of the anode are easily transported across the interface between the anode electrode and the electro-luminescent layer so as to greatly improve the expected life span, the brightness, and the efficiency of the electro-luminescent display.
    Type: Grant
    Filed: April 17, 2000
    Date of Patent: September 9, 2003
    Assignee: LG. Philips LCD Co., Ltd.
    Inventors: Sung-Joon Bae, Jae-Yong Park
  • Publication number: 20030164506
    Abstract: The present invention is a semiconductor structure for light emitting devices that can emit in the red to ultraviolet portion of the electromagnetic spectrum. The semiconductor structure includes a first cladding layer of a Group III nitride, a second cladding layer of a Group III nitride, and an active layer of a Group III nitride that is positioned between the first and second cladding layers, and whose bandgap is smaller than the respective bandgaps of the first and second cladding layers. The semiconductor structure is characterized by the absence of gallium in one or more of these structural layers.
    Type: Application
    Filed: March 1, 2003
    Publication date: September 4, 2003
    Inventors: John Adam Edmond, Kathleen Marie Doverspike, Hua-Shuang Kong, Michael John Bergmann
  • Publication number: 20030155578
    Abstract: The invention relates to a heterostructure with a buffer layer or substrate, a channel arranged on the buffer layer or substrate and a capping layer arranged on the channel. Said channel is made from a piezopolar material and either the region around the boundary interface between the buffer layer or substrate and the channel, or the region around the boundary interface between the channel and the capping layer is doped in such a way that any piezo charging which occurs at the respective boundary interface is compensated.
    Type: Application
    Filed: February 12, 2003
    Publication date: August 21, 2003
    Inventors: Erhard Kohn, Ingo Daumiller, Markus Kamp, Matthias Seyboth
  • Patent number: 6597034
    Abstract: A non-volatile memory comprising a semiconductor active layer provided on an insulating substrate, an insulating film provided on the semiconductor active layer, a floating gate electrode provided on the insulating film, an anodic oxidized film obtained by anodic oxidation of the floating gate electrode, and a control gate electrode provided in contact with the anodic oxidized film, and a semiconductor device, particularly a liquid crystal display device comprising the non-volatile memory.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: July 22, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Publication number: 20030116772
    Abstract: In an active matrix type light emitting device, a top surface exit type light emitting device in which an anode formed at an upper portion of an organic compound layer becomes a light exit electrode is provided. In a light emitting element made of a cathode, an organic compound layer and an anode, a protection film is formed in an interface between the anode that is a light exit electrode and the organic compound layer. The protection film formed on the organic compound layer has transmittance in the range of 70 to 100%, and when the anode is deposited by use of the sputtering method, a sputtering damage to the organic compound layer can be inhibited from being inflicted.
    Type: Application
    Filed: October 29, 2002
    Publication date: June 26, 2003
    Inventors: Shunpei Yamazaki, Toshimitsu Konuma, Hiroko Yamazaki
  • Patent number: 6570187
    Abstract: The invention concerns a light emitting and guiding device comprising at least one active region (22) in silicon and the means for creating photons in the said active region. In accordance with the invention, the means for creating the photons comprise a diode (22c, 22d) formed in the active region. In addition, the device includes the means for confining the carriers injected by the diode, and the silicon in the active region is mono-crystalline.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: May 27, 2003
    Assignee: Commissariat a l′Energie Atomique
    Inventors: Jean-Louis Pautrat, Hélène Ulmer, Noël Magnea, Emmanuel Hadji
  • Publication number: 20030096441
    Abstract: A method of fabricating a thin film transistor substrate for an X-ray detector reduces the number of steps in etching processes using masks. In the method, a gate line, a gate pad and a gate electrode of a thin film transistor are simultaneously formed on a certain substrate. A gate insulating layer is entirely coated, and then a semiconductor layer of the thin film transistor is formed. A data pad, a data line, source and drain electrodes of the thin film transistor and a ground electrode are simultaneously formed. An electrode for a charging capacitor is formed, and then an insulating film for the charging capacitor is formed. An electrode for preventing an etching of the insulating film for the charging capacitor is formed. A protective film for protecting the thin film transistor is formed. Contact holes are formed in the protective film. Finally, a pixel electrode is provided.
    Type: Application
    Filed: December 30, 2002
    Publication date: May 22, 2003
    Applicant: LG.Philips LCD Co., LTD
    Inventor: Ik Soo Kim
  • Patent number: 6555403
    Abstract: There are provided a semiconductor laser, a semiconductor light emitting device, and methods of manufacturing the same wherein a threshold current density in a short wavelength semiconductor laser using a nitride compound semiconductor can be reduced. An active layer is composed of a single gain layer having a thickness of more than 3 nm, and optical guiding layers are provided between the active layer and cladding layers respectively.
    Type: Grant
    Filed: July 30, 1998
    Date of Patent: April 29, 2003
    Assignee: Fujitsu Limited
    Inventors: Kay Domen, Shinichi Kubota, Akito Kuramata, Reiko Soejima
  • Patent number: 6552366
    Abstract: An insulation film (silicon dioxide film) is laminated on a platform substrate of Si, etc., and a transmitting unit wiring pattern and a receiving unit wiring pattern are provided on the insulation film. Although a base intruded in a convex shape is provided at the bottom of a light emitting device (LED) of the platform substrate, this base is not provided at the bottom of a light receiving device, and the insulation film under the light receiving device becomes thick. A groove is formed in a waveguide, and a WDM filter is mounted. A diamond or SiC layer can also be provided beneath the insulation film to improve the insulation resistance, and a conduction layer is provided beneath the diamond or SiC layer. Electrical crosstalk is suppressed by grounding the conduction layer. Optical crosstalk is improved by locating the LED at the entrance/exit of the WDM filter and the light receiving device on the opposite side.
    Type: Grant
    Filed: July 24, 1998
    Date of Patent: April 22, 2003
    Assignee: Fujitsu Limited
    Inventors: Koji Terada, Haruhiko Tabuchi, Kazuhiro Tanaka
  • Patent number: 6545333
    Abstract: A device with an optically controlled VT is disclosed. The device includes a semiconductor die which includes an FET, the FET having a gate on an upper surface of a substrate, a body under the gate and a source contacting the body forming a body-to-source junction. A light source is provided for exposing the body to light from the lower surface of the substrate.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: April 8, 2003
    Assignee: International Business Machines Corporation
    Inventors: Mark B. Ketchen, Edward J. Nowak, Jed H. Rankin, Keith C. Stevens
  • Patent number: 6541796
    Abstract: An opto-electronic device has a diffusion area of one conductive type formed in a semiconductor substrate of another conductive type, an ohmic contact layer making contact with the diffusion area, and an electrode making contact with the ohmic contact layer. The diffusion area is formed by solid-phase diffusion. The same mask is used to define the patterns of both the diffusion source layer and the ohmic contact layer, so that the ohmic contact layer is self-aligned with the diffusion area.
    Type: Grant
    Filed: August 20, 2001
    Date of Patent: April 1, 2003
    Assignee: Oki Data Corporation
    Inventors: Masaharu Nobori, Hiroyuki Fujiwara, Masumi Koizumi
  • Patent number: 6541291
    Abstract: In a process for producing a semiconductor light emitting device, first, a lamination including an active zone, cladding layers, and a current confinement layer is formed. Then, a near-edge portion of the lamination having a stripe width is removed so as to produce a first space, and a second near-edge portion located under the first space and a stripe portion of the lamination being located inside the first space and having the stripe width are concurrently removed so that a second space is produced, and cross sections of the active layer and the current confinement layer are exposed in the second space. Finally, the first and second spaces are filled with a regrowth layer so that a dopant to the regrowth layer is diffused into a near-edge region of the remaining portion of the active layer.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: April 1, 2003
    Assignee: Fuji Photo Film Co., Inc.
    Inventor: Toshiaki Kuniyasu
  • Publication number: 20030052324
    Abstract: A semiconductor device is provided in which each pixel includes an electric circuit (a bootstrap circuit) for generating an electric potential that is higher than a voltage given through capacitative coupling. Also, there is provided a semiconductor device in which a sufficient signal amplitude can be attained by using the electric circuit to set a potential difference between both terminals of a photoelectric conversion element to the same value as the power source potential. Further, there is provided a semiconductor device in which the number of manufacturing steps is reduced by using transistors having a single polarity to constitute each pixel, thereby achieving increased yield and reduced costs.
    Type: Application
    Filed: August 8, 2002
    Publication date: March 20, 2003
    Inventor: Hajime Kimura
  • Publication number: 20030047741
    Abstract: The light emitting device includes a p type nitride semiconductor layer, a light emitting layer and an n type nitride semiconductor layer stacked on an Si (silicon) substrate in this order from the side of the Si substrate. The Si substrate is partially removed to expose a part of the p type nitride semiconductor layer. On the exposed region of the p type nitride semiconductor layer, a p type electrode is formed.
    Type: Application
    Filed: September 6, 2002
    Publication date: March 13, 2003
    Inventors: Toshio Hata, Mayuko Fudeta, Daigaku Kimura
  • Patent number: 6528825
    Abstract: Disclosed is a semiconductor emission apparatus capable of emitting only a unimodal beam by a simple configuration without designing materials. The size of a light-leading window provided in a shielding cover is set so as to shield Cherenkov, light generated in a semiconductor laser using a GaN substrate and hold it inside the apparatus. The optical path of Cherenkov light is represented by the conical face with the apex angle having the emitting direction of the beam from the semiconductor laser as an axis. The apex angle at this time is about from 20° to 23°. The light-leading window is to have the cross sectional form in the shielding cover of a conical face with the apex angle defined in the same manner, and the apex angle is to be 20° or less. As a result, the beam pattern emitted from the light-leading window becomes unimodal.
    Type: Grant
    Filed: September 6, 2001
    Date of Patent: March 4, 2003
    Assignee: Sony Corporation
    Inventor: Hiroshi Yoshida
  • Patent number: 6525386
    Abstract: An optoelectronic component has a lens that is formed in the surface of an encapsulant surrounding a semiconductor diode element. With respect to emitters, the lens reduces internal reflection and reduces dispersion to increase overall efficiency. With respect to detectors, the lens focuses photons on the active area of the detector, increasing detector sensitivity, which allows a detector having a reduced size and reduced cost for a given application. The lens portion of the encapsulant is generally non-protruding from the surrounding portions of the encapsulant reducing contact surface pressure caused by the optoelectronic component. This non-protruding lens is particularly useful in pulse oximetry sensor applications. The lens is advantageously formed with a contoured-tip ejector pin incorporated into the encapsulant transfer mold, and the lens shape facilitates mold release.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: February 25, 2003
    Assignee: Masimo Corporation
    Inventors: Michael A. Mills, James P. Coffin, IV
  • Patent number: 6518656
    Abstract: An image pickup device is provided with a reduced profile. There is provided a circuit board that is formed with a predetermined circuit pattern having bonding portions and which has a through hole, a pickup element that has a light-receiving portion and bonded portions and which is secured to one surface of the circuit board by bonding the bonded portions to the bonding portions of the circuit pattern, and a cover body which has a lens portion for guiding incident light to the light-receiving portion of the pickup element through the through hole of the circuit board and that is secured to another surface of the circuit board opposite to the above-mentioned surface such that the through hole is covered.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: February 11, 2003
    Assignee: Sony Corporation
    Inventors: Yoshinori Nakayama, Hirokazu Nakayoshi
  • Publication number: 20030020078
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Optical processing layers can be placed on monocrystalline layers to process photons produced in the monocrystalline layers.
    Type: Application
    Filed: July 25, 2001
    Publication date: January 30, 2003
    Applicant: MOTOROLA, INC.
    Inventors: Tomasz Klosowiak, Kevin Jelley, George Valliath, Barbara Foley Barenburg, Daniel Gamota
  • Publication number: 20030015718
    Abstract: The optical communication module comprises a laminated lead frame composed of a plurality of lead frames that are laminated and held by a tie bar made of an insulating material, and an optical communication functional unit that is disposed on at least one layer of the lead frame. The optical communication functional unit comprises at least one of a light emitting element (LD) and a light receiving element and an optical transmission medium (optical fiber).
    Type: Application
    Filed: July 18, 2002
    Publication date: January 23, 2003
    Inventors: Hiromi Nakanishi, Yoshiki Kuhara, Takeshi Okada
  • Publication number: 20020190256
    Abstract: In the case where a material containing an alkaline metal or an alkaline-earth metal in a cathode, an anode, a buffer layer, or an organic compound layer is used, there is a fear of the diffusion of an impurity ion (representatively, alkaline metal ion or alkaline-earth metal ion) from the EL element to the TFT being generated and causing the variation of characteristics of the TFT.
    Type: Application
    Filed: May 20, 2002
    Publication date: December 19, 2002
    Inventors: Satoshi Murakami, Mitsuhiro Ichijo, Taketomi Asami
  • Patent number: 6489635
    Abstract: A p-i-n photodiode included a heavily dopes epitaxially grown layer of semiconductor. The photodiode is comprised of heterojunctions of epitaxial material grown on an InP semiconductor substrate (12, 14). A heavily doped layer (20) is patterned on top of an InP layer (18) to define the source of p-type diffusion for the definition of the active region (22) of the p-n junction. The epitaxially grown source layer (20) may be comprised of ternary or quaternary III-V semiconductor alloys, typically InxGa1−xAs. The principle can be extended to alloy layers that are not lattice-matched to the InP substrate. The p-type dopant is typically Zn, but may also consist of other commonly used p-type dopants such as Be.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: December 3, 2002
    Assignee: Sensors Unlimited
    Inventor: Alan Richard Sugg
  • Publication number: 20020175335
    Abstract: An array substrate for a transflective liquid crystal display device includes a substrate having a display portion and a surrounding portion, a gate line on the substrate, a gate insulating layer covering the gate line, a data line on the gate insulating layer, a gate pad and a data pad within the surrounding portion, the gate pad connected to the gate line and the data pad connected to the data line, a switching device connected to the gate and data lines, a reflective electrode within the display portion and connected to the switching device, a reflective plate within the surrounding portion, a passivation layer on the reflective electrode and the reflective plate, and a transmissive electrode on the passivation layer and connected to the reflective electrode.
    Type: Application
    Filed: May 22, 2002
    Publication date: November 28, 2002
    Inventor: Joo-Soo Lim
  • Patent number: 6459130
    Abstract: A radiation-emitting and/or radiation-receiving semiconductor component in which a radiation-emitting and/or radiation-receiving semiconductor chip is secured on a chip carrier part of a lead frame. The chip carrier part forms a trough in the region in which the semiconductor chip is secured. Wherein the inner surface of the trough is designed in such a way that it constitutes a reflector for the radiation emitted and/or received by the semiconductor chip.
    Type: Grant
    Filed: November 18, 1999
    Date of Patent: October 1, 2002
    Assignee: Siemens Aktiengesellschaft
    Inventors: Karlheinz Arndt, Herbert Brunner, Franz Schellhorn, Günter Waitl
  • Publication number: 20020134979
    Abstract: To provide an electronic device capable of bright image display. A pixel is structured such that a switching TFT and a current controlling TFT are formed on a substrate and an EL element is electrically connected to the current controlling TFT. A gate capacitor formed between a gate electrode of the current controlling TFT and an LDD region thereof holds a voltage applied to the gate electrode, and hence a capacitor (condenser) is not particularly necessary in the pixel, thereby making the effective light emission area of the pixel large.
    Type: Application
    Filed: February 26, 2002
    Publication date: September 26, 2002
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toshimitsu Konuma, Jun Koyama, Kazutaka Inukai, Mayumi Mizukami
  • Patent number: 6441393
    Abstract: A semiconductor device is provided having n-type device layers of III-V nitride having donor dopants such as germanium (Ge), silicon (Si), tin (Sn), and/or oxygen (O) and/or p-type device layers of III-V nitride having acceptor dopants such as magnesium (Mg), beryllium (Be), zinc (Zn), and/or cadmium (Cd), either simultaneously or in a doping superlattice, to engineer strain, improve conductivity, and provide longer wavelength light emission.
    Type: Grant
    Filed: November 17, 1999
    Date of Patent: August 27, 2002
    Assignee: LumiLeds Lighting U.S., LLC
    Inventors: Werner Goetz, R. Scott Kern
  • Patent number: 6441404
    Abstract: A multichip module has a light-emitting device having an anode electrode or a cathode electrode thereof connected to a supplied voltage or a reference voltage, a control circuit, having a substrate of an opposite conductivity type to the substrate of the light-emitting device, for controlling the electric current that is passed through the light-emitting device, a lead frame including an island 4 on which both the light-emitting device and the control circuit are mounted, and a package for sealing the light-emitting device and the control circuit. Despite being compact, this multichip module allows a satisfactorily large amount of light to be emitted from the light-emitting device.
    Type: Grant
    Filed: January 14, 2000
    Date of Patent: August 27, 2002
    Assignee: Rohm Co., Ltd.
    Inventor: Kenji Yamamoto
  • Patent number: 6433366
    Abstract: A circuit-incorporating light receiving device includes an integrated circuit and a photodiode. The integrated circuit and the photodiode are provided on a single semiconductor substrate. The integrated circuit includes a transistor having a polycrystalline silicon as an emitter diffusion source and an electrode. Elements included in the integrated circuit are isolated from each other using local oxidization.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: August 13, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takahiro Takimoto, Naoki Fukunaga, Isamu Ohkubo, Toshimitsu Kasamatsu, Mutsumi Oka, Masaru Kubo
  • Publication number: 20020074555
    Abstract: There is disclosed a photodetector having two or more avalanche-gain layered structures and multi-terminals. The avalanche photodetector includes an emitter light absorption layer structure located between a collector layer and an emitter layer (top contact layer) stacked on a substrate. The photodetector further comprises multiple avalanche-gain layered structures consisting of a charge layer, a multiplication layer and a contact layer between the light absorption layer and said collector layer.
    Type: Application
    Filed: August 13, 2001
    Publication date: June 20, 2002
    Inventors: Gyung Ock Kim, In Kyu Kim, Kwang Eui Pyun
  • Publication number: 20020066904
    Abstract: A solid-state relay is created by a power-switching device embedded in a semiconductor wafer which includes an optically transparent, electrically insulating surface, an organic light-emitting diode (OLED) formed on that surface, and a light-absorbing device integrated with the power-switching device, electrically isolated from the diode, and positioned in the path of the emitted light.
    Type: Application
    Filed: December 4, 2000
    Publication date: June 6, 2002
    Inventors: Han-Tzong Yuan, Tae S. Kim, Francis G. Celii, Simon J. Jacobs
  • Patent number: 6396023
    Abstract: The present invention provides a method for hermetically sealing a semiconductor laser element, by which the cleanness of a package can be maintained extremely satisfactorily in a stabilized state, in order to prevent organic substances from being adhered to the end faces of high output semiconductor laser elements due to photochemical actions. The method comprises the first step of introducing oxygen into a chamber of a hermetical-sealing apparatus and irradiating ultraviolet rays onto an unsealed package having a semiconductor laser element mounted, in the chamber, and the second step of purging the chamber with an inert gas and hermetically sealing an unsealed package in the inert gas atmosphere without being exposed to the outer atmosphere.
    Type: Grant
    Filed: October 26, 1999
    Date of Patent: May 28, 2002
    Assignee: The Furukawa Electric Co., Ltd.
    Inventor: Takeshi Aikiyo