Abstract: The light emitting element is provided to comprise: a first conductive type semiconductor layer; a mesa; a current blocking layer; a transparent electrode; a first electrode pad and a first electrode extension; a second electrode pad and a second electrode extension; and an insulation layer partially located on the lower portion of the first electrode, wherein the mesa includes at least one groove formed on a side thereof, the first conductive type semiconductor layer is partially exposed through the groove, the insulation layer includes an opening through which the exposed first conductive type semiconductor layer is at least partially exposed, the first electrode extension includes extension contact portions in contact with the first conductive type semiconductor layer through an opening, and the second electrode extension includes an end with a width different from the average width of the second electrode extension.

Abstract: In one embodiment, a semiconductor device comprises one or more defense layers, the one or more defense layers each characterized by at least two lattice constants that are mismatched, wherein a mismatch in the lattice constants causes a destabilizing force that comprises at least one of a tensile force or a compressive force; and a plurality of other layers, wherein at least a sufficient part of the destabilizing force is restrained for the one or more defense layers to remain intact unless reduction in thickness of at least a section of one or more of the plurality of other layers, causes at least some of the destabilizing force that was restrained to no longer be restrained, and consequently at least part of at least one of the one or more defense layers to break.

Abstract: Solid state lighting devices with selected thermal expansion and/or surface characteristics, and associated methods are disclosed. A method in accordance with a particular embodiment includes forming an SSL (solid state lighting) formation structure having a formation structure coefficient of thermal expansion (CTE), selecting a first material of an interlayer structure to have a first material CTE greater than the substrate CTE, and selecting a second material of the interlayer structure based at least in part on the second material having a second material CTE less than the first material CTE. The method can further include forming the interlayer structure over the SSL formation structure by disposing (at least) a first layer of the first material over the SSL formation structure, a portion of the second material over the first material, and a second layer of the first material over the second material.

Abstract: A semiconductor light emitting device includes an LED chip, which includes an n-type semiconductor layer, active layer, and p-type semiconductor layer stacked on a substrate. The LED chip further includes an anode electrode connected to the p-type semiconductor, and a cathode connected to the n-type semiconductor. The anode and cathode electrodes face a case with the LED chip mounted thereon. The case includes a base member including front and rear surfaces, and wirings including a front surface layer having anode and cathode pads formed at the front surface, a rear surface layer having anode and cathode mounting electrodes formed at the rear surface, an anode through wiring connecting the anode pad and the anode mounting electrode and passing through a portion of the base member, and a cathode through wirings connecting the cathode pad and the cathode mounting electrode and passing through a portion of the base member.

Abstract: Engineered substrates having epitaxial templates for forming epitaxial semiconductor materials and associated systems and methods are disclosed herein. In several embodiments, for example, an engineered substrate can be manufactured by forming a first semiconductor material at a front surface of a donor substrate. The first semiconductor material is transferred to first handle substrate to define a first formation structure. A second formation structure is formed to further include a second semiconductor material homoepitaxial to the first formation structure. The method can further include transferring the first portion of the second formation structure to a second handle substrate such that a second portion of the second formation structure remains at the first handle substrate.

Abstract: A method for producing a radiation-emitting semiconductor component is provided, comprising the following steps: —providing a growth substrate (1), —depositing a nucleation layer (2) on the growth substrate (1), —applying a structured dielectric layer (3) to the nucleation layer (2), —applying an epitaxial layer (4) by means of a FACELO process to the structured dielectric layer (3), —epitaxial growth of an epitaxial layer sequence (5) on the epitaxial layer (4), wherein the epitaxial layer sequence (5) comprises an active zone (6) that is suitable for producing electromagnetic radiation.

Abstract: The invention provides an optoelectronic device adapted to emit ultraviolet light, including an aluminum nitride single crystalline substrate, wherein the dislocation density of the substrate is less than about 105 cm?2 and the Full Width Half Maximum (FWHM) of the double axis rocking curve for the (002) and (102) crystallographic planes is less than about 200 arcsec; and an ultraviolet light-emitting diode structure overlying the aluminum nitride single crystalline substrate, the diode structure including a first electrode electrically connected to an n-type semiconductor layer and a second electrode electrically connected to a p-type semiconductor layer. In certain embodiments, the optoelectronic devices of the invention exhibit a reverse leakage current less than about 10?5 A/cm2 at ?10 V and/or an L80 of at least about 5000 hours at an injection current density of 28 A/cm2.

Abstract: A light emitting diode including a first light emitting cell and a second light emitting cell disposed on a substrate and spaced apart from each other to expose a surface of the substrate, a first transparent layer disposed on and electrically connected to the first light emitting cell, first connection section disposed on a portion of the first light emitting cell, a second connection section disposed on a portion of the second light emitting cell, a first interconnection and a second interconnection electrically connecting the first light emitting cell and the second light emitting cell, and an insulation layer disposed between the first and second interconnections and a side surface of the first light emitting cell.

Abstract: A current aperture vertical electron transistor (CAVET) with ammonia (NH3) based molecular beam epitaxy (MBE) grown p-type Gallium Nitride (p-GaN) as a current blocking layer (CBL). Specifically, the CAVET features an active buried Magnesium (Mg) doped GaN layer for current blocking purposes. This structure is very advantageous for high power switching applications and for any device that requires a buried active p-GaN layer for its functionality.

Abstract: A semiconductor light-emitting element includes a first semiconductor layer of a first conductive type, a second semiconductor layer of a second conductive type, a light-emitting layer formed between the first semiconductor layer and the second semiconductor layer, a first electrode connected to the first semiconductor layer, and a second electrode connected to the second semiconductor layer. The second electrode includes an ohmic electrode contacting the second semiconductor layer, and a semiconductor electrode made of a semiconductor layer contacting the ohmic electrode.

Abstract: Disclosed herein is an LED chip including electrode pads. The LED chip includes a semiconductor stack including a first conductive type semiconductor layer, a second conductive type semiconductor layer on the first conductive type semiconductor layer, and an active layer interposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer; a first electrode pad located on the second conductive type semiconductor layer opposite to the first conductive type semiconductor layer; a first electrode extension extending from the first electrode pad and connected to the first conductive type semiconductor layer; a second electrode pad electrically connected to the second conductive type semiconductor layer; and an insulation layer interposed between the first electrode pad and the second conductive type semiconductor layer. The LED chip includes the first electrode pad on the second conductive type semiconductor layer, thereby increasing a light emitting area.

Abstract: An electrode (109) insulated from a compound semiconductor layer (102) and being in contact with an electrode (101) and a compound semiconductor layer (103) is provided. A lattice constant of the compound semiconductor layer (103) is smaller than both of a lattice constant of the compound semiconductor layer (102) and a lattice constant of a compound semiconductor layer (104), and a lattice constant of a compound semiconductor layer (107) is smaller than both of the lattice constants of the compound semiconductor layer (102) and the lattice constants of the compound semiconductor layer (104). A conduction band energy of the compound semiconductor layer (103) is higher than a conduction band energy of the compound semiconductor layer (104).

Abstract: An optoelectronic semiconductor device in accordance with an embodiment of present invention includes a conversion unit having a first side; an electrical connector; a contact layer having an outer perimeter; and at least three successive discontinuous-regions formed along the outer perimeter and having at least one different factor; wherein the electrical connector, the contact layer, and the discontinuous-regions are formed on the first side of the conversion unit.

Abstract: Light panels, and methods of providing the light panels, are described. The described light panels are substantially transparent and can operate as an illumination device or as a solar panel. An example light panel includes a first optic layer for transmitting light; a second optic layer with a reflective surface configured for one of directing light from the first optic layer and directing light to the first optic layer; and a receiving assembly disposed between the first optic layer and the second optic layer. The receiving assembly includes a first receiving layer adjacent to the first optic layer; a second receiving layer adjacent to the second optic layer and separated from the first receiving layer; and a light device coupled to the first receiving layer. The light device can be configured to receive light from the reflective surface or to provide light to the reflective surface.

Abstract: An optoelectronic semiconductor device in accordance with an embodiment of present invention includes a conversion unit having a first side; an electrical connector; a contact layer having an outer perimeter; and at least three successive discontinuous-regions formed along the outer perimeter and having at least one different factor; wherein the electrical connector, the contact layer, and the discontinuous-regions are formed on the first side of the conversion unit.

Abstract: A semiconductor laser device in an embodiment includes a compound semiconductor layer and a silicon layer. The compound semiconductor layer includes an active layer emitting laser light and has a first mesa structure. The silicon layer is bonded with the compound semiconductor layer. A diffraction grating is provided on a surface of the silicon layer which faces the compound semiconductor layer, and includes a main diffraction grating and two sub-diffraction gratings. The main diffraction grating extends in a longitudinal direction of the first mesa structure; the sub-diffraction gratings are disposed on both sides of the main diffraction grating.

Abstract: According to one embodiment, a semiconductor light emitting device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type; a light emitting layer; a conductive metal layer; and a first stress application layer. The first semiconductor layer contains a nitride semiconductor crystal and receives tensile stress in a (0001) plane. The second semiconductor layer contains a nitride semiconductor crystal. The light emitting layer has an average lattice constant larger than a lattice constant of the first semiconductor layer. The conductive metal layer has a thermal expansion coefficient larger than a thermal expansion coefficient of a nitride semiconductor crystal. The first stress application layer is provided between the second semiconductor layer and the light emitting layer. The first stress application layer relaxes tensile stress applied from the metal layer to the second semiconductor layer.

Abstract: A photovoltaic junction for a solar cell is provided. The photovoltaic junction has an intrinsic region comprising a multiple quantum well stack formed from a series of quantum wells separated by barriers, in which the tensile stress in some of the quantum wells is partly or completely balanced by compressive stress in the others of the quantum wells. The overall elastostatic equilibrium of the multiple quantum well stack may be ensured by engineering the structural and optical properties of the quantum wells only, with the barriers having the same lattice constant as the materials used in the oppositely doped semiconductor regions of the junction, or equivalently as the actual lattice size of the junction or intrinsic region, or the bulk or effective lattice size of the substrate. Alternatively, the barriers may contribute to the stress balance.

Abstract: A semiconductor light emitting device includes an n-type semiconductor layer, a border layer disposed on the n-type semiconductor layer, having band gap energy decreasing in a single direction, and represented by an empirical formula AlxInyGa1?x?yN (0?x?0.1, 0.01?y?0.1), an active layer disposed on the border layer and having a structure in which one or more InGaN layers and one or more GaN layers are alternately stacked, and a p-type semiconductor layer.

Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting layer. The p-type semiconductor layer includes a first p-side layer, a second p-side layer, and a third p-side layer. A concentration profile of Mg of a p-side region includes a first portion, a second portion, a third portion, a fourth portion, a fifth portion, a sixth portion and a seventh portion. The p-side region includes the light emitting layer, the second p-side layer, and the third p-side layer. A Mg concentration of the sixth portion is not less than 1×1020 cm?3 and not more than 3×1020 cm?3. The Al concentration is 1/100 of the maximum value at a second position. A Mg concentration at the second position is not less than 2×1018 cm?3.

Abstract: A method for fabricating a vertical gallium nitride (GaN) power device can include providing a GaN substrate with a top surface and a bottom surface, forming a device layer coupled to the top surface of the GaN substrate, and forming a metal contact on a top surface of the vertical GaN power device. The method can further include forming a backside metal by forming an adhesion layer coupled to the bottom surface of the GaN substrate, forming a diffusion barrier coupled to the adhesion layer, and forming a protection layer coupled to the diffusion barrier. The vertical GaN power device can be configured to conduct electricity between the metal contact and the backside metal.

Abstract: A semiconductor device includes a substrate and a p-doped layer including a doped III-V material on the substrate. An n-type layer is formed on or in the p-doped layer. The n-type layer includes ZnO on the p-doped layer to form an electronic device.

Abstract: The invention provides an optoelectronic device adapted to emit ultraviolet light, including an aluminum nitride single crystalline substrate, wherein the dislocation density of the substrate is less than about 105 cm?2 and the Full Width Half Maximum (FWHM) of the double axis rocking curve for the (002) and (102) crystallographic planes is less than about 200 arcsec; and an ultraviolet light-emitting diode structure overlying the aluminum nitride single crystalline substrate, the diode structure including a first electrode electrically connected to an n-type semiconductor layer and a second electrode electrically connected to a p-type semiconductor layer. In certain embodiments, the optoelectronic devices of the invention exhibit a reverse leakage current less than about 10?5 A/cm2 at ?10V and/or an L80 of at least about 5000 hours at an injection current density of 28 A/cm2.

Abstract: An exemplary embodiment discloses a light emitting diode including a first light emitting cell and a second light emitting cell disposed on a substrate, the first light emitting cell and the second light emitting cell being spaced apart from each other. The light emitting diode also includes a first zinc oxide (ZnO) layer disposed on the first light emitting cell, the first ZnO layer being electrically connected to the first light emitting cell. The light emitting diode also includes a current blocking layer disposed between a portion of the first light emitting cell and the first ZnO layer, an interconnection electrically connecting the first light emitting cell and the second light emitting cell, and an insulation layer disposed between the interconnection and a side surface of the first light emitting cell. The current blocking layer and a first side of insulation layer are connected to each other.

Abstract: The invention is directed to a method for forming a nitride on a silicon substrate. In the method of the present invention, a silicon substrate is provided and a buffer layer is formed on the silicon substrate. The formation of the buffer layer includes a multi-level temperature modulation process having a plurality temperature levels and a plurality of temperature modulations. For each of the temperature modulations, the temperature is gradually decreased. A nitride is formed on the buffer layer.

Abstract: A light-emitting device according to an exemplary embodiment of the present invention includes a first conductivity-type semiconductor layer disposed on a substrate; an active layer disposed on the first conductivity-type semiconductor layer; a second conductivity-type semiconductor layer disposed on the active layer; and an irregular convex-concave pattern disposed on a surface of the first conductivity-type semiconductor layer. The irregular convex-concave pattern includes convex portions and concave portions, and the convex portions have irregular heights and the concave portions have irregular depths. The first conductivity-type semiconductor layer including the irregular convex-concave pattern is exposed from the active layer and the second conductivity-type semiconductor layer.

Abstract: Semiconductor structures include an active region between a plurality of layers of InGaN. The active region may be at least substantially comprised by InGaN. The plurality of layers of InGaN include at least one well layer comprising InwGa1-wN, and at least one barrier layer comprising InbGa1-bN proximate the at least one well layer. In some embodiments, the value of w in the InwGa1-wN of the well layer may be greater than or equal to about 0.10 and less than or equal to about 0.40 in some embodiments, and the value of b in the InbGa1-bN of the at least one barrier layer may be greater than or equal to about 0.01 and less than or equal to about 0.10. Methods of forming semiconductor structures include growing such layers of InGaN to form an active region of a light emitting device, such as an LED. Luminary devices include such LEDs.

Abstract: A high luminance semiconductor light emitting device including a metallic reflecting layer formed using a non-transparent semiconductor substrate is provided. The device includes a GaAs substrate; a metal layer disposed on the GaAs substrate; and a light emitting diode structure. The light emitting diode structure includes a patterned metal contact layer and a patterned insulating layer disposed on the metal layer, a p type cladding layer disposed on the patterned metal contact layer and the patterned insulating layer, a multi-quantum well layer disposed on the p type cladding layer, an n type cladding layer disposed on the multi-quantum well layer, and a window layer disposed on the n type cladding layer. The GaAs substrate and the light emitting diode structure are bonded by using the metal layer.

Abstract: A light emitting diode structure comprising a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a current resisting layer, a current spreading layer, a first electrode and a second electrode is provided. The first semiconductor layer is formed on the substrate. The active layer covers a portion of the first semiconductor layer, and exposes another portion of the first semiconductor layer. The second semiconductor layer is formed on the active layer. The current resisting layer covers a portion of the second semiconductor layer, and exposes another portion of the second semiconductor layer. The current spreading layer covers the second semiconductor layer and the current resisting layer. The current spreading layer is formed with a reverse trapezoidal concave over the current resisting layer. The first electrode is disposed on the first semiconductor layer. The second electrode is disposed within the reverse trapezoidal concave.

Abstract: A Group III nitride semiconductor light-emitting device includes at least an n-type-layer-side cladding layer, a light-emitting layer, and a p-type-layer-side cladding layer, each of the layers being formed of a Group III nitride semiconductor. The n-type-layer-side cladding layer is a superlattice layer having a periodic structure including an InyGa1-yN (0<y<1) layer, an AlxGa1-xN (0<x<1) layer, and a GaN layer. The n-type-layer-side cladding layer has a four-layer periodic structure including a second GaN layer interposed between the InyGa1-yN (0<y<1) layer and the AlxGa1-xN (0<x<1) layer.

Abstract: A light-emitting diode and method of manufacturing the same, including a flat portion and a mesa structure including an inclined side surface formed by wet etching and a top surface. A protective film and an electrode film sequentially cover a part of the flat portion and at least a part of the mesa structure, the protective film including an electrical conduction window arranged around a light emission hole and from which a compound semiconductor layer is exposed. The electrode film is a continuous film that contacts the surface of the exposed compound semiconductor layer, covers a portion of the protective film formed on the flat portion, and has the light emission hole on the top surface. A transparent film is formed between a reflecting layer and a compound semiconductor layer. A through-electrode is provided in a range of the transparent film which overlaps the light emission hole.

Abstract: A semiconductor light emitting device having high reliability and excellent light distribution characteristics can be provided with an n-electrode arranged on a light extraction surface on the side opposite to the surface whereupon a semiconductor stack is mounted on a substrate. A plurality of convexes are arranged on a first convex region and a second convex region on the light extraction surface. The second convex region adjoins the interface between the n-electrode and the semiconductor stack, between the first convex region and the n-electrode. The base end of the first convex arranged in the first convex region is positioned closer to a light emitting layer than the interface between the n-electrode and the semiconductor stack, and the base end of the second convex arranged in the second convex region is positioned closer to the interface between the n-electrode and the semiconductor stack than the base end of the first convex.

Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structural body, a first electrode, and a second electrode. The stacked structural body includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a light emitting portion. The stacked structural body has a first major surface on a side of the second semiconductor layer. The first electrode is provided on the first semiconductor. The second electrode is provided on the second semiconductor layer. The first electrode includes a first pad portion and a first extending portion that extends from the first pad portion along a first extending direction. The first extending portion includes a first width-increasing portion. A width of the first width-increasing portion along a direction orthogonal to the first extending direction is increased from the first pad portion toward an end of the first extending portion.

Abstract: A semiconductor light emitting device according to an embodiment includes a top layer having a top surface and a bottom surface, the top layer being an n electrode; an uneven pattern formed in the bottom surface of the n electrode; an n-type semiconductor layer formed under the n electrode, the n-type semiconductor layer having a top surface and a bottom surface; an uneven pattern formed in the top surface of the n-type semiconductor layer, the uneven pattern of the n-type semiconductor layer corresponding to the uneven pattern of the n electrode; an active layer formed under the n-type semiconductor layer; a p-type semiconductor layer formed under the active layer; and a p electrode formed under the p-type semiconductor layer.

Abstract: This disclosure discloses a light-emitting device. The light-emitting device comprises: a substrate; a first light-emitting stack comprising a first active layer; a bonding interface formed between the substrate and the first light-emitting stack; and a contact structure formed on the first light-emitting stack and comprising first, second and third contact layers. Each of the first, second and third contact layers comprises a doping material.

Abstract: The present invention is directed to a light-emitting diode (LED) device, which includes at least one LED unit. Each LED unit includes at least one LED, which includes a first doped layer, a second doped layer and a conductive defect layer. The conductive defect layer is formed on the first or second doped layer. The conductive defect layer may be deposited between two LEDs, or between the first/second doped layer and an electrode.

Abstract: A plurality of III-nitride semiconductor structures, each including a light emitting layer disposed between an n-type region and a p-type region, are grown on a composite substrate. The composite substrate includes a plurality of islands of III-nitride material connected to a host by a bonding layer. The plurality of III-nitride semiconductor structures are grown on the III-nitride islands. The composite substrate may be formed such that each island of III-nitride material is at least partially relaxed. As a result, the light emitting layer of each semiconductor structure has an a-lattice constant greater than 3.19 angstroms.

Abstract: Exemplary embodiments of the present invention provide a light emitting diode including a first light emitting cell and a second light emitting cell disposed on a substrate and spaced apart from each other, a first transparent electrode layer disposed on the first light emitting cell and electrically connected to the first light emitting cell, a current blocking layer disposed between a portion of the first light emitting cell and the first transparent electrode layer, an interconnection electrically connecting the first light emitting cell and the second light emitting cell, and an insulation layer disposed between the interconnection and a side surface of the first light emitting cell. The current blocking layer and the insulation layer are connected to each other.

Abstract: Group-III nitride crystal composites made up of especially processed crystal slices, cut from III-nitride bulk crystal, whose major surfaces are of {1-10±2}, {11-2±2}, {20-2±1} or {22-4±1} orientation, disposed adjoining each other sideways with the major-surface side of each slice facing up, and III-nitride crystal epitaxially present on the major surfaces of the adjoining slices, with the III-nitride crystal containing, as principal impurities, either silicon atoms or oxygen atoms. With x-ray diffraction FWHMs being measured along an axis defined by a <0001> direction of the substrate projected onto either of the major surfaces, FWHM peak regions are present at intervals of 3 to 5 mm width. Also, with threading dislocation density being measured along a <0001> direction of the III-nitride crystal substrate, threading-dislocation-density peak regions are present at the 3 to 5 mm intervals.

Abstract: A semiconductor stripe laser has a first semiconductor region having a first conductivity type and a second semiconductor region having a different, second conductivity type. An active zone for generating laser radiation is located between the semiconductor regions. A stripe waveguide is formed in the second semiconductor region and is arranged to guide waves in a one-dimensional manner and is arranged for a current density of at least 0.5 kA/cm2. A second electrical contact is located on the second semiconductor region and on an electrical contact structure for external electrical contacting. An electrical passivation layer is provided in certain places on the stripe waveguide. A thermal insulation apparatus is located between the second electrical contact and the active zone and/or on the stripe waveguide.

Abstract: A group III nitride-based light emitting device includes an n-type group III nitride-based semiconductor layer, a p-type group III nitride-based semiconductor layer, and a group III nitride-based active region between the p-type semiconductor layer and the n-type semiconductor layer. The active region includes a plurality of sequentially stacked group III nitride-based quantum well layers interspersed with barrier layers. A plurality of the barrier layers have a variation in composition of a first element along a growth direction within a thickness of each of the plurality of barrier layers, and the variation in composition of the first element has at least one minimum and a position of the minimum varies in the plurality of barrier layers. The first element may be indium or aluminum, and the number of barrier layers including the composition variation may be at least three barrier layers. The composition variation may vary linearly or non-linearly.

Abstract: A device includes a substrate (10) and a III-nitride structure (15) grown on the substrate, the III-nitride structure comprising a light emitting layer (16) disposed between an n-type region (14) and a p-type region (18). The substrate is a RAO3 (MO)n where R is one of a trivalent cation: Sc, In, Y and a lanthanide; A is one of a trivalent cation: Fe (III), Ga and Al; M is one for a divalent cation: Mg, Mn, Fe (II), Co, Cu, Zn and Cd; and n is an integer ?1. The substrate has an inplane lattice constant asubstrate. At lease one III-nitride layer in the III-nitride structure has a bulk lattice constant alayer such that [(|asubstrate?alayer|)/asubstrate]*100% is no more than 1%.

Abstract: The present disclosure provides a method for forming a light-emitting apparatus, comprising providing a first board having a plurality of first metal contacts, providing a substrate, forming a plurality of light-emitting stacks and trenches on the substrate, wherein the light-emitting stacks are apart from each other by the plurality of the trenches, bonding the light-emitting stacks to the first board, forming an encapsulating material commonly on the plurality of the light-emitting stacks, and cutting the first board and the encapsulating material to form a plurality of chip-scale LED units.

Abstract: A high luminance semiconductor light emitting device including a metallic reflecting layer formed using a non-transparent semiconductor substrate is provided. The device includes a GaAs substrate; a metal layer disposed on the GaAs substrate; and a light emitting diode structure. The light emitting diode structure includes a patterned metal contact layer and a patterned insulating layer disposed on the metal layer, a p type cladding layer disposed on the patterned metal contact layer and the patterned insulating layer, a multi-quantum well layer disposed on the p type cladding layer, an n type cladding layer disposed on the multi-quantum well layer, and a window layer disposed on the n type cladding layer. The GaAs substrate and the light emitting diode structure are bonded by using the metal layer.

Abstract: A light emitting device includes a light emitting element and a package. The package is made up of a molded article and a lead that is embedded in the molded article. The lead includes a mounting part on which the light emitting element is mounted, a terminal part that is linked to the mounting part, and an exposed part. The package has a front face that is a light emitting face, a rear face opposite the front face, and a bottom face contiguous with the front face and the rear face. The light emitting element is mounted on the front face side of the mounting part. The exposed part is linked to the rear face side of the mounting part, and is exposed from the molded article at the bottom face and the rear face. The terminal part is exposed from the molded article at the bottom face.

Abstract: According to one embodiment, a semiconductor light emitting device includes: a first semiconductor layer; a second semiconductor layer; and a light emitting layer provided between the first and the second semiconductor layers. The first semiconductor layer includes a nitride semiconductor, and is of an n-type. The second semiconductor layer includes a nitride semiconductor, and is of a p-type. The light emitting layer includes: a first well layer; a second well layer provided between the first well layer and the second semiconductor layer; a first barrier layer provided between the first and the second well layers; and a first Al containing layer contacting the second well layer between the first barrier layer and the second well layer and containing layer containing Alx1Ga1-x1N (0.1?x1?0.35).

Abstract: The sapphire substrate has a principal surface for growing a nitride semiconductor to form a nitride semiconductor light emitting device and comprising a plurality of projections of the principal surface, wherein an outer periphery of a bottom surface of each of the projections has at least one depression. This depression is in the horizontal direction. The plurality of projections are arranged so that a straight line passes through the inside of at least any one of projections when the straight line is drawn at any position in any direction in a plane including the bottom surfaces of the plurality of projections.

Abstract: A light emitting device package is disclosed. The light emitting device package includes a body, first and second lead frames disposed on the body, and a light emitting device connected to the first and second lead frames, wherein at least one of the first and second lead frames includes first and second regions having different thicknesses.

Abstract: An nitride semiconductor device for the improvement of lower operational voltage or increased emitting output, comprises an active layer comprising quantum well layer or layers and barrier layer or layers between n-type nitride. semiconductor layers and p-type nitride semiconductor layers, wherein said quantum layer in said active layer comprises InxGa1?xN (0<x<1) having a peak wavelength of 450 to 540 nm and said active layer comprises laminating layers of 9 to 13, in which at most 3 layers from the side of said n-type nitride semiconductor layers are doped with an n-type impurity selected from the group consisting of Si, Ge and Sn in a range of 5×1016 to 2×1018/cm3.

Abstract: An nitride semiconductor device for the improvement of lower operational voltage or increased emitting output, comprises an active layer comprising quantum well layer or layers and barrier layer or layers between n-type nitride. semiconductor layers and p-type nitride semiconductor layers, wherein said quantum layer in said active layer comprises InxGa1?xN (0<x<1) having a peak wavelength of 450 to 540 nm and said active layer comprises laminating layers of 9 to 13, in which at most 3 layers from the side of said n-type nitride semiconductor layers are doped with an n-type impurity selected from the group consisting of Si, Ge and Sn in a range of 5×1016 to 2×1018/cm3.