With Heterojunction Patents (Class 257/94)
  • Patent number: 11961948
    Abstract: An optical semiconductor device includes: a mesa that is provided on a surface in a <011> direction of a semiconductor substrate having a (100) plane orientation and being of a first conductivity type, and includes a first cladding layer of the first conductivity type, an active layer, and a second cladding layer of a second conductivity type; a semi-insulating buried layer that buries both sides of the mesa, is provided on the semiconductor substrate, and includes a first region and a second region farther from the mesa than the first region; an insulation film provided on the first and second regions of the buried layer; and an electrode provided on the mesa and the insulation film on the first region; wherein a surface of the first region is at a height equal to or lower than a surface of the mesa, and lowers at farther distances from the mesa.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: April 16, 2024
    Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Kan Takada
  • Patent number: 11908902
    Abstract: Provided is a group III nitride laminate for improving device characteristics, including: an underlying substrate; a first layer that is formed on the underlying substrate and is made of aluminum nitride; and a second layer that is formed on the first layer and is made of gallium nitride, wherein the first layer has a thickness of more than 100 nm and 1 ?m or less, a full width at half maximum of (0002) diffraction determined through X-ray rocking curve analysis is 250 seconds or less, and a full width at half maximum of (10-12) diffraction determined through X-ray rocking curve analysis is 500 seconds or less.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: February 20, 2024
    Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Hajime Fujikura, Taichiro Konno, Takeshi Kimura, Osamu Goto
  • Patent number: 11910705
    Abstract: Provided are a compound capable of improving luminous efficiency, stability and lifetime of an organic electronic device, an organic electric element using the same, and an electronic device comprising the element.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: February 20, 2024
    Assignee: DUK SAN NEOLUX CO., LTD.
    Inventors: Hyun Ju Song, Ho Young Jung, Mi Young Chae, Jae Taek Kwon, Moo Jin Park, Sun Hee Lee
  • Patent number: 11908894
    Abstract: A method of making a deformable electronic device comprises forming a multilayer device structure comprising functional layers on a flexible substrate. At least one, some or all of the functional layers comprises a stack of 2D monolayers, and a number or proportion of misaligned interfaces within each stack of 2D monolayers is controlled to obtain a predetermined bending stiffness. Each of the misaligned interfaces comprises a twist angle and/or lattice mismatch between adjacent 2D monolayers. The functional layers may include electronically active layers and other layers having a dielectric, insulating, and/or protective function.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: February 20, 2024
    Assignee: THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIS
    Inventors: Pinshane Huang, Arend van der Zande, Elif Ertekin, Edmund Han, Jaehyung Yu, Mohammad Abir Hossain
  • Patent number: 11894501
    Abstract: The present disclosure provides a lighting device and a manufacturing method thereof. The lighting device includes a substrate, a light emitting unit, a light adjusting layer and at least one electrode connecting element. The light emitting unit is disposed on the substrate and includes a light output surface and a plurality of top electrodes. The light adjusting layer is disposed on the light emitting unit, and the light adjusting layer includes a first portion and a second portion connected to the first portion. Wherein the top electrodes are electrically connected to each other through the electrode connecting element, the first portion only partially covers the light output surface, and the second portion does not cover the light output surface.
    Type: Grant
    Filed: October 30, 2022
    Date of Patent: February 6, 2024
    Assignee: InnoLux Corporation
    Inventors: Jia-Yuan Chen, Tsung-Han Tsai, Kuan-Feng Lee, Yuan-Lin Wu
  • Patent number: 11793019
    Abstract: The present disclosure discloses a light-emitting panel and a display device. The light-emitting panel comprises: a light-emitting substrate having a light-emitting surface; and a blocking structure disposed surrounding the light-emitting substrate and not covering the light-emitting surface; wherein a recessed structure is disposed on a first surface of the blocking structure, and the first surface is on a same side as the light-emitting surface.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: October 17, 2023
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Ruiting He
  • Patent number: 11785813
    Abstract: An organic light-emitting device (OLED) display is provided. The OLED display includes a thin-film transistor (TFT) substrate having a plurality of TFTs and a plurality of data lines that control the plurality of TFTs. The OLED display also includes a conductive shielding layer disposed over the TFT substrate and an OLED layer disposed over the conductive shielding layer. The OLED layer includes a plurality of OLEDs that are driven by the plurality of TFTs. The OLED layer also includes a touch panel layer disposed over the OLED layer. The conductive shielding layer is configured to reduce noise coupling between the TFT substrate and the touch panel layer.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: October 10, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Jean Mugiraneza, Andrew Kay
  • Patent number: 11758756
    Abstract: Provided is a packaging structure, including an inorganic packaging layer and an organic packaging layer that are laminated on a substrate, wherein the organic packaging layer includes a microstructure layer and a planarization layer, a refractive index of the planarization layer being lower than that of the microstructure layer; wherein the microstructure layer includes a base structure on the inorganic packaging layer and a plurality of protrusion structures spaced apart on a surface of the base structure away from the inorganic packaging layer; and the planarization layer fills at least gaps between adjacent protrusion structures, and a side of the planarization layer away from the inorganic packaging layer is of a planar structure.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: September 12, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Ming Liu
  • Patent number: 11742459
    Abstract: A light-emitting device comprises a semiconductor stack; a pad electrode comprising a periphery disposed on the semiconductor stack; and a finger electrode connected to the pad electrode, wherein the finger electrode comprises a first portion extended from the periphery of the pad electrode and a second portion away from the pad electrode, the first portion comprises a first side and a second side, the first side is opposite to the second side, the first side comprises a first arc having a first curvature radius, and the first curvature radius is larger than 10 ?m.
    Type: Grant
    Filed: August 2, 2022
    Date of Patent: August 29, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Chien-Hua Chou, Tai-Chun Wang, Chih-Tsung Su, Biau-Dar Chen
  • Patent number: 11723267
    Abstract: A light emitting device and a displaying device. The light emitting device includes a first electrode, a second electrode, and a light emitting unit located between the first electrode and the second electrode, and the light emitting unit includes a doped electron-barrier layer, a blue-light host layer and a doped blue-light host layer that are stacked; the doped electron-barrier layer includes an electron-barrier host material and a first guest material that is doped in the electron-barrier host material; the blue-light host layer includes a first blue-light host material; the doped blue-light host layer includes a second blue-light host material and a second guest material that is doped in the second blue-light host material; and a singlet-state energy level of the first blue-light host material is higher than a singlet-state energy level of the first guest material and a singlet-state energy level of the second guest material.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: August 8, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Juanjuan You, Linlin Wang
  • Patent number: 11698488
    Abstract: A process for fabricating a heterostructure includes at least one elementary structure made of III-V material on the surface of a silicon-based substrate successively comprising: producing a first pattern having at least a first opening in a dielectric material on the surface of a first silicon-based substrate; a first operation for epitaxy of at least one III-V material so as to define at least one elementary base layer made of III-V material in the at least first opening; producing a second pattern in a dielectric material so as to define at least a second opening having an overlap with the elementary base layer; a second operation for epitaxy of at least one III-V material on the surface of at least the elementary base layer made of III-V material(s) so as to produce the at least elementary structure made of III-V material(s) having an outer face; an operation for transferring and assembling the at least photonic active elementary structure via its outer face, on an interface that may comprise passive elem
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: July 11, 2023
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Fabrice Nemouchi, Charles Baudot, Yann Bogumilowicz, Elodie Ghegin, Philippe Rodriguez
  • Patent number: 11686896
    Abstract: An LED light source module includes a substrate; a protective layer disposed on the substrate and having at least one opening; a plurality of conductive terminals disposed in the at least one opening, a light-emitting member, a plurality of electrodes, and an auxiliary structure. The conductive terminals include a first conductive terminal and a second conductive terminal. The light-emitting member includes a bottom surface, a light-emitting surface connected to the bottom surface, a back surface opposite to the light-emitting surface, at least one lateral surface connecting the light-emitting surface and the bottom surface.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: June 27, 2023
    Assignees: RADIANT OPTO-ELECTRONICS(SUZHOU) CO., LTD., RADIANT OPTO-ELECTRONICS CORPORATION
    Inventors: Chih-Hsien Chung, Hsiu-Hung Yeh, Ching-Yuan Chen
  • Patent number: 11690255
    Abstract: Embodiments described herein relate to sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in a display such as an organic light-emitting diode (OLED) display. The device includes a plurality of sub-pixels, each sub-pixel of the plurality of sub-pixels defined by adjacent pixel-defining layer (PDL) structures with inorganic overhang structures disposed on the PDL structures, each sub-pixel having an anode, organic light-emitting diode (OLED) material disposed on the anode, and a cathode disposed on the OLED material. The device is made by a process including the steps of: depositing the OLED material and the cathode by evaporation deposition, and depositing an encapsulation layer disposed over the cathode.
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: June 27, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Ji-young Choung, Dieter Haas, Yu Hsin Lin, Jungmin Lee, Seong Ho Yoo, Si Kyoung Kim
  • Patent number: 11682346
    Abstract: A method, apparatus, and device for determining aging degrees of pixels in a display panel, and a method, apparatus, and device for compensating display luminance of pixels. The method for determining the aging degrees of the pixels in the display panel includes: for each pixel of at least a part of pixels in the display panel that includes multiple pixels, determining electric current data and temperature data of the pixel; and based on the determined current data and temperature data, calculating aging degree data of the pixel according to an attenuation model.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: June 20, 2023
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Chengte Lai, Suncun Li
  • Patent number: 11637219
    Abstract: The disclosure describes various aspects of monolithic integration of different light emitting structures on a same substrate. In an aspect, a device for light generation is described having a substrate with one or more buffer layers made a material that includes GaN. The device also includes light emitting structures, which are epitaxially grown on a same surface of a top buffer layer of the substrate, where each light emitting structure has an active area parallel to the surface and laterally terminated, and where the active area of different light emitting structures is configured to directly generate a different color of light. The device also includes a p-doped layer disposed over the active area of each light emitting structure and made of a p-doped material that includes GaN. The device may be part of a light field display and may be connected to a backplane of the light field display.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: April 25, 2023
    Assignee: GOOGLE LLC
    Inventors: Gang He, Sheila Hurtt
  • Patent number: 11616172
    Abstract: A semiconductor light emitting device includes a conductive substrate and a first metal layer disposed on the substrate. The first metal layer is formed so as to be electrically connected with the substrate, and the first metal layer includes an Au based material. A joining layer is formed on the first metal layer. The joining layer includes a second metal layer including Au and a third metal layer including Au. A metallic contact layer and an insulating layer are formed on the joining layer. A semiconductor layer is formed on the metallic contact layer and the insulating layer and includes a red-based light emitting layer. An electrode is formed on the semiconductor layer and is made of metal. The insulating layer includes a patterned aperture, and at least a part of the metallic contact layer is formed in the aperture.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: March 28, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Masakazu Takao, Mitsuhiko Sakai, Kazuhiko Senda
  • Patent number: 11610952
    Abstract: Embodiments described herein relate to sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in a display such as an organic light-emitting diode (OLED) display. The device includes a plurality of sub-pixels, each sub-pixel of the plurality of sub-pixels defined by adjacent pixel-defining layer (PDL) structures with inorganic overhang structures disposed on the PDL structures, each sub-pixel having an anode, organic light-emitting diode (OLED) material disposed on the anode, and a cathode disposed on the OLED material. The device is made by a process including the steps of: depositing the OLED material and the cathode by evaporation deposition, and depositing an encapsulation layer disposed over the cathode.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: March 21, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Ji-young Choung, Dieter Haas, Yu Hsin Lin, Jungmin Lee, Seong Ho Yoo, Si Kyoung Kim
  • Patent number: 11600527
    Abstract: A lift-off method includes a dividing step of dividing a buffer layer and an optical device layer stacked on a front side of a substrate to thereby form separate buffer layers and separate optical device layers, a transfer member bonding step of bonding a transfer member to a front side of the separate optical device layers, a buffer layer breaking step of applying a pulsed laser beam to the separate buffer layers to thereby break the separate buffer layers, and an optical device layer transferring step of transferring the separate optical device layers from the substrate to the transfer member. An energy density of each pulse of the pulsed laser beam is set to 1.0 to 5.0 mJ/mm2.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: March 7, 2023
    Assignee: DISCO CORPORATION
    Inventor: Tasuku Koyanagi
  • Patent number: 11597651
    Abstract: Proposed are a layered Group III-V compound containing phosphorus, a Group III-V nanosheet that may be prepared using the same, and an electrical device including the materials. There is proposed a layered compound represented by [Formula 1] Mx-mAyPz (Where M is at least one of Group II elements, A is at least one of Group III elements, x, y, and z are positive numbers which are determined according to stoichiometric ratios to ensure charge balance when m is 0, and 0<m<x).
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: March 7, 2023
    Assignee: Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Woo-young Shim, Hong Choi, Min-jung Kim
  • Patent number: 11557531
    Abstract: A semiconductor device includes: a substrate; a semiconductor element arranged on the substrate; a plate-like member electrically connected to the semiconductor element; a first electrode formed on the semiconductor element and joined to the plate-like member with solder; a second electrode formed on the semiconductor element and spaced from the first electrode, and including a metal capable of forming an alloy with the solder; and a metal film formed on the semiconductor element and spaced from the second electrode in a region on the first electrode side as seen from the second electrode, in a two-dimensional view of the semiconductor element as seen from the plate-like member, and including a metal capable of forming an alloy with the solder.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: January 17, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Shohei Ogawa, Junji Fujino, Yusuke Ishiyama, Isao Oshima, Takumi Shigemoto
  • Patent number: 11512817
    Abstract: A lighting system that is part of a headlight module of a motor vehicle includes an array of LED light sources that include no organic materials. Each light source includes a glass lens attached to a phosphor glass converter plate, which itself is attached to an LED die that is flip-chip mounted on a mounting substrate. The converter plate includes phosphor particles embedded in glass. Each lens is disposed laterally over a single LED die. The converter plate is attached to the LED die by a first bonding layer, and the lens is attached to the converter plate by a second bonding layer. Both bonding layers are made of a metal oxide and are thinner than the converter plate. Either each lens does not extend horizontally outside the lateral boundary of each converter plate, or the lens portions centered on each LED die are part of a unitary lens array.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: November 29, 2022
    Assignee: Bridgelux, Inc.
    Inventor: Tao Xu
  • Patent number: 11486703
    Abstract: A measuring apparatus includes: a light source device that projects light or light of which intensity is periodically modulated onto a measurement object; a light receiver that receives backscattered light of light projected by the light source device from the measurement object; and a processor comprising hardware, the processor being configured to: measure TOF information of the light projected by the light source device and the backscattered light received by the light receiver; acquire distances from a surface of the measurement object to the light source device and the light receiver; and calculate an internal propagation distance in the measurement object according to the measured TOF information and the acquired distances.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: November 1, 2022
    Assignee: OLYMPUS CORPORATION
    Inventor: Miyuki Murakami
  • Patent number: 11430916
    Abstract: A light-emitting device comprises a semiconductor layer; a pad electrode comprising a periphery disposed on the semiconductor layer; a finger electrode connected to the pad electrode, wherein the finger electrode comprises a first portion extended from the periphery of the pad electrode and a second portion connected to the first portion; and a plurality of first current blocking regions formed on the semiconductor layer, separated from the pad electrode and formed under the finger electrode, wherein one of the plurality of first current blocking regions is most close to the pad electrode and is separated from the pad electrode by a first distance, adjacent two of others of the plurality of first current blocking regions are separated from each other by a second distance, and the first distance is longer than the second distance.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: August 30, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Chien-Hua Chou, Tai-Chun Wang, Chih-Tsung Su, Biau-Dar Chen
  • Patent number: 11417811
    Abstract: A light emitting element includes a semiconductor stacked body, an insulating film, first and second electrodes, a second external connection portion, and first external connection portions. The first semiconductor layer is exposed at a plurality of exposed portions disposed in a plurality of rows in plan view. The first external connection portions include at least one smaller-size first external connection portion disposed between adjacent ones of the rows other than the outermost one of the rows, and at least one larger-size first external connection portion extending from the end region, in which a spacing between a first outer edge of a second semiconductor layer and the exposed portions in the outermost one of the rows is narrower than a spacing between the exposed portions in adjacent ones of the rows, to at least a position between the outermost one of the rows and an adjacent one of the rows.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: August 16, 2022
    Assignee: NICHIA CORPORATION
    Inventors: Koichi Takenaga, Takanori Fukumori, Satoshi Shichijo, Hiroki Fukuta, Kunihito Sugimoto
  • Patent number: 11417802
    Abstract: A light-emitting device, includes: a semiconductor stack, including a top surface, wherein the top surface includes a first region and a second region which are coplanar; a current barrier layer formed on the first region, wherein the current barrier layer includes an insulating material; and a transparent conductive layer formed on the current barrier layer and the second region; and a first electrode formed on the transparent conductive layer; wherein the current barrier layer includes: an electrode region at a position corresponding to the first electrode, having a shape substantially the same as the first electrode; and a plurality of extension regions extending from the electrode region and not covered by the first electrode.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: August 16, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Jar-Yu Wu, Ching-Jang Su, Chun-Lung Tseng, Ching-Hsing Shen
  • Patent number: 11411135
    Abstract: A gallium and nitrogen containing optical device has a base region and no more than three major planar side regions configured in a triangular arrangement provided from the base region.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: August 9, 2022
    Assignee: KORRUS, INC.
    Inventors: Rajat Sharma, Andrew Felker, Aurelien J. F. David
  • Patent number: 11374146
    Abstract: A semiconductor device is provided, which includes an active structure and a first semiconductor layer. The active structure includes an active region having a topmost surface and a bottommost surface, and a first dopant distributing from the topmost surface to the bottommost surface. The first semiconductor layer is located under the active structure and includes a second dopant. The active region includes a semiconductor material including As.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: June 28, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Meng-Yang Chen, Yuan-Ting Lin
  • Patent number: 11367808
    Abstract: A radiation-emitting semiconductor chip includes a semiconductor body; a first contact layer having a first contact surface for external electrical contacting of the semiconductor chip and a first contact web structure connected to the first contact surface, wherein the first contact web structure is a region of the first contact layer that, compared to the first contact surface, has a comparatively small extent at least in a lateral direction; a second contact layer, wherein first and second contact web structures overlap in places in plan view of the semiconductor chip; a current distribution layer; and an insulation layer having a plurality of openings into which the current distribution layer extends.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: June 21, 2022
    Assignee: OSRAM OLED GmbH
    Inventors: Fabian Kopp, Franz Eberhard, Björn Muermann, Attila Molnar
  • Patent number: 11349047
    Abstract: This disclosure discloses a light-emitting device. The light-emitting device includes a light-emitting stack having a first-type semiconductor layer, a second-type semiconductor layer, and an active layer formed between the first-type semiconductor layer and the second-type semiconductor layer; and a reflective structure formed on the first-type semiconductor layer and having a first interface and a second interface. A critical angle at the first interface for a light emitted from the light-emitting stack is larger than that at the second interface. The reflective structure electrically connects to the first-type semiconductor layer at the first interface, and an area of the first interface is more than an area of the second interface in a top view.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: May 31, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Yi-Ming Chen, Hao-Min Ku, Chih-Chiang Lu, Tzu-Chieh Hsu
  • Patent number: 11335838
    Abstract: A light emitting device including a contact layer, a blocking layer over the contact layer, a protection layer adjacent the blocking layer, a light emitter over the blocking layer, and an electrode layer coupled to the light emitter. The electrode layer overlaps the blocking layer and protection layer, and the blocking layer has an electrical conductivity that substantially blocks flow of current from the light emitter in a direction towards the contact layer. In addition, the protection layer may be conductive to allow current to flow to the light emitter or non-conductive to block current from flowing from the light emitter towards the contact layer.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: May 17, 2022
    Assignee: SUZHOU LEKIN SEMICONDUCTOR CO., LTD.
    Inventors: Kwang Ki Choi, Hwan Hee Jeong, Sang Youl Lee, June O Song
  • Patent number: 11322648
    Abstract: A method for using a photon source, which includes a semiconductor structure having a first light emitting diode region, a second region including a quantum dot, a first voltage source, and a second voltage source, is provided. The method includes steps of applying an electric field across said first light emitting diode region to cause light emission by spontaneous emission, wherein the light emitted from said first light emitting diode region is absorbed in said second region and produces carriers to populate said quantum dot; and applying a tuneable electric field across said second region to control the emission energy of said quantum dot, wherein the light emitted from the second region exits said photon source.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: May 3, 2022
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: David Julian Peter Ellis, James Lee, Anthony John Bennett, Andrew James Shields
  • Patent number: 11276800
    Abstract: A method for manufacturing light emitting diodes and a light emitting diode are disclosed. In an embodiment a method includes growing an n-conductive n-layer, growing an active zone for generating ultraviolet radiation, growing a p-conductive p-layer, producing a p-type semiconductor contact layer having a varying thickness and having a plurality of thickness maxima directly on the p-type layer and applying an ohmic-conductive electrode layer directly on the semiconductor contact layer, wherein each the n-layer and the active zone is based on AlGaN, the p-layer is based on AlGaN or InGaN and the semiconductor contact layer is a GaN layer, wherein the thickness maxima have an area concentration of at least 104 cm?2 in a top view, and wherein the p-layer is only partially covered by the semiconductor contact layer in the top view.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: March 15, 2022
    Assignee: OSRAM OLED GMBH
    Inventors: Bastian Galler, Jürgen Off
  • Patent number: 11251865
    Abstract: Disclosed herein are methods, devices, and system for beam forming and beam steering within ultra-wideband, wireless optical communication devices and systems. According to one embodiment, a free space optical (FSO) communication apparatus is disclosed. The FSO communication apparatus includes an array of optical sources wherein each optical source of the array of optical sources is individually controllable and each optical source configured to have a transient response time of less than 500 picoseconds (ps).
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: February 15, 2022
    Assignee: LUMEOVA, INC.
    Inventors: Mohammad Ali Khatibzadeh, Arunesh Goswami, Morteza Abbasi
  • Patent number: 11251336
    Abstract: A semiconductor device includes a semiconductor stack having a first-type semiconductor structure, an active structure, and a second-type semiconductor structure disposed on the first-type semiconductor structure. The second-type semiconductor structure has a doping concentration. A first portion includes a part of the first-type semiconductor structure, the active structure, and the second-type semiconductor structure, and has a current confining region. A second portion includes a part of the first-type semiconductor structure, the active structure, and the second-type semiconductor structure, and includes a first-type heavily doped region in the second-type semiconductor structure. The first-type heavily doped region includes a doping concentration higher than that of the second-type semiconductor structure.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: February 15, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Hsin-Kang Chen, Jung-Jen Li
  • Patent number: 11217727
    Abstract: The present disclosure relates to a light emitting diode. The light emitting diode comprises a first semiconductor layer, a second semiconductor layer, an active layer, a first electrode, and a second electrode. The active layer is located between the first semiconductor layer and the second semiconductor layer. The first electrode is a first carbon nanotube, the second electrode is a second carbon nanotube. A first extending direction of the first carbon nanotube and a second extending direction of the second carbon nanotube are crossed with each other. A vertical p-n junction or a vertical p-i-n junction is formed by the first semiconductor layer and the second semiconductor layer in a direction perpendicular to the first semiconductor layer.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: January 4, 2022
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Jin Zhang, Yang Wei, Shou-Shan Fan
  • Patent number: 11212424
    Abstract: A display driver comprises drop amount calculation circuitry and digital gamma correction circuitry. The drop amount calculation circuitry is configured to calculate a drop amount of a power source voltage supplied to a display panel from a setting value. The digital gamma correction circuitry is configured to perform digital gamma correction on an input image data based on the drop amount.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: December 28, 2021
    Assignee: Synaptics Incorporated
    Inventors: Satoshi Saito, Kei Miyazawa, Hidefumi Odate, Jiro Shimbo, Kazuyuki Tanimoto
  • Patent number: 11189751
    Abstract: Disclosed is a multi-quantum well structure including a stress relief layer, an electron-collecting layer disposed on the stress relief layer, and an active layer including a first active layer unit that is disposed on the electron-collecting layer. The first active layer unit includes potential barrier sub-layers and potential well sub-layers being alternately stacked, in which at least one of the potential barrier sub-layers has a GaN/Alx1Iny1Ga(1-x1-y1)N/GaN stack, where 0<x1?1 and 0?y1<1, and for the remainder of the potential barrier sub-layers, each of the potential barrier sub-layers is a GaN layer. An LED device including the multi-quantum well structure is also disclosed.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: November 30, 2021
    Assignee: Xiamen San'An Optoelectronics Co., Ltd.
    Inventors: Han Jiang, Yung-Ling Lan, Wen-Pin Huang, Changwei Song, Li-Cheng Huang, Feilin Xun, Chan-Chan Ling, Chi-Ming Tsai, Chia-Hung Chang
  • Patent number: 11183215
    Abstract: A thin film structure (e.g., a near-field transducer), includes a first surface parallel to a substrate on which the thin film structure is deposited and two other surfaces orthogonal to the first surface. The first surface and the two other surfaces have respective first, second, and third selected plane orientations with respective first, second, and third atomic packing factors. The first, second, and third selected plane orientations are selected to maximize an average of the first, second, and third atomic packing factors.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: November 23, 2021
    Assignee: Seagate Technology LLC
    Inventors: Tong Zhao, Li Wan, Michael Christopher Kautzky
  • Patent number: 11152764
    Abstract: An optical device is provided that includes a waveguide layer and at least one grating structure. A coupling coefficient of the at least one grating structure to a fundamental optical mode supported by the waveguide layer is greater than a coupling coefficient of the at least one grating structure to at least one higher order transverse optical mode supported by the waveguide layer.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: October 19, 2021
    Assignee: Freedom Photonics LLC
    Inventors: Gordon Barbour Morrison, Bob Benjamin Buckley
  • Patent number: 11139342
    Abstract: A UV-LED is disclosed. The UV-LED includes a sapphire substrate, a u-GaN buffer layer formed on the sapphire substrate, an n-GaN contact layer formed on the u-GaN buffer layer, an InGaN light emitting layer formed on the n-GaN contact layer, and a p-GaN layer formed on the InGaN light emitting layer. The UV-LED has a quadrate planar shape with at least one side having a chip size of 50 ?m or less.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: October 5, 2021
    Assignee: NITRIDE SEMICONDUCTORS CO., LTD.
    Inventor: Yoshihiko Muramoto
  • Patent number: 11121120
    Abstract: An interposer includes a polycrystalline ceramic core disposed between a first surface and a second surface of the interposer, an adhesion layer encapsulating the polycrystalline ceramic core, a barrier layer encapsulating the adhesion layer, and one or more electrically conductive vias extending from the first surface to the second surface through the polycrystalline ceramic core, the adhesion layer, and the barrier layer.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: September 14, 2021
    Assignee: QROMIS, INC.
    Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
  • Patent number: 11114586
    Abstract: According to one embodiment, a semiconductor light emitting device includes a substrate, and a multi quantum well layer provided on the substrate, and including a plurality of barrier layers sandwiched between three or more InGaAs well layers and two InGaAs well layers. The barrier layers include at least two regions having different mixed crystal ratios or at least two regions having different thicknesses.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: September 7, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Hideto Sugawara
  • Patent number: 11114596
    Abstract: A light-emitting device includes: a light-emitting element; a coating member that covers the light-emitting element; and two external connection electrodes exposed form a first surface of the coating member. Each of the external connection electrodes includes an electrode buried in the coating member; and a metal layer formed on the electrode. A surface of each of the metal layers is exposed from the first surface of the coating member. The first surface of the coating member includes a plurality of grooves between the external connection electrodes.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: September 7, 2021
    Assignee: NICHIA CORPORATION
    Inventors: Yoshikazu Matsuda, Ryo Suzuki
  • Patent number: 11094888
    Abstract: An organic electroluminescent device including: an anode, a cathode, an emitting layer formed of an organic compound and interposed between the cathode and the anode, and two or more layers provided in a hole-injecting/hole-transporting region between the anode and the emitting layer; of the layers which are provided in the hole-injecting/hole-transporting region, a layer which is in contact with the emitting layer containing a compound represented by the formula (1); and of the layers which are provided in the hole-injecting/hole-transporting region, a layer which is interposed between the anode and the layer which is in contact with the emitting layer containing an amine derivative represented by the formula (2).
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: August 17, 2021
    Assignees: Idemitsu Kosan Co., Ltd., JOLED Inc.
    Inventors: Masahiro Kawamura, Emiko Kambe, Akifumi Nakamura, Yasunori Kijima, Tadahiko Yoshinaga, Shigeyuki Matsunami
  • Patent number: 11081346
    Abstract: A semiconductor structure (100) comprising: a substrate (102), a first layer (106) of AlxGayIn(1-x-y)N disposed on the substrate, stacks (107, 109) of several second and third layers (108, 110) alternating against each other, between the substrate and the first layer, a fourth layer (112) of AlxGayIn(1-x-y)N, between the stacks, a relaxation layer of AIN disposed between the fourth layer and one of the stacks, and, in each of the stacks: the level of Ga of the second layers increases from one layer to the next in a direction from the substrate to the first layer, the level of Ga of the third layers is constant or decreasing from one layer to the next in said direction, the average mesh parameter of each group of adjacent second and third layers increasing from one group to the next in said direction, the thickness of the second and third layers is less than 5 nm.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: August 3, 2021
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventor: Matthew Charles
  • Patent number: 11075192
    Abstract: A diode including: first and second doped semi-conductor portions forming a p-n junction, a first part of the first portion being arranged between a second part of the first portion and the second portion; dielectric portions covering side walls of the second portion and the first part of the first portion; a first electrode arranged against outer side walls of the dielectric portions and against side walls of the second part of the first portion, electrically connected to the first portion only by contact with said side walls, and passing through the entire thickness of the first portion; a second optically reflecting electrode electrically connected to the second portion such that the second portion is arranged between the second electrode and the first portion.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: July 27, 2021
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Hubert Bono, Jonathan Garcia, Ivan-Christophe Robin
  • Patent number: 11056669
    Abstract: A method of manufacturing a flip-chip light emitting diode includes: providing a transparent substrate and a temporary substrate, and bonding the transparent substrate with the temporary substrate; grinding and thinning the transparent substrate; providing a light-emitting epitaxial laminated layer having a first surface and a second surface opposite to each other, and including a first semiconductor layer, an active layer and a second semiconductor layer; forming a transparent bonding medium layer over the first surface of the light-emitting epitaxial laminated layer, and bonding the transparent bonding medium layer with the transparent substrate; defining a first electrode region and a second electrode region over the second surface of the light-emitting epitaxial laminated layer, and manufacturing a first electrode and a second electrode; and removing the temporary substrate.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: July 6, 2021
    Assignee: XIAMEN SAN'AN OPTOELECTRONICS CO., LTD.
    Inventors: Shu-Fan Yang, Chun-Yi Wu, Chaoyu Wu
  • Patent number: 11037911
    Abstract: A light emitting device includes a wiring substrate, light emitting elements, light-reflecting films, and a light diffusing member. The light emitting elements are mounted in a matrix on the wiring substrate. Each of the light emitting elements includes a sapphire substrate having a lower surface, first lateral surfaces inclined to the lower surface, and second lateral surfaces perpendicular to the lower surface, and a semiconductor layered structure disposed on the lower surface. The light-reflecting films are respectively disposed on the light emitting elements. The light diffusing member is disposed above the light emitting elements. At least a group of the light emitting elements is arranged such that, in every adjacent ones of the light emitting elements in at least one of a row direction and a column direction, the first lateral surface of the light emitting element faces the second lateral surface of the adjacent light emitting element.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: June 15, 2021
    Assignee: NICHIA CORPORATION
    Inventor: Motokazu Yamada
  • Patent number: 11011373
    Abstract: A method of manufacturing a substrate includes forming a support structure by providing a polycrystalline ceramic core, encapsulating the polycrystalline ceramic core in a first adhesion shell, encapsulating the first adhesion shell in a conductive shell, encapsulating the conductive shell in a second adhesion shell, and encapsulating the second adhesion shell in a barrier shell. The method also includes joining a bonding layer to the support structure, joining a substantially single crystalline silicon layer to the bonding layer, forming an epitaxial silicon layer by epitaxial growth on the substantially single crystalline silicon layer, and forming one or more epitaxial III-V layers by epitaxial growth on the epitaxial silicon layer.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: May 18, 2021
    Assignee: QROMIS, INC.
    Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
  • Patent number: 11004966
    Abstract: A semiconductor device is described. In one embodiment, the device includes a Group-III nitride channel layer and a Group-III nitride barrier layer on the Group-III nitride channel layer, wherein the Group-III nitride barrier layer includes a first portion and a second portion, the first portion having a thickness less than the second portion. A p-doped Group-III nitride gate layer section is arranged at least on the first portion of the Group-III nitride barrier layer and a gate contact formed on the p-doped Group-III nitride gate layer.
    Type: Grant
    Filed: May 11, 2015
    Date of Patent: May 11, 2021
    Assignee: Infineon Technologies Austria AG
    Inventors: Oliver Haeberlen, Walter Rieger