Abstract: An epitaxial structure includes a substrate, a lower super-lattice laminate, a middle super-lattice laminate, an upper super-lattice laminate and a channel layer. The lower super-lattice laminate includes a plurality of first lower film layers and a plurality of second lower film layers stacked alternately. The first lower film layer includes aluminum nitride. The second lower film layer includes aluminum gallium nitride. The middle super-lattice laminate includes a plurality of first middle film layers and a plurality of second middle film layers stacked alternately. The first middle film layer includes aluminum nitride. The second middle film layer includes gallium nitride doped with a doping material. The upper super-lattice laminate includes a plurality of first upper film layers and a plurality of second upper film layers stacked alternately. The first upper film layer includes gallium nitride doped with the doping material. The second upper film layer includes gallium nitride.

Abstract: A spot-size converter includes first and second waveguide structures. The first waveguide structure extends longitudinally along a waveguide axis from a first end to a second end and is configured to support a first optical mode at the first end. The second waveguide structure is formed within the first waveguide structure. The second waveguide structure extends longitudinally between the first end and the second end. The second waveguide structure is configured to support a second optical mode at the second end. The second optical mode has a different diameter than the first optical mode. The second waveguide structure includes a waveguide core that has a first cross-sectional area in a first plane normal to the waveguide axis at the first end and a second cross-sectional area in a second plane normal to the waveguide axis at the second end. The second cross-sectional area is larger than the first cross-sectional area.

Abstract: An optoelectronic semiconductor structure (SC) comprises an active InGaN-based layer disposed between an n-type injection layer and a p-type injection layer, the active p-type injection layer comprising a first InGaN layer and, disposed on the first layer, a second layer composed of a plurality of AlGaInN elemental layers, each elemental layer having a thickness less than its critical relaxation thickness, two successive elemental layers having different aluminum and/or indium and/or gallium compositions.

Abstract: In one aspect, a method includes forming an electrical path between p-type mercury cadmium telluride and a metal layer. The forming of the electrical path includes depositing a layer of polycrystalline p-type silicon directly on to the p-type mercury cadmium telluride and forming the metal layer on the layer of polycrystalline p-type silicon. In another aspect, an apparatus includes an electrical path. The electrical path includes a p-type mercury cadmium telluride layer, a polycrystalline p-type silicon layer in direct contact with the p-type mercury cadmium telluride layer, a metal silicide in direct contact with the polycrystalline p-type silicon layer, and an electrically conductive metal on the metal silicide. In operation, holes, indicative of electrical current on the electrical path, flow from the p-type mercury cadmium telluride layer to the electrically conductive metal.

Abstract: An optical device includes a multilayered GaAs structure including a plurality of sublayers and an optical structure layer on the multilayered GaAs structure, the optical structure layer including a Group III-V compound semiconductor material. The optical structure layer may be, for example, a light-emitting layer having a multi-quantum well structure.

Abstract: A device and a method to produce an augmented-laser (ATLAS) comprising a bi-stable resistive system (BRS) integrated in series with a semiconductor laser. The laser exhibits reduction/inhibition of the Spontaneous Emission (SE) below lasing threshold by leveraging the abrupt resistance switch of the BRS. The laser system comprises a semiconductor laser and a BRS operating as a reversible switch. The BRS operates in a high resistive state in which a semiconductor laser is below a lasing threshold and emitting in a reduced spontaneous emission regime, and a low resistive state in which a semiconductor laser is above or equal to a lasing threshold and emitting in a stimulated emission regime. The BRS operating as a reversible switch is electrically connected in series across two independent chips or on a single wafer. The BRS is formed using insulator-to-metal transition (IMT) materials or is formed using threshold-switching selectors (TSS).

Abstract: A vertical-cavity surface-emitting laser (VCSEL) including a lower mirror, an upper mirror, an active layer interposed between the lower mirror and the upper mirror, an aperture forming layer interposed between the upper mirror and the active layer, and including an oxidation layer and a window layer surrounded by the oxidation layer, a ring-shaped trench passing through the upper mirror, the aperture forming layer, and the active layer to define an isolation region therein, and a plurality of oxidation holes disposed in the isolation region surrounded by the trench, and passing through the upper mirror and the aperture forming layer.

Abstract: Integrated circuitry comprising a memory array comprises strings of memory cells comprising laterally-spaced memory blocks that individually comprise a first vertical stack comprising alternating insulative tiers and conductive tiers. Strings of memory cells comprise channel-material strings that extend through the insulative tiers and the conductive tiers. The conductive tiers individually comprise a horizontally-elongated conductive line. A second vertical stack is aside the first vertical stack. The second vertical stack comprises an upper portion and a lower portion. The upper portion comprises alternating first insulating tiers and second insulating tiers. The lower portion comprises a lowest insulator tier directly above conductor material of a conductor tier. The lowest insulator tier comprises solid carbon and nitrogen-containing material. An immediately-adjacent tier is directly above the solid carbon and nitrogen-containing material of the lowest insulator tier.

Abstract: Provided is a vertical cavity surface emitting laser diode (VCSEL) with low compressive strain DBR layer, including a GaAs substrate, a lower DBR layer, a lower spacer layer, an active region, an upper spacer layer and an upper DBR layer. The lower or the upper DBR layer includes multiple low refractive index layers and multiple high refractive index layers. The lower DBR layer, the lower spacer layer, the upper spacer layer or the upper DBR layer contains AlxGa1-xAs1-yPy, where the lattice constant of AlxGa1-xAs1-yPy is greater than that of the GaAs substrate. This can moderately reduce excessive compressive strain due to lattice mismatch or avoid tensile strain during the epitaxial growth, thereby reducing the chance of deformation and bowing of the VCSEL epitaxial wafer or cracking during manufacturing. Additionally, the VCSEL epitaxial layer can be prevented from generating excessive compressive strain or tensile strain during the epitaxial growth.

Abstract: Photonic devices having a quantum well structure that includes a Group III-N material, and a Al1-xScxN cladding layer disposed on the quantum well structure, where 0<x?0.45, the Al1-xScxN cladding layer having a lower refractive index than the index of refraction of the quantum well structure.

Abstract: A Group III-Nitride quantum well laser including a distributed Bragg reflector (DBR). In some embodiments, the DBR includes Scandium. In some embodiments, the DBR includes Al1-xScxN, which may have 0<x?0.45.

Abstract: A light emitting device includes a substrate; a pattern of a plurality of protrusions protruding from the substrate; a first semiconductor layer provided on the substrate; an active layer provided on the first semiconductor layer; and a second semiconductor layer provided on the active layer, in which each of the protrusions includes a first layer formed integrally with the substrate and protruding from an upper surface of the base substrate; and a second layer provided on the first layer and formed of a material different from that of the first layer.

Abstract: A nitride semiconductor laminate includes: a substrate comprising a group III nitride semiconductor and including a surface and a reverse surface, the surface being formed from a nitrogen-polar surface, the reverse surface being formed from a group III element-polar surface and being provided on the reverse side from the surface; a protective layer provided at least on the reverse surface side of the substrate and having higher heat resistance than the reverse surface of the substrate; and a semiconductor layer provided on the surface side of the substrate and comprising a group III nitride semiconductor. The concentration of O in the semiconductor layer is lower than 1×1017 at/cm3.

Abstract: In order to provide a QCL element operating in the near-infrared wavelength range, the present disclosure provides a quantum cascade laser element 1000 having a semiconductor superlattice structure (QCL structure 100) sandwiched between a pair of conductive sections 20 and 30. The semiconductor superlattice structure serves as an active region that emits electromagnetic waves. The active region has a plurality of unit structures 10U that are stacked on top of each other. Each unit structure includes four well layers 10W1-10W4 of a composition of AlxGa1?xN, separated from each other by barrier layers 10B1-10B5 of a composition of AlyGa1?yN with 0?x<y?1. Both of the conductive sections in the pair of conductive sections have a refractive index lower than that of the active region in which doped TCO inserted as a key role.

Abstract: A semiconductor thin film structure may include a substrate, a buffer layer on the substrate, and a semiconductor layer on the buffer layer, such that the buffer layer is between the semiconductor layer and the substrate. The buffer layer may include a plurality of unit layers. Each unit layer of the plurality of unit layers may include a first layer having first bandgap energy and a first thickness, a second layer having second bandgap energy and a second thickness, and a third layer having third bandgap energy and a third thickness. One layer having a lowest bandgap energy of the first, second, and third layers of the unit layer may be between another two layers of the first, second, and third layers of the unit layer.

Abstract: A semiconductor light-emitting device includes first and second semiconductor layers and a light-emitting layer provided between the first semiconductor layer and the second semiconductor layer. The first semiconductor layer includes a compound semiconductor represented by a compositional formula AlXGa1-XAs (0<X<1). The first semiconductor layer has an n-type conductivity and includes a first impurity of the n-type. The first layer further includes carbon with a lower concentration than a concentration of the first impurity, and oxygen with a lower concentration than the concentration of the first impurity. The second semiconductor layer includes a compound semiconductor represented by a compositional formula AlYGa1-YAs (0<Y<1). The second semiconductor layer has a p-type conductivity and including a second impurity of the p-type. The second semiconductor layer further includes carbon with a concentration substantially equal to the carbon concentration in the first semiconductor layer.

Abstract: A vertical-cavity surface-emitting laser (VCSEL) including a lower mirror, an upper mirror having an insulation region including implanted ions and an isolation region surrounded by the insulation region, an active layer interposed between the lower mirror and the upper mirror, an aperture forming layer interposed between the upper mirror and the active layer, and including an oxidation layer and a window layer surrounded by the oxidation layer, and a plurality of oxidation holes disposed in the isolation region and passing through the upper mirror and the aperture forming layer.

Abstract: Process for manufacturing a printhead for a 3D manufacturing system that uses metal electrodeposition to construct parts. The printhead may be constructed by depositing layers on top of a backplane that contains control and power circuits. Deposited layers may include insulating layers and an anode layer that contain deposition anodes that are in contact with the electrolyte to drive electrodeposition. Insulating layers may for example be constructed of silicon nitride or silicon dioxide; the anode layer may contain an insoluble conductive material such as platinum group metals and their associated oxides, highly doped semiconducting materials, and carbon based conductors. The anode layer may be deposited using chemical vapor deposition or physical vapor deposition. Alternatively in one or more embodiments the printhead may be constructed by manufacturing a separate anode plane component, and then bonding the anode plane to the backplane.

Abstract: Process for manufacturing a printhead for a 3D manufacturing system that uses metal electrodeposition to construct parts. The printhead may be constructed by depositing layers on top of a backplane that contains control and power circuits. Deposited layers may include insulating layers and an anode layer that contain deposition anodes that are in contact with the electrolyte to drive electrodeposition. Insulating layers may for example be constructed of silicon nitride or silicon dioxide; the anode layer may contain an insoluble conductive material such as platinum group metals and their associated oxides, highly doped semiconducting materials, and carbon based conductors. The anode layer may be deposited using chemical vapor deposition or physical vapor deposition. Alternatively in one or more embodiments the printhead may be constructed by manufacturing a separate anode plane component, and then bonding the anode plane to the backplane.

Abstract: The invention relates to a method to reduce the contact resistance of ohmic contact in group III-nitride high-electron mobility transistor (HEMT). A heavily n-type doped nitride layer with modulation doping is epitaxially grown on selected contact regions for use as ohmic contact layer. The method for producing the n++ ohmic contact layer includes at least the following: deposition of nitride HEMT epitaxial structure on substrates (such as SiC, silicon, sapphire, GaN etc), deposition in-situ or ex-situ mask for selective growth of n-contact, selective etching to create of openings within the mask layer, deposition of modulation doped n++ nitride ohmic contact layer followed by ohmic metal deposition. The modulation doping involves alternating epitaxy of high and low doped nitride layers with common n-type dopant such as Ge, Si etc. The modulation doping significantly increases the range of n-type doping without detrimental effect on the material quality of the contact layer.

Abstract: To provide a two-dimensional photonic crystal surface emitting laser capable of improving characteristics of light to be emitted, in particular, optical output power. The two-dimensional photonic crystal surface emitting laser includes: a two-dimensional photonic crystal including a plate-shaped base member and modified refractive index regions where the modified refractive index regions have a refractive index different from that of the plate-shaped base member and are two-dimensionally and periodically arranged in the base member; an active layer provided on one side of the two-dimensional photonic crystal; and a first electrode and a second electrode provided sandwiching the two-dimensional photonic crystal and the active layer for supplying current to the active layer, where the second electrode covers a region equal to or wider than the first electrode.

Abstract: A light source apparatus includes a base substrate made of a metal material, a plurality of light emitting devices provided on a first surface of the base substrate, a frame so provided on the first surface of the base substrate as to surround the plurality of light emitting devices, and a light transmissive member that is provided on a surface of the frame that is opposite the surface thereof on which the base substrate is provided and transmits light emitted from the plurality of light emitting devices, and the frame is so dimensioned that the section modulus corresponding to the cross-sectional shape of the frame is greater than or equal to 0.5 mm3 but smaller than or equal to 7.0 mm3.

Abstract: Achieving resistance reduction of a nitride semiconductor multilayer film reflector. In the nitride semiconductor multilayer film reflector, a first semiconductor layer has a higher Al composition than a second semiconductor layer. A first composition-graded layer is interposed between the first and second semiconductor layers so as to be located at a group III element face side of the first semiconductor layer, the first composition-graded layer being adjusted so that its Al composition becomes lower as coming close to the second semiconductor layer. A second composition-graded layer is interposed between the first and second semiconductor layers so as to be located at a nitride face side of the first semiconductor layer. The second composition-graded layer is adjusted so that its Al composition becomes lower as coming close to the second semiconductor layer.

Abstract: In accordance with embodiments of the invention, at least partial strain relief in a light emitting layer of a III-nitride light emitting device is provided by configuring the surface on which at least one layer of the device grows such that the layer expands laterally and thus at least partially relaxes. This layer is referred to as the strain-relieved layer. In some embodiments, the light emitting layer itself is the strain-relieved layer, meaning that the light emitting layer is grown on a surface that allows the light emitting layer to expand laterally to relieve strain. In some embodiments, a layer grown before the light emitting layer is the strain-relieved layer. In a first group of embodiments, the strain-relieved layer is grown on a textured surface.

Abstract: Embodiments of the invention include a III-nitride light emitting layer disposed between an n-type region and a p-type region, a III-nitride layer including a nanopipe defect, and a nanopipe terminating layer disposed between the III-nitride light emitting layer and the III-nitride layer comprising a nanopipe defect. The nanopipe terminates in the nanopipe terminating layer.

Abstract: A solution for fabricating a device is described. The solution can include fabricating a heterostructure for the device, which includes at least one stress controlling layer. The stress controlling layer can include one or more attributes varies as a function of a lateral position based on a target variation of stresses in a semiconductor layer located directly under the stress controlling layer. Embodiments are further directed to a heterostructure including at least one stress controlling layer and a device including the heterostructure.

Abstract: A solution for designing and/or fabricating a structure including a quantum well and an adjacent barrier is provided. A target band discontinuity between the quantum well and the adjacent barrier is selected to coincide with an activation energy of a dopant for the quantum well and/or barrier. For example, a target valence band discontinuity can be selected such that a dopant energy level of a dopant in the adjacent barrier coincides with a valence energy band edge for the quantum well and/or a ground state energy for free carriers in a valence energy band for the quantum well. Additionally, a target doping level for the quantum well and/or adjacent barrier can be selected to facilitate a real space transfer of holes across the barrier. The quantum well and the adjacent barrier can be formed such that the actual band discontinuity and/or actual doping level(s) correspond to the relevant target(s).

Abstract: Disclosed herein is a light emitting diode (LED) including: a gallium nitride substrate; a gallium nitride-based first contact layer disposed on the gallium nitride substrate; a gallium nitride-based second contact layer; an active layer having a multi-quantum well structure and disposed between the first and second contact layers; and a super-lattice layer having a multilayer structure and disposed between the first contact layer and the active layer. By employing the gallium nitride substrate, the crystallinity of the semiconductor layers can be improved, and in addition, by disposing the super-lattice layer between the first contact layer and the active layer, a crystal defect that may be generated in the active layer can be prevented.

Abstract: A light-emitting diode package includes a package body. The package body includes an upper insulation substrate including upper conductive patterns, a lower insulation substrate including lower conductive patterns, and middle conductive patterns disposed between the upper insulation substrate and the lower insulation substrate. The package body also includes an upper via disposed in the upper insulation substrate, a lower via disposed in the lower insulation substrate, the upper via and the lower via not overlaid with each other.

Abstract: Laser device characterized in that it comprises, as gain medium, a film of colloidal nanocrystals of semiconductor material, wherein said nanocrystals are two-dimensional nanocrystals suitable for forming quantum wells for confinement of the charge carriers in the nanocrystals and having a biexciton gain mechanism.

Abstract: A nitride semiconductor light emitting element is provided with: a substrate; a buffer layer that is provided on the substrate; a base layer that is provided on the buffer layer; an n-side nitride semiconductor layer that is provided on the base layer; an MQW light emitting layer that is provided on the n-side nitride semiconductor layer; and a p-side nitride semiconductor layer that is provided on the MQW light emitting layer. An x-ray rocking curve half-value width ? (004) with respect to a (004) plane, i.e., the crystal plane of the nitride semiconductor, is 40 arcsec or less, or the x-ray rocking curve half-value width ? (102) with respect to a (102) plane is 130 arcsec or less, and the rate P (80)/P (25) between light output P (25) at 25° C. and light output P (80) at 80° C. with a same operating current is 95% or more.

Abstract: A light emitting diode based on GaN including an active zone located between an n-doped layer and a p-doped layer that together form a p-n junction, wherein the active zone includes at least one n-doped emissive layer.

Abstract: In an exemplary implementation, a method includes growing a III-Nitride body over a group IV substrate in a semiconductor wafer. The method includes forming at least one device layer over the III-Nitride body. The method also includes etching grid array trenches in the III-Nitride body, where the etching of the grid array trenches may extend into the group IV substrate. The method can also include forming an edge trench around a perimeter of the semiconductor wafer. The method further includes forming separate dies by cutting the semiconductor wafer approximately along the grid array trenches.

Abstract: In an exemplary implementation, a method includes growing a III-Nitride body over a group IV substrate in a semiconductor wafer. The method includes forming at least one device layer over the III-Nitride body. The method also includes etching grid array trenches in the III-Nitride body, where the etching of the grid array trenches may extend into the group IV substrate. The method can also include forming an edge trench around a perimeter of the semiconductor wafer. The method further includes forming separate dies by cutting the semiconductor wafer approximately along the grid array trenches.

Abstract: A light-emitting diode, comprises an active layer for emitting a light with a phase and a peak wavelength ? in air, a reflector, a lower semiconductor stack between the active layer and the reflector, wherein the lower semiconductor stack comprises multiple semiconductor layers, and each of the multiple semiconductor layers has a refractive index ni, a thickness di and two sides each contacting adjacent layers to form two interfaces, wherein each interface has a phase shift when the light passes through the interface.

Abstract: A method of manufacturing a semiconductor light emitting device includes stacking a light emitting structure including a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer on a substrate; forming a first electrode and a second electrode on the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, respectively; forming an insulating layer covering the first and second electrodes and having first and second openings partially exposing surfaces of the first and second electrodes, respectively; and performing a plasma treatment on a surface of the insulating layer and the partially exposed surfaces of the first and second electrodes to form an unevenness portion on the surface of the insulating layer and form an oxygen-depleted layer on the partially exposed surfaces of the first and second electrodes.

Abstract: A method of depositing a high quality low defect single crystalline Group III-Nitride film. A patterned substrate having a plurality of features with inclined sidewalls separated by spaces is provided. A Group III-Nitride film is deposited by a hydride vapor phase epitaxy (HVPE) process over the patterned substrate. The HVPE deposition process forms a Group III-Nitride film having a first crystal orientation in the spaces between features and a second different crystal orientation on the inclined sidewalls. The first crystal orientation in the spaces subsequently overgrows the second crystal orientation on the sidewalls and in the process turns over and terminates treading dislocations formed in the first crystal orientation.

Abstract: The embodiment relates to a light-emitting device, a method of manufacturing the same, a light-emitting device package, and a lighting system. A light-emitting device according to the embodiment may include: a first conductive semiconductor layer; a gallium nitride-based superlattice layer on the first conductive semiconductor layer; an active layer on the gallium nitride-based superlattice layer; a second conductive gallium nitride-based layer on the active layer; and a second conductive semiconductor layer on the second conductive gallium nitride-based layer. The second conductive gallium nitride-based layer may include a second conductive GaN layer having a first concentration, a second conductive InxAlyGa(1-x-y)N (0<x<1, 0<y<1) layer having a second concentration and a second conductive AlzGa(1-z)N (0<z<1) layer having a third concentration on the active layer.

Abstract: There is provided a semiconductor light emitting device comprising a semiconductor stack having first and second main surfaces opposing each other, and comprising first and second conductivity-type semiconductor layers respectively defining the first and second main surfaces, and an active layer interposed between the first and second conductivity-type semiconductor layers; a plurality of contact holes penetrating the second conductivity-type semiconductor layer and the active layer, and one region of the first conductivity-type semiconductor layer; a first electrode layer disposed on the second main surface of the semiconductor stack, the first electrode layer extending and being connected to the one region of the first conductivity-type semiconductor layer through the contact holes; a second electrode layer disposed between the semiconductor stack and the first electrode layer and connected to the second conductivity-type semiconductor layer; and first and second interconnected bumps.

Abstract: Disclosed is a light emitting diode (LED) comprising a light emitting stacked structure and an electrode structure formed to have a pattern on the light emitting stacked structure. The electrode structure of the LED includes a cluster of reflectors disposed along the pattern on the light emitting stacked structure, and a pad material layer formed to entirely cover the reflectors.

Abstract: A light emitting diode package includes a package body having a cavity, a light emitting diode chip having a plurality of light emitting cells connected in series to one another, a phosphor converting a frequency of light emitted from the light emitting diode chip, and a pair of lead electrodes. The light emitting cells are connected in series between the pair of lead electrodes.

Abstract: In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate.

Abstract: In an exemplary implementation, a method includes growing a III-Nitride body over a group IV substrate in a semiconductor wafer. The method includes forming at least one device layer over the III-Nitride body. The method also includes etching grid array trenches in the III-Nitride body, where the etching of the grid array trenches may extend into the group IV substrate. The method can also include forming an edge trench around a perimeter of the semiconductor wafer. The method further includes forming separate dies by cutting the semiconductor wafer approximately along the grid array trenches.

Abstract: According to an embodiment, a semiconductor light emitting device includes a foundation layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The foundation layer has an unevenness having recesses, side portions, and protrusions. A first major surface of the foundation layer has an overlay-region. The foundation layer has a plurality of dislocations including first dislocations whose one ends reaching the recess and second dislocations whose one ends reaching the protrusion. A proportion of a number of the second dislocations reaching the first major surface to a number of all of the second dislocations is smaller than a proportion of a number of the first dislocations reaching the first major surface to a number of all of the first dislocations. A number of the dislocations reaching the overlay-region of the first major surface is smaller than a number of all of the first dislocations.

Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a light emitting unit, a second semiconductor layer, a reflecting electrode, an oxide layer and a nitrogen-containing layer. The first semiconductor layer is of a first conductivity type. The light emitting unit is provided on the first semiconductor layer. The second semiconductor layer is provided on the light emitting unit and is of a second conductivity type. The reflecting electrode is provided on the second semiconductor layer and includes Ag. The oxide layer is provided on the reflecting electrode. The oxide layer is insulative and has a first opening. The nitrogen-containing layer is provided on the oxide layer. The nitrogen-containing layer is insulative and has a second opening communicating with the first opening.

Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting part, and a p-side electrode. The light emitting part is provided between the n-type and the p-type semiconductor layers, and includes a plurality of barrier layers and a plurality of well layers. The p-side electrode contacts the p-type semiconductor layer. The p-type semiconductor layer includes first, second, third, and fourth p-type layers. The first p-type layer contacts the p-side electrode. The second p-type layer contacts the light emitting part. The third p-type layer is provided between the first p-type layer and the second p-type layer. The fourth p-type layer is provided between the second p-type layer and the third p-type layer. The second p-type layer contains Al and contains a p-type impurity in a lower concentration lower than that in the first concentration.

Abstract: Exemplary embodiments of the present invention relate to a photo detection device including a substrate, a first light absorption layer disposed on the substrate, a second light absorption layer disposed in a first region on the first light absorption layer, a third light absorption layer disposed in a second region on the second light absorption layer, and a first electrode layer disposed on each of the first, the second, and the third light absorption layers.

Abstract: In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate.

Abstract: A phosphor is represented by a general Formula: EuxMyL3?x?ySi6?zAlzN11?(z+y+z)O(z+y+z) and satisfies 0.00001?x?2.9999, 0.0001?y?2.99999 and 0?z?6.0. L is at least one element selected from La, Y, Gd and Lu. M is at least one element selected from Ca, Sr, Ba and Mn.

Abstract: A vertical geometry light emitting diode is disclosed that is capable of emitting light in the red, green, blue, violet and ultraviolet portions of the electromagnetic spectrum. The light emitting diode includes a conductive silicon carbide substrate, an InGaN quantum well, a conductive buffer layer between the substrate and the quantum well, a respective undoped gallium nitride layer on each surface of the quantum well, and ohmic contacts in a vertical geometry orientation.