Device Controllable Only By Variation Of Electric Current Supplied Or The Electric Potential Applied To Electrodes Carrying Current To Be Rectified, Amplified, Oscillated, Or Switched, E.g., Two-terminal Device (epo) Patents (Class 257/E21.052)
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Patent number: 8975632Abstract: Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.Type: GrantFiled: December 30, 2013Date of Patent: March 10, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masahiko Hayakawa, Yoshifumi Tanada, Mitsuaki Osame, Aya Anzai, Ryota Fukumoto
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Patent number: 8916851Abstract: A graphene-based device can be characterized as including a first electrode comprising graphene, a second electrode comprising graphene, and a potential barrier. The first electrode is physically separated from the second electrode by the potential barrier. The first electrode, second electrode and potential barrier are configured such that the graphene-based device can exhibit non-linear I-V characteristics under application of a voltage bias between the first electrode and the second electrode.Type: GrantFiled: January 20, 2012Date of Patent: December 23, 2014Inventors: Kurt Eaton, Kimberly Eaton
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Patent number: 8735931Abstract: An LED package and a fabrication method therefor. The LED package includes first and second lead frames made of heat and electric conductors, each of the lead frames comprising a planar base and extensions extending in opposed directions and upward directions from the base. The package also includes a package body made of a resin and configured to surround the extensions of the first and second lead frames to fix the first and second lead frames while exposing underside surfaces of the first and second lead frames. The LED package further includes a light emitting diode chip disposed on an upper surface of the base of the first lead frame and electrically connected to the bases of the first and second lead frames, and a transparent encapsulant for encapsulating the light emitting diode chip.Type: GrantFiled: October 19, 2010Date of Patent: May 27, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Kyung Taeg Han, In Tae Yeo, Hun Joo Hahm, Chang Ho Song, Seong Yeon Han, Yoon Sung Na, Dae Yeon Kim, Ho Sik Ahn, Young Sam Park
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Patent number: 8372690Abstract: Disclosed in this specification is a system-in-a-package substrate that includes an interconnect substrate for permitting finely pitched connections to be made to an integrated circuit. The interconnect substrate includes a central region on its upper surface for receiving the integrated circuit. The interconnect substrate also has interconnections that electrically connect the finely pitched contacts on the upper surface to larger pitched contacts on the lower surface. The larger pitched contacts connect to a conductive trace frame. The resulting assembly is encased in a molding compound along with a plurality of other devices which are configured to interact with one other through the conductive trace.Type: GrantFiled: January 13, 2011Date of Patent: February 12, 2013Assignee: Fairchild Semiconductor CorporationInventors: Maria Clemens Y. Quinones, Ruben P. Madrid
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Patent number: 8101529Abstract: A process for producing a carbon nanotube resistor that is capable of providing a highly reliable resistor or fuse. The process comprises the step of introducing a carbon nanotube in a volatile solvent to a first concentration and conducting ultrasonic treatment thereof to thereby obtain an initial solution; the dilution step of stepwise diluting the initial solution with a volatile solvent under ultrasonication so as to adjust the same to a second concentration, thereby obtaining a coating solution; and the step of applying the coating solution between a first electrode and a second electrode, wherein the first concentration is 1(E10?4 g/ml or higher and the second concentration lower than 1(E10?5 g/ml.Type: GrantFiled: January 18, 2008Date of Patent: January 24, 2012Assignee: NEC CorporationInventor: Kaoru Narita
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Patent number: 7968995Abstract: A method of manufacture an integrated circuit packaging system includes: providing a base substrate; mounting a first base integrated circuit over the base substrate; mounting a second base integrated circuit over the first base integrated circuit; attaching a stacking interconnect to the base substrate and adjacent to the first base integrated circuit; and forming a base encapsulation, having a recess portion from a corner of the base encapsulation and a step portion adjacent to the recess portion, with the step portion over the second base integrated circuit and the recess portion exposing the stacking interconnect.Type: GrantFiled: June 11, 2009Date of Patent: June 28, 2011Assignee: Stats Chippac Ltd.Inventors: Chan Hoon Ko, Soo-San Park, HeeJo Chi
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Publication number: 20110012161Abstract: An alternating-current (AC) light-emitting diode (LED) lamp conforming to international safety regulations and a method for making the same are provided, wherein the core technique involves a circuit board made of a thermally conductive insulation material on which traces are provided, a chip is soldered, and an LED lighting unit is encapsulated. After the LED lighting unit is encapsulated on the circuit board, exposed and electrically conductive portions of the traces or solder points on the circuit board are encapsulated with a thermally resistant insulation material. Furthermore, a thermally conductive insulation plate is provided between the circuit board and a metal housing, and the circuit board is secured in position by fasteners made of an insulation material. Thus, electric shock is effectively prevented which may otherwise result from high-voltage current passing from electrically conductive ends of the circuit board to a heat dissipation mechanism (the metal housing).Type: ApplicationFiled: July 14, 2009Publication date: January 20, 2011Inventor: Mien-Hsia HUNG
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Patent number: 7700418Abstract: Disclosed herein is a method for production of a thin-film semiconductor device which includes, a first step to form a gate electrode on a substrate, a second step to form a gate insulating film of silicon oxynitride on the substrate in such a way as to cover the gate electrode, a third step to form a semiconductor thin film on the gate insulating film, and a fourth step to perform heat treatment in an oxygen-containing oxidizing atmosphere for modification through oxygen binding with oxygen-deficient parts in the silicon oxynitride film constituting the gate insulating film.Type: GrantFiled: March 31, 2009Date of Patent: April 20, 2010Assignee: Sony CorporationInventor: Masafumi Kunii
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Patent number: 7592980Abstract: Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.Type: GrantFiled: June 4, 2003Date of Patent: September 22, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masahiko Hayakawa, Yoshifumi Tanada, Mitsuaki Osame, Aya Anzai, Ryota Fukumoto
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Patent number: 7422970Abstract: A method is provided for modifying a circuit containing a plurality of electrodes, within a substrate, comprising the steps of: (a) selecting at least two electrodes for making a connection; (b) removing materials covering the electrodes with a focused ion beam (FIB) or a laser to form contact holes for respectively exposing the electrodes; (c) depositing in the contact holes a conductive material for forming electrically conductive piers, by applying the focused ion beam (FIB) or laser, with gas molecules ejected from a nozzle; (d) disposing an electrically conductive viscid material over each of the electrically conductive piers; and (e) disposing an electrically conductive bridge floor to connect with the electrically conductive viscid material to form an electrically conductive bridge.Type: GrantFiled: December 29, 2005Date of Patent: September 9, 2008Assignee: Integrated Service Technology Inc.Inventors: Wei-Been Yu, Yung-Shun Liao, Hsin-Sheng Liao