Abstract: In a method of manufacturing a solid electrolytic capacitor, at first, an anodic oxide film is formed on the surface of an aluminum base. Then, a solid electrolyte layer is formed of a conductive polymer or the like on the anodic oxide film. Then, a cathode electrode portion including a silver paste layer is formed on the solid electrolyte layer. Then, a conductive paste is coated on the anodic oxide film on one side of the aluminum base and cured, thereby forming a metal silver layer. Then, a laser beam is irradiated from the opposite side of the aluminum base to weld together the aluminum base and the metal silver layer, thereby forming an anode electrode portion.

Abstract: In a dicing method, a dicing is performed in such a way that in such a way that a device substrate, on which two or more devices and alignment marks for positioning are formed, is positioned in accordance with the alignment mark. The dicing method comprises: a substrate fixing step of fixing the device substrate on a fixed stand in a state that the device substrate is covered with coagulant and the coagulant is coagulated; a positioning step of performing a positioning based on the alignment mark in such a manner that a partial area, in which the alignment mark on the device substrate fixed on the fixed stand is formed, is locally heated to melt the coagulant at the partial area, so that the alignment mark is observed through the melted coagulant; and a dicing step of dicing the device substrate and separating the device substrate into the individual device elements.

Abstract: The invention provides methods and systems for laser assisted wirebonding. One or more conditioning laser pulses are used to prepare a bonding surface for wirebonding by removing impurities such as residues from manufacturing processes, oxides, or irregularities on the bonding surface. Subsequently, a free air ball is brought into contact with the conditioned bonding surface to form a weld.

Abstract: A method is provided for producing a smart card comprising a chip module with at least one contacting area, the chip module arrangeable in a mounting location of a substrate, wherein one contacting loop is formed from a wire connector fed by a wire guiding unit for at least one of the contacting areas, respectively by attaching a first section of the wire conductor to a surface of the substrate outside the mounting location, wherein a second section of the wire conductor proximate to the first section is guided to form the contacting loop along with and protruding from the surface, wherein a subsequent third section of the wire conductor is attached to the surface outside the mounting location, wherein the chip module is inserted into the mounting location and wherein the second section is bent over and electrically contacted to the contacting area.

Abstract: A method for wafer level stack die placement is disclosed. At first, a wafer including a plurality of dice is provided. The wafer is adhered to a photosensitive adhesive tape. The wafer is attached on a die carrier to fix at least one die from the wafer on the die carrier. The die carrier may be another wafer. The photosensitive adhesive tape is selectively exposed to form an adhesion-released portion. The adhesion-released portion is aligned with the fixed die. Then, the photosensitive adhesive tape and the die carrier with the fixed die are apart. Therefore the stack die placement in the die-attaching batch is quick and efficient.

Abstract: A method for manufacturing a probe card is provided. A first inactive layer, a first patterned photoresist layer and a first metal layer are sequentially formed on a substrate. The first metal layer has first through holes exposing a portion of the first patterned photoresist layer. A second inactive layer and a second patterned photoresist layer are sequentially formed thereon. The second patterned photoresist layer has second through holes exposing the first through holes. Pins are formed inside the first and the second through holes. A second metal layer is formed on the second patterned photoresist layer. One end of each pin is connected to the second metal layer. The pins and the second metal layer are taken out. A circuit carrier having third through holes is provided. The pins are inserted into the third through holes. The second metal layer is patterned to form pinheads.

Abstract: A method for manufacturing a pixel structure includes providing a substrate having an active device thereon and forming a dielectric layer covering the active device. Then, an uneven first photoresist layer having an opening is formed over the active device. After an etching process is implemented to form a contact hole in the dielectric layer through said opening, a thickness of the first photoresist layer is reduced so as to expose a portion of the dielectric layer. A transparent conductive layer covering the exposed dielectric layer and the remained first photoresist layer is formed and electrically connected to the active device via the contact hole. Thereafter, the transparent conductive layer on the remained first photoresist layer is removed, while the transparent conductive layer on the exposed dielectric layer forms a pixel electrode. Then, the remained first photoresist layer is removed. With fewer photomasks, the method reduces the manufacturing costs.

Abstract: An electrical connection inside a semiconductor device is established by lead frames formed of plural conductor plates. The lead frames are disposed three-dimensionally so that the respective weld parts thereof are exposed toward a laser light source used in the laser welding. The laser welding is then performed by irradiating a laser beam. According to the above, welding can be performed readily in a reliable manner. The productivity of the semiconductor device and the manufacturing method of the semiconductor device can be thus enhanced. In addition, because the lead frames have the cooling effect, they have the capability of a heat spreader. It is thus possible to provide a semiconductor device and a manufacturing method of the semiconductor device with high productivity.

Abstract: It is an object of the present invention to provide a method for removing the metal element from the semiconductor film which is different from the conventional gettering step for removing the metal element from the semiconductor film. In the present invention, when Ni element (Ni) is used as the metal element and a silicon-based film (referred to as a silicon film) is used as the semiconductor film, nickel silicide segregates in the ridge formed in the silicon film by irradiating the pulsed laser light. Next, etching solution of hydrofluoric acid based etchant is used to remove the nickel silicide segregated in the ridge. When the surface of the semiconductor film is rough after removing the metal element by means of etching, the laser light may be irradiated to the semiconductor film under the insert atmosphere to flatten the surface thereof.

Abstract: The invention provides methods and systems for laser assisted wirebonding. One or more conditioning laser pulses are used to prepare a bonding surface for wirebonding by removing impurities such as residues from manufacturing processes, oxides, or irregularities on the bonding surface. Subsequently, a free air ball is brought into contact with the conditioned bonding surface to form a weld.

Abstract: An interconnect structure including a substrate, an interconnect device formed on the substrate, and a test device formed on the substrate.

Abstract: A method and structure provides a Direct Write Wafer Level Chip Scale Package (DWWLCSP) that utilizes permanent layers/coatings and direct write techniques to pattern these layers/coatings, thereby avoiding the use of photoimagable materials and photo-etching processes.

Abstract: A method and apparatus delivers pulsed laser energy to a damage-sensitive surface. The pulse scanning method and apparatus allow for the deposition of a total dose of laser radiation that could not be attained by any conventional means without damaging the substrate being exposed. Using a solid-state diode pumped YAG laser and an enclosure with a gas ambient, laser pulses are scanned across a substrate according to one of several programmed approaches. Pulses are deposited that are non-adjacent in time, or non-adjacent in space, or both; conventional methods have the pulses adjacent in both time and space. Using the various approaches of the invention, the degree of spatial and temporal adjacency can be precisely controlled to permit significant laser radiation doses without causing any substrate damage.

Abstract: A method of forming polycrystalline silicon with ultra-small grain sizes employs a differential heating of the upper and lower sides of the substrate of a CVD apparatus, in which the lower side of the substrate receives considerably more power than the upper side, preferable more than 75% of the power; and in which the substrate is maintained during deposition at a temperature more than 50° C. above the 550° C. crystallization temperature of silicon.