Of Thin-film Circuits Or Parts Thereof (epo) Patents (Class 257/E21.535)
  • Patent number: 9865201
    Abstract: A pixel structure is disclosed. The pixel structure includes a substrate, a plurality of scan lines, and a plurality of data lines crossing the scan lines to form pixel unit areas, where the data lines are insulated from the scan lines. The pixel structure also includes a plurality of first electrodes formed in the pixel unit areas, a plurality of second electrodes insulated from the first electrodes and located closer to the substrate than the first electrodes, and a plurality of signal lines located in a same layer as topmost electrodes farthest from the substrate, where the signal lines are arranged to be insulated from the topmost electrodes.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: January 9, 2018
    Assignees: SHANGHAI AVIC OPTO ELECTRONICS CO., LTD., TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventors: Bo Liu, Jiongliang Fu, Shoufu Jian, Zhiqiang Xia, Kerui Xi
  • Patent number: 8803146
    Abstract: A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle ?1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle ?2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: August 12, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Daisuke Kawae
  • Patent number: 8778711
    Abstract: A display apparatus includes a display substrate and a counter substrate. The display substrate includes a first substrate and a plurality of pixel electrodes formed on the first substrate. The counter substrate includes a second substrate facing the first substrate, a common electrode formed on the second substrate, a first spacer formed on the common electrode and making contact with the display substrate, a second spacer having a first gap with the display substrate, a third spacer having a second gap larger than the first gap with the display substrate, and a fourth spacer having a third gap larger than the second gap with the display substrate.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: July 15, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ju-Hyeon Baek, Keum-Dong Jung, Jong-Hwan Lee, Kyung-Wook Kim
  • Patent number: 8754415
    Abstract: The present disclosure relates to a high light transmittance in-plan switching liquid crystal display device and a method for manufacturing the same. The liquid crystal display device includes: a substrate; a gate line disposed in horizontal direction on the substrate; a gate insulating layer covering the gate line; a data line disposed in vertical direction on the gate insulating layer; an additional insulating layer on the data line having same size and shape with the data line; a passivation layer covering the additional insulating layer; and a common electrode overlapping with the data line on the passivation layer. According to the present disclosure, the failure due to the parasitic capacitance and the load for driving the display panel are reduced and it is possible to make large and high definition display panel.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: June 17, 2014
    Assignee: LG Display Co., Ltd.
    Inventors: Heeyoung Kwack, Heunglyul Cho
  • Patent number: 8735233
    Abstract: A crystalline silicon thin film is formed by irradiating a silicon thin film with a laser beam. The laser beam is a continuous wave laser beam. An intensity distribution of the laser beam in a first region about a center of the intensity distribution is symmetric on an anterior side and a posterior side of the center. The intensity distribution in a second region about the center is asymmetric on the anterior side and the posterior side. The first region is from the maximum intensity of the laser beam at the center to an intensity half of the maximum intensity. The second region is at most equal to the half of the maximum intensity of the laser beam. In the second region, an integral intensity value on the posterior side is larger than on the anterior side.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: May 27, 2014
    Assignee: Panasonic Corporation
    Inventors: Tomohiko Oda, Takahiro Kawashima
  • Patent number: 8735888
    Abstract: An embodiment of the invention relates to a TFT-LCD array substrate comprising a substrate, a gate line and a data line formed on the substrate, a pixel electrode and a thin film transistor formed in a pixel region defined by the gate line and the data line, wherein the thin film transistor comprises a gate electrode, a source electrode, and a transparent drain electrode, and the transparent drain electrode is electrically connected with the pixel electrode.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: May 27, 2014
    Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.
    Inventors: Wei Li, Jeong Hun Rhee
  • Patent number: 8609477
    Abstract: A manufacturing method for an array substrate with a fringe field switching (FFS) type thin film transistor (TFT) liquid crystal display (LCD) includes the following steps. A pattern of a gate line (1), a gate electrode, a common electrode (6) and a common electrode line (5) is formed by patterning a first transparent conductive film and a first metal film formed successively on a transparent substrate. Contact holes of the gate line in the pad area and a semiconductor pattern are formed through a patterning process after a gate insulator film, and a semiconductor film and a doped semiconductor film are formed successively. A second metal film is deposited and patterned. A second transparent conductive film is deposited and a lift-off process is performed. And then, a pattern of a source electrode, a drain electrode, a TFT channel and a pixel electrode (4) is formed by etching the exposed second metal film and the doped semiconductor film.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: December 17, 2013
    Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.
    Inventors: Youngsuk Song, Seungjin Choi, Seongyeol Yoo
  • Patent number: 8592237
    Abstract: A method for manufacturing a thin film transistor substrate including forming bus lines by etching a surface of a substrate to form bus line patterns and filling the bus line patterns with a bus line metal; forming a semiconductor channel layer at one portion of a pixel area defined by the bus lines; and forming source-drain electrodes on the semiconductor channel layer, a pixel electrode extending from the drain electrode within the pixel area, and a common electrode parallel with the pixel electrode. The bus lines are formed as being thicker but the bus lines are buried in the substrate so that the line resistance can be reduced and the step difference due to the thickness of bus line does not affect the device.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: November 26, 2013
    Assignee: LG Display Co., Ltd.
    Inventors: Jungil Lee, Injae Chung, Joonyoung Yang, Gisang Hong
  • Patent number: 8586392
    Abstract: A manufacturing method of a display device including a gate electrode film, a first electrode film, a second electrode film, and a conductive film connected to the first electrode film and formed of a conductive layer including a first conductive layer and a second conductive layer formed overlapping the first conductive layer. The method includes the steps of forming the first electrode film and the second electrode film, forming the conductive layer such that the conductive layer is connected to the first electrode film and the second electrode film, and forming the conductive film by removing regions other than predetermined regions of the conductive layer, wherein the conductive layer forming step includes the steps of forming the first conductive layer on the respective upper surfaces of the first electrode film and the second electrode film and forming the second conductive layer on the upper surface of the first conductive layer.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: November 19, 2013
    Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Jun Gotoh, Eisuke Hatakeyama, Kenji Anjo, Yoshitomo Ogishima
  • Patent number: 8563336
    Abstract: Disclosed are methods for forming a thin film resistor and terminal bond pad simultaneously. A method includes simultaneously forming a terminal bond pad on a terminal wire and a thin film resistor on two other wires.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: October 22, 2013
    Assignee: International Business Machines Corporation
    Inventors: Fen Chen, Jeffrey P. Gambino, Zhong-Xiang He, Tom C. Lee, John C. Malinowski, Anthony K. Stamper
  • Patent number: 8461596
    Abstract: The present invention has an object to provide an active-matrix liquid crystal display device that realizes the improvement in productivity as well as in yield. In the present invention, a laminate film comprising the conductive film comprising metallic material and the second amorphous semiconductor film containing an impurity element of one conductivity type and the amorphous semiconductor film is selectively etched with the same etching gas to form a side edge of the first amorphous semiconductor film 1001 into a taper shape. Thereby, a coverage problem of a pixel electrode 1003 can be solved and an inverse stagger type TFT can be completed with three photomask.
    Type: Grant
    Filed: November 3, 2011
    Date of Patent: June 11, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideomi Suzawa, Yoshihiro Kusuyama, Shunpei Yamazaki
  • Patent number: 8460982
    Abstract: A manufacturing method for an array substrate with a fringe field switching (FFS) type thin film transistor (TFT) liquid crystal display (LCD) includes the following steps. A pattern of a gate line (1), a gate electrode, a common electrode (6) and a common electrode line (5) is formed by patterning a first transparent conductive film and a first metal film formed successively on a transparent substrate. Contact holes of the gate line in the pad area and a semiconductor pattern are formed through a patterning process after a gate insulator film, and a semiconductor film and a doped semiconductor film are formed successively. A second metal film is deposited and patterned. A second transparent conductive film is deposited and a lift-off process is performed. And then, a pattern of a source electrode, a drain electrode, a TFT channel and a pixel electrode (4) is formed by etching the exposed second metal film and the doped semiconductor film.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: June 11, 2013
    Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.
    Inventors: Youngsuk Song, Seungjin Choi, Seongyeol Yoo
  • Patent number: 8460986
    Abstract: An active matrix type display device, wherein a pixel circuit is formed using a plurality of thin film transistors in which thin semiconductor films forming channel regions of the thin film transistors are made in different crystal states.
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: June 11, 2013
    Assignee: Sony Corporation
    Inventors: Motohiro Toyota, Toshiaki Arai
  • Patent number: 8435814
    Abstract: A method for fabricating a LCD having enhanced aperture ratio and brightness includes: forming a gate line, a gate electrode, a common electrode and a common line in a first mask process; depositing a gate insulating layer covering the gate line, the gate electrode and the common electrode; forming an active layer on the gate insulating layer, and an ohmic contact layer on the active layer in a second mask process; forming a data line, a source electrode, and a drain electrode facing the source electrode in a third mask process; depositing a protective layer over the data line, the source electrode and the drain electrode; forming a pixel contact hole in a fourth mask process; and forming a pixel electrode, wherein the pixel electrode is connected to the drain electrode through the pixel contact hole in a fifth mask process using a reverse tapered photo-resist pattern.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: May 7, 2013
    Assignee: LG Display Co., Ltd.
    Inventors: Jae Young Oh, Young Seung Jee, Jeong Oh Kim, Soopool Kim
  • Patent number: 8373164
    Abstract: A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle ?1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle ?2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: February 12, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Daisuke Kawae
  • Patent number: 8368077
    Abstract: A second insulation layer which is formed by stacking a plurality of layers made of different materials in a mutually contact manner is formed such that the second insulation layer covers a source region and a drain region and also covers a gate electrode from above. A first contact hole which reaches one of the source region and the drain region and a recessed portion which is arranged above the gate electrode but is not communicated with the gate electrode are simultaneously formed on the second insulation layer by dry etching. A first line layer is formed so as to cover the first contact hole. After forming the first line layer, a bottom surface of the recessed portion is etched by dry etching thus forming a second contact hole which reaches the gate electrode in the first and second insulation layers. A second line layer is formed on the second contact hole.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: February 5, 2013
    Assignees: Hitachi Displays, Ltd., Panasonic Liquid Display Co., Ltd.
    Inventors: Takeshi Kuriyagawa, Takeshi Noda, Takuo Kaitoh
  • Patent number: 8198657
    Abstract: A thin film transistor array panel includes an insulating substrate. A gate line is formed on the insulating substrate and has a gate electrode. A gate insulating layer is formed on the gate line. A semiconductor layer is formed on the gate insulating layer and overlaps the gate electrode. Diffusion barriers are formed on the semiconductor layer and contain nitrogen. A data line crosses the gate line and has a source electrode partially contacting the diffusion barriers and a drain electrode partially contacting the diffusion barriers and facing the source electrode. The drain electrode is on the gate electrode. A pixel electrode is electrically connected to the drain electrode.
    Type: Grant
    Filed: January 5, 2010
    Date of Patent: June 12, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Hoon Lee, Do-Hyun Kim, Chang-Oh Jeong, O-Sung Seo, Xin-Xing Li
  • Publication number: 20120142128
    Abstract: An array substrate of an in-plane switching liquid crystal display device includes, among other features, a gate electrode and a gate line having a first double-layered structure consisting of a first barrier layer and a first low resistance metallic layer; a data line defining a pixel region with the gate line, the data line having a second double-layered structure consisting of a second barrier layer and a second low resistance metallic layer; a plurality of common electrodes disposed in a direction opposite to an adjacent gate line; a thin film transistor (TFT) near a crossing of the gate and data lines, each of the source and drain electrodes of the TFT having the same double-layered structure as the data line; and a plurality of pixel electrodes arranged in an alternating pattern with the common electrodes and disposed in the direction opposite the adjacent gate line.
    Type: Application
    Filed: February 15, 2012
    Publication date: June 7, 2012
    Inventor: Oh-Nam Kwon
  • Patent number: 8187927
    Abstract: A method for fabricating an LCD includes: providing a substrate with a thin film transistor (TFT) part defined thereon; forming a metallic film for a gate electrode on the substrate; etching the metallic film through a first printing process to form a gate electrode; sequentially forming a gate insulating layer, a semiconductor layer, and a metallic film for source and drain electrodes on the substrate; selectively etching the metallic film for source and drain electrodes, the semiconductor layer and the gate insulating layer through a second printing process to form a gate insulating layer pattern, a preliminary active pattern and a metallic film pattern which are sequentially stacked such that the gate insulating layer pattern is over-etched from the side of the preliminary active pattern; forming an insulating layer on the substrate with the metallic film pattern; etching the insulating layer to expose the metallic film pattern; forming a transparent conductive film on the metallic film pattern and a remai
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: May 29, 2012
    Assignee: LG Display Co., Ltd.
    Inventors: Seung-Hee Nam, Nam-Kook Kim, Soon-Sung Yoo, Youn-Gyoung Chang
  • Patent number: 8183097
    Abstract: A thin-film transistor (TFT) substrate includes a semiconductor pattern, a conductive pattern, a first wiring pattern, an insulation pattern and a second wiring pattern. The semiconductor pattern is formed on a substrate. The conductive pattern is formed as a layer identical to the semiconductor pattern on the substrate. The first wiring pattern is formed on the semiconductor pattern. The first wiring pattern includes a source electrode and a drain electrode spaced apart from the source electrode. The insulation pattern is formed on the substrate having the first wiring pattern to cover the first wiring pattern. The second wiring pattern is formed on the insulation pattern. The second wiring pattern includes a gate electrode formed on the source and drain electrodes. Therefore, a TFT substrate is manufactured using two or three masks, so that manufacturing costs may be decreased.
    Type: Grant
    Filed: August 6, 2008
    Date of Patent: May 22, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Ki Kwak, Hyang-Shik Kong, Sun-Il Kim
  • Patent number: 8178374
    Abstract: A thin film patterning method comprising: depositing a first thin film and applying a photoresist layer on the first thin film; exposing and developing the photoresist layer to define first, second and third regions, wherein the photoresist layer in the first region is thicker than that in the second region, and no photoresist layer is left in the third region; over-etching to remove the first thin film in the third region and form an over-etched region in the peripheral region of the first region; removing a part of the photoresist layer to expose the first thin film in the second region; depositing a second thin film so that the first thin film contacts the second thin film in the second region; and lifting off the photoresist layer to remove the second thin film in the first region and exposing the substrate in the over-etched region of the first region.
    Type: Grant
    Filed: October 1, 2009
    Date of Patent: May 15, 2012
    Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.
    Inventors: Tae Yup Min, Zang Kyu Lim, Sung Hun Song, Xuesong Gao
  • Patent number: 8178383
    Abstract: A display device and method for manufacturing the same are disclosed. The display device includes a first substrate, a second substrate, a touch-sensing element, and a liquid crystal. The first substrate has a first surface and a second surface thereon. The second substrate has a pixel array and is disposed on the second surface of the first substrate. The touch-sensing element locates on the first surface of the first substrate. Furthermore, the touch-sensing element includes a conductive layer, a patterned electrode, and a passivation layer. The patterned electrode is correspondingly located on the periphery of the first substrate, and electrically connected to the conductive layer. The passivation layer covers the conductive layer and the patterned electrode. In addition, the liquid crystal is disposed between the first substrate and the second substrate.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: May 15, 2012
    Assignee: AU Optronics Corp.
    Inventors: Po-Yuan Liu, Ming-Sheng Lai, Chun-Hsin Liu, Kun-Hua Tsai
  • Patent number: 8164094
    Abstract: In a fabricating method of a pixel structure, a scan line and a gate electrode are formed in each pixel area of a substrate. A gate insulation layer is formed to cover the scan line and gate electrode. A semiconductor layer is formed on the gate insulation layer above the gate electrode. A data line, source and drain are formed in each pixel area. A first passivation layer covers the data line, source and drain. A common line is formed on the first passivation layer and overlaps with at least a portion of the data line. A common electrode is formed on and electrically connected with the common line. A second passivation layer covers the common electrode and common line. A contact window is formed in the second passivation layer above the drain to expose the drain. A pixel electrode is electrically connected with the drain through the contact window.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: April 24, 2012
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Meng-Chi Liou, Li-Hsuan Chen
  • Patent number: 8153462
    Abstract: A method of manufacturing a liquid crystal display device is provided which includes ashing first and second photoresist patterns, whereby a copper oxide film is formed at portions of a data line and a source-drain pattern exposed between the ashed first and second photoresist patterns and between the ashed first and second portions of the first photoresist pattern; deoxidizing or removing the copper oxide film; performing a plasma treatment to change the exposed portions of the data line and the source-drain pattern into a copper compound; removing the copper compound using a copper compound removing solution to form source and drain electrodes below the ashed first and second portions, respectively, wherein the copper compound removing solution substantially has no reaction with the copper group material; dry-etching a portion of an ohmic contact layer between the source and drain electrodes using the source and drain electrodes as an etching mask, the ohmic contact layer formed by patterning the impurity-d
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: April 10, 2012
    Assignee: LG Display Co., Ltd.
    Inventors: Kang-Il Kim, Joon-Young Yang, Kye-Chan Song, Soopool Kim, Young-Kwon Kang
  • Patent number: 8148181
    Abstract: A flat display device is provided. The flat display device a substrate divided into an active region for displaying an image and a peripheral region that does not display the image, and includes: a gate line that crosses a data line to define a pixel region in the active region; a thin film transistor in a region near a crossing of the gate line and the data line; a first common electrode in the pixel region; a storage electrode on the first common electrode to provide storage capacitance; a pixel electrode electrically connected with the storage electrode and overlapping the pixel region, the data line, and the gate line; and an ink film covering the active region and the peripheral region, and having microcapsules including charged particles.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: April 3, 2012
    Assignee: LG Display Co., Ltd.
    Inventors: Sung Jin Park, Jea Gu Lee
  • Patent number: 8102005
    Abstract: The present invention provides a method for forming a wiring having a minute shape on a large substrate with a small number of steps, and further a wiring substrate formed by the method. Moreover, the present invention provides a semiconductor device in which cost reduction and throughput improvement are possible due to the small number of steps and reduction of materials and which has a semiconductor element with a minute structure, and further a manufacturing method thereof. According to the present invention, a composition including metal particles and organic resin is irradiated with laser light and a part of the metal particles is baked to form a conductive layer typified by a wiring, an electrode or the like over a substrate. Further, a semiconductor device having the baked conductive layer as a wiring or an electrode is formed.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: January 24, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroko Yamamoto, Osamu Nakamura
  • Patent number: 8077269
    Abstract: An array substrate includes; a thin-film transistor layer including; a gate line, a data line disposed substantially perpendicular to the gate line, and a switching element connected to the gate line and the data line, a gate insulation layer disposed on the gate line, a passivation layer disposed on the thin-film transistor layer, a shielding electrode disposed on the passivation layer, an insulation layer disposed on the shielding electrode; and a pixel electrode including a micro-slit pattern, the pixel electrode being disposed on the insulation layer and electrically connected to the switching element, wherein the shielding electrode is vertically aligned with the data line and the shielding electrode blocks an electromagnetic fringe field of the data line from effecting the pixel electrode.
    Type: Grant
    Filed: August 27, 2009
    Date of Patent: December 13, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su-Jeong Kim, Hye-Ran You, Yoon-Sung Um, Jae-Jin Lyu, Keun-Chan Oh, Jong-Ho Son
  • Patent number: 8059077
    Abstract: A display device which can ensure the correction of a black spot, for example, in forming an opening portion in a portion of a scanning signal line where the scanning signal line intersects a video signal line and forming a semiconductor layer and a conductor layer by a resist reflow method is provided. A conductor layer includes a video signal line, a drain electrode, a source electrode, and a connecting line. A semiconductor layer is formed so as to cover at least a region of the insulation film which is larger than a region where the video signal line and the connecting line are formed. The connecting line is connected with the video signal line over an opening portion which is formed in the scanning signal line. A cutout portion, a projecting portion or an enlarged-width portion is formed on the video signal line and/or the connecting line in a region which corresponds to the opening portion or in the vicinity of the region.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: November 15, 2011
    Assignee: Panasonic Liquid Crystal Display Co., Ltd.
    Inventor: Junichi Uehara
  • Patent number: 8058651
    Abstract: A thin film transistor array substrate and a method for manufacturing the thin film transistor array substrate are disclosed. Specifically, a thin film transistor array may be formed using a reduced number of masks.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: November 15, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Yong In Park, Jae Young Oh, Soo Pool Kim
  • Publication number: 20110244615
    Abstract: A pixel structure includes a scan line, a data line, an active element, a first passivation layer, a second passivation layer and a pixel electrode. The data line includes a first data metal segment and a second data metal layer. The active element includes a gate electrode, an insulating layer, a channel layer, a source and a drain. The channel layer is positioned on the insulating layer above the gate electrode. The source and the drain are positioned on the channel layer. The source is coupled to the data line. The first passivation layer and the second passivation layer cover the active element and form a first contact hole to expose a part of the drain. The second passivation layer covers a part edge of the drain. The pixel electrode is disposed across the second passivation layer and coupled to the drain via the first contact hole.
    Type: Application
    Filed: June 20, 2011
    Publication date: October 6, 2011
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Kuo-Lung Fang, Hsiang-Lin Lin, Chin-Yueh Liao
  • Patent number: 8030104
    Abstract: A method for manufacturing a liquid crystal display device is disclosed.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: October 4, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Sung Il Park, Dae Lim Park
  • Publication number: 20110220898
    Abstract: An organic light emitting diode (OLED) display that includes a substrate, a thin film transistor, and a pixel electrode. The thin film transistor is formed on the substrate and includes a semiconductor layer, a gate electrode, a source electrode, and a drain electrode. The pixel electrode is electrically connected to the thin film transistor and is formed on the same layer as the source electrode and the drain electrode. The source electrode and the drain electrode include a first conductive layer, and the pixel electrode includes a first conductive layer and a second conductive layer stacked thereon.
    Type: Application
    Filed: February 28, 2011
    Publication date: September 15, 2011
    Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.
    Inventors: Ju-Won YOON, Il-Jeong LEE, Choong-Youl IM, Young-Dae KIM, Jong-Mo YEO, Do-Hyun KWON, Cheol-Ho YU
  • Patent number: 8008135
    Abstract: A method for manufacturing a pixel structure includes providing a substrate having an active device thereon and forming a dielectric layer covering the active device. The dielectric layer has a contact hole disposed over the active device. Next, a first photoresist layer is formed on the dielectric layer over the active device, and a transparent conductive layer is formed to cover a portion of the dielectric layer and the first photoresist layer. The transparent conductive layer is electrically connected to the active device via the contact hole. Besides, the transparent conductive layer is irradiated with use of a laser beam, and a portion of the transparent conductive layer on the first photoresist layer is removed, such that the other portion of the transparent conductive layer on the portion of the dielectric layer forms a pixel electrode. The first patterned photoresist layer is then removed.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: August 30, 2011
    Assignee: Au Optronics Corporation
    Inventors: Chih-Hung Shih, Chih-Chun Yang, Ming-Yuan Huang
  • Patent number: 7994000
    Abstract: To provide a semiconductor device having a memory element, and which is manufactured by a simplified manufacturing process. A method of manufacturing a semiconductor device includes, forming a first insulating film to cover a first semiconductor film and a second semiconductor film; forming a first conductive film and a second conductive film over the first semiconductor film and the second semiconductor film, respectively, with the first insulating film interposed therebetween; forming a second insulating film to cover the first conductive film; forming a third conductive film selectively over the first conductive film which is formed over the first semiconductor film, with the second insulating film interposed therebetween, and doping the first semiconductor film with an impurity element with the third conductive film serving as a mask and doping the second semiconductor film with the impurity element through the second conductive film.
    Type: Grant
    Filed: February 6, 2008
    Date of Patent: August 9, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshinobu Asami
  • Publication number: 20110175093
    Abstract: In a fabricating method of a pixel structure, a scan line and a gate electrode are formed in each pixel area of a substrate. A gate insulation layer is formed to cover the scan line and gate electrode. A semiconductor layer is formed on the gate insulation layer above the gate electrode. A data line, source and drain are formed in each pixel area. A first passivation layer covers the data line, source and drain. A common line is formed on the first passivation layer and overlaps with at least a portion of the data line. A common electrode is formed on and electrically connected with the common line. A second passivation layer covers the common electrode and common line. A contact window is formed in the second passivation layer above the drain to expose the drain. A pixel electrode is electrically connected with the drain through the contact window.
    Type: Application
    Filed: March 25, 2010
    Publication date: July 21, 2011
    Applicant: CHUNGHWA PICTURE TUBES, LTD.
    Inventors: Meng-Chi Liou, Li-Hsuan Chen
  • Patent number: 7972931
    Abstract: The present invention relates to a method of manufacturing thin-film transistors using nanoparticles and thin film transistors manufactured by the method. A hydrophilic buffer layers are deposited on the substrates to facilitate formation of nanoparticle films. Sintered nanoparticles are used as an active layer and dielectric materials of high dielectric coefficient are also used as a gate dielectric layer to form a top gate electrode on the gate dielectric layer, thereby enabling low-voltage operation and low-temperature fabrication.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: July 5, 2011
    Assignee: Korea University Industrial & Academic Collaboration Foundation
    Inventors: Sangsig Kim, Kyoung-Ah Cho, Dong-Won Kim, Jae-Won Jang
  • Patent number: 7944514
    Abstract: The present invention allows decreasing the uneven image quality in a liquid crystal display device. The display device in accordance with the present invention includes plural scan signal lines, plural video signal lines, plural TFTs placed in a matrix structure, and plural pixel electrodes, when the width of the scan signal line in a region to place one TFT is different from the width of the scan signal line in a region to place another TFT which is different from the one TFT, the channel width and the channel length of the one TFT is almost equal to the channel width and the channel length of the another TFT, and the surface area of the region overlapping the source electrode with the scan signal line of the one TFT when viewing in plan view is almost equal to the surface area of the region overlapping the source electrode with the scan signal line of the another TFT when viewing in plan view.
    Type: Grant
    Filed: January 17, 2008
    Date of Patent: May 17, 2011
    Assignee: Hitachi Displays, Ltd.
    Inventors: Ken Ohara, Yoshiaki Nakayoshi, Tsunenori Yamamoto, Susumu Edo
  • Publication number: 20110108715
    Abstract: A method for fabricating image sensor is disclosed. The method includes the steps of: providing a substrate, wherein the substrate comprises a plurality of photodiodes; forming at least one dielectric layer and a passivation layer on surface of the substrate; using a patterned photomask to perform a first pattern transfer process for forming a plurality of trenches corresponding to each photodiode in the passivation layer; forming a plurality of color filters in the trenches; covering a planarizing layer on the color filters; and using the patterned photomask to perform a second pattern transfer process for forming a plurality of microlenses corresponding to each color filter on the planarizing layer.
    Type: Application
    Filed: November 10, 2009
    Publication date: May 12, 2011
    Inventors: Chi-Chung Chen, Wen-Chen Chiang, Yu-Tsung Lin
  • Publication number: 20110095293
    Abstract: A thin film transistor array panel includes: a substrate, a gate line disposed on the substrate, a data line intersecting the gate line, a drain electrode separated from the data line a first insulating layer covering the data line, a color filter disposed on the first insulating layer, a second insulating layer disposed on the color filter and having a contact hole exposing the drain electrode and the color filter and a pixel electrode disposed on the second insulating layer and connected to the drain electrode through the contact hole. The contact hole partially exposes the color filter near a portion where the drain electrode and the pixel electrode are connected to each other, and the pixel electrode covers the color filter exposed through the contact hole.
    Type: Application
    Filed: March 26, 2010
    Publication date: April 28, 2011
    Inventors: Myoung-Sup KIM, Cheon-Jae Maeng, Jun-Young Jung, Dong-Hyun Yoo
  • Patent number: 7920219
    Abstract: A liquid crystal display (“LCD”) device includes a first thin film transistor (“TFT”) applying a high gray-scale data signal supplied from a first data line to a first pixel electrode, an upper electrode connected to the first pixel electrode through a first contact hole, and directly connected to the first TFT, a first storage capacitor storing the high gray-scale data signal, a second TFT applying a low gray-scale data signal supplied from a second data line to a second pixel electrode through a second contact hole, an upper electrode connected to the second pixel electrode through a third contact hole, and a second storage capacitor storing the low gray-scale data signal.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: April 5, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sahng Ik Jun, Dong-Gyu Kim
  • Patent number: 7911551
    Abstract: A method for fabricating a display includes providing a first substrate divided into a pixel part and first and second pad parts, forming a gate electrode and a gate line in the pixel part of the first substrate and forming a gate pad line in the first pad part of the first substrate, forming a first insulation film and a semiconductor film over the gate electrode, the gate line and the gate pad line, forming an active pattern over the gate electrode from the semiconductor film with the first insulation film interposed therebetween and forming a contact hole exposing a portion of the gate pad line using a single mask, forming source and drain electrodes in the pixel part, forming a pixel electrode in the pixel part, forming a gate pad electrode electrically connected with the gate pad line via the contact hole, forming a second insulation film over the pixel electrode and the gate pad electrode, exposing a portion of the pixel electrode and at least one portion of the gate pad electrode, and attaching the fir
    Type: Grant
    Filed: June 25, 2007
    Date of Patent: March 22, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Ji-Hyun Jung, Dong-Young Kim
  • Patent number: 7906356
    Abstract: A method of manufacturing an array substrate of horizontal electric field type transreflective LCD is provided in the invention. An array substrate of liquid crystal display is obtained by using one full tone mask and two dual tone masks according to the method. Specifically, the gate line, the gate electrode and the display region are formed by using a full tone mask, the thin film transistor, the transmissive region and the reflective region on the electrode are formed by using a first dual tone mask, and the via hole and the electrode with slits are formed by using a second dual tone mask.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: March 15, 2011
    Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.
    Inventors: Young Suk Song, Seung Jin Choi, Seong Yeol Yoo
  • Publication number: 20110051054
    Abstract: A liquid crystal on silicon (LCoS) panel is disclosed. The LCoS panel includes: a substrate having at least one metal-oxide semiconductor (MOS) transistor thereon; a pixel electrode array disposed on the substrate; a plurality of color filters with at least two different colors disposed on the pixel electrode array, wherein adjacent color filters comprise a gap therebetween and at least two of the color filters are not coplanar; an inorganic film disposed on the color filters and within the gap; and an organic film covering the inorganic film entirely.
    Type: Application
    Filed: September 2, 2009
    Publication date: March 3, 2011
    Inventors: Kuan-Hsiung Wang, Yi-Tyng Wu
  • Publication number: 20110018815
    Abstract: Provided are a touch screen panel and a method of manufacturing the same. The touch screen panel comprises: a substrate; a first reflection-preventing film formed on the substrate; a first gate wiring formed on the first reflection-preventing film; and a sensing wiring formed above the first gate wiring to be insulated from the first gate wiring and to cross the first gate wiring.
    Type: Application
    Filed: December 4, 2009
    Publication date: January 27, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-Youn HAN, Woong-Kwon KIM, Dae-Cheol KIM, Ho-Jun LEE, Kyung-Ho PARK
  • Publication number: 20110017978
    Abstract: A method to form a strain-inducing semiconductor region is described. In one embodiment, formation of a strain-inducing semiconductor region laterally adjacent to a crystalline substrate results in a uniaxial strain imparted to the crystalline substrate, providing a strained crystalline substrate. In another embodiment, a semiconductor region with a crystalline lattice of one or more species of charge-neutral lattice-forming atoms imparts a strain to a crystalline substrate, wherein the lattice constant of the semiconductor region is different from that of the crystalline substrate, and wherein all species of charge-neutral lattice-forming atoms of the semiconductor region are contained in the crystalline substrate.
    Type: Application
    Filed: October 5, 2010
    Publication date: January 27, 2011
    Inventors: Suman Datta, Jack T. Kavalieros, Been-Yih Jin
  • Patent number: 7871838
    Abstract: A rubbing system for an alignment layer of a liquid crystal display (LCD) device, comprises: a rubbing table on which a substrate having an alignment layer thereon is positioned; a rubbing roll on which a rubbing material is wound, substantially positioned on the rubbing table thus to substantially contact the alignment layer, for rubbing the alignment layer by rotation of the rubbing roll; and a controlling unit for controlling the alignment layer to be rubbed by substantially contacting the rubbing roll onto the alignment layer by simultaneously lifting and lowering a rubbing table and the rubbing roll according to an alignment controlling force to be applied to the alignment layer.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: January 18, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Seung-Won Moon, Byoung-Chul Choi
  • Patent number: 7872257
    Abstract: An n-type TFT and a p-type TFT are realized by selectively changing only a cover coat without changing a TFT material using an equation for applying the magnitude of a difference in the Fermi energy between an interface of semiconductor and an electrode and between an interface of semiconductor and insulator. At this time, in order to configure a predetermined circuit, the process is performed, as a source electrode and a drain electrode of the p-type TFT and a source electrode and a drain electrode of the n-type TFT being connected all, respectively, and an unnecessary interconnection is cut by irradiating light using a scanning laser exposure apparatus or the like.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: January 18, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Tomihiro Hashizume, Yuji Suwa, Masaaki Fujimori, Tadashi Arai, Takeo Shiba
  • Patent number: 7867813
    Abstract: A method of forming an organic thin film transistor comprising source and drain electrodes with a channel region therebetween, a gate electrode, a dielectric layer disposed between the source and drain electrodes and the gate electrode, and an organic semiconductor disposed in at least the channel region between the source and drain electrodes, said method comprising: seeding a surface in the channel region with crystallization sites prior to deposition of the organic semiconductor; and depositing the organic semiconductor onto the seeded surface whereby the organic semiconductor crystallizes at the crystallization sites forming crystalline domains in the channel region.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: January 11, 2011
    Assignees: Cambridge Display Technology Limited, Panasonic Corporation
    Inventors: Jonathan J. Halls, Craig E. Murphy, Gregory Whiting, Sadayoshi Hotta
  • Patent number: 7867796
    Abstract: A method for fabricating an LCD includes: providing a substrate with a thin film transistor (ITT) part defined thereon; forming a metallic film for a gate electrode on the substrate; etching the metallic film through a first printing process to form a gate electrode; sequentially forming a gate insulating layer, a semiconductor layer, and a metallic film for source and drain electrodes on the substrate; selectively etching the metallic film for source and drain electrodes, the semiconductor layer and the gate insulating layer through a second printing process to form a gate insulating layer pattern, a preliminary active pattern and a metallic film pattern which are sequentially stacked such that the gate insulating layer pattern is over-etched from the side of the preliminary active pattern; forming an insulating layer on the substrate with the metallic film pattern; etching the insulating layer to expose the metallic film pattern; forming a transparent conductive film on the metallic film pattern and a remai
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: January 11, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Seung-Hee Nam, Nam-Kook Kim, Soon-Sung Yoo, Youn-Gyoung Chang
  • Publication number: 20100330719
    Abstract: A method of forming a transflective LCD panel is provided. The transflective LCD includes a substrate, a first polycrystalline silicon pattern disposed in a reflection region, a second polycrystalline silicon pattern disposed in a peripheral region, an insulating layer disposed on the first and second polycrystalline silicon pattern and the substrate, a gate electrode disposed in the reflection region, a common electrode disposed in the peripheral region, a first inter-layer dielectric disposed on the insulating layer, the gate electrode and the common electrode, a reflection electrode disposed on the first inter-layer dielectric, a second inter-layer dielectric disposed on the first inter-layer dielectric and the reflection electrode, and a transmission electrode disposed on the second inter-layer dielectric and electrically connected to the reflection electrode through an opening of the second inter-layer dielectric.
    Type: Application
    Filed: September 10, 2010
    Publication date: December 30, 2010
    Inventors: Yu-Cheng Chen, Tun-Chun Yang