Leaving Reusable Substrate, E.g., Epitaxial Lift-off Process (epo) Patents (Class 257/E21.601)
  • Patent number: 8932938
    Abstract: A method of producing a composite structure comprises a step of producing a first layer of microcomponents on one face of a first substrate, the first substrate being held flush against a holding surface of a first support during production of the microcomponents, and a step of bonding the face of the first substrate comprising the layer of microcomponents onto a second substrate. During the bonding step, the first substrate is held flush against a second support, the holding surface of which has a flatness that is less than or equal to that of the first support used during production of the first layer of microcomponents.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: January 13, 2015
    Assignee: Soitec
    Inventors: Arnaud Castex, Marcel Broekaart
  • Patent number: 8883612
    Abstract: A method of manufacturing a semiconductor device includes forming a porous area of a semiconductor body. The semiconductor body includes a porous structure in the porous area. A semiconductor layer is formed on the porous area. Semiconductor regions are formed in the semiconductor layer. Then, the semiconductor layer is separated from the semiconductor body along the porous area, including introducing hydrogen into the porous area by a thermal treatment.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: November 11, 2014
    Assignee: Infineon Technologies Austria AG
    Inventors: Hans-Joachim Schulze, Francisco Javier Santos Rodriguez, Anton Mauder, Johannes Baumgartl, Carsten Ahrens
  • Patent number: 8785947
    Abstract: A semiconductor substrate includes: a base layer; a sacrificial layer that is formed on a base layer and that includes a plurality of spaced apart sacrificial film regions and a plurality of first passages each of which is defined between two adjacent ones of the sacrificial film regions. Each sacrificial film region has a plurality of nanostructures and a plurality of second passages defined among the nanostructures. The second passages communicate spatially with the first passages and have a width less than that of the first passages. An epitaxial layer is disposed on the sacrificial layer.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: July 22, 2014
    Assignee: National Chung-Hsing University
    Inventors: Dong-Sing Wuu, Ray-Hua Horng, Chia-Cheng Wu, Po-Rung Lin
  • Patent number: 8716107
    Abstract: Embodiments of the invention generally relate to epitaxial lift off (ELO) thin films and devices and methods used to form such films and devices. In one embodiment, a method for forming a thin film material during an epitaxial lift off process is provided which includes forming an epitaxial material over a sacrificial layer on a substrate, adhering a non-uniform support handle onto the epitaxial material, and removing the sacrificial layer during an etching process. The etching process further includes peeling the epitaxial material from the substrate while forming an etch crevice therebetween and bending the support handle to form compression in the epitaxial material during the etching process. In one example, the non-uniform support handle contains a wax film having a varying thickness.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: May 6, 2014
    Assignee: Alta Devices, Inc.
    Inventors: Thomas Gmitter, Gang He, Andreas Hegedus
  • Patent number: 8603896
    Abstract: A method for transferring a monocrystalline semiconductor layer onto a support substrate by implanting species in a donor substrate; bonding the donor substrate to the support substrate; and fracturing the donor substrate to transfer the layer onto the support substrate; wherein a portion of the monocrystalline layer to be transferred is rendered amorphous, without disorganizing the crystal lattice of a second portion of the layer, with the portions being, respectively, a surface portion and a buried portion of the monocrystalline layer; and wherein the amorphous portion is recrystallized at a temperature below 500° C., with the crystal lattice of the second portion serving as a seed for recrystallization.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: December 10, 2013
    Assignee: Soitec
    Inventors: Gweltaz Gaudin, Carlos Mazure
  • Patent number: 8367518
    Abstract: Embodiments of the invention generally relate to epitaxial lift off (ELO) thin films and devices and methods for forming such films and devices. In one embodiment, a method for forming an ELO thin film includes depositing an epitaxial material over a sacrificial layer on a substrate, adhering a multi-layered support handle onto the epitaxial material, and removing the sacrificial layer during an etching process. The etching process further includes peeling the epitaxial material from the substrate and forming an etch crevice therebetween while maintaining compression in the epitaxial material. The method further provides that the multi-layered support handle contains a stiff support layer adhered to the epitaxial material, a soft support layer adhered to the stiff support layer, and a handle plate adhered to the soft support layer. In one example, the stiff support layer may contain multiple inorganic layers, such as metal layers, dielectric layers, or combinations thereof.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: February 5, 2013
    Assignee: Alta Devices, Inc.
    Inventors: Thomas Gmitter, Gang He
  • Patent number: 8324083
    Abstract: A method for producing a Group III nitride compound semiconductor element includes growing an epitaxial layer containing a Group III nitride compound semiconductor using a different kind of substrate as an epitaxial growth substrate, adhering a supporting substrate to the top surface of the epitaxial growth layer through a conductive layer, and then removing the epitaxial growth substrate by laser lift-off. Before adhesion of the epitaxial layer and the supporting substrate, a first groove that at least reaches an interface between the bottom surface of the epitaxial layer and the epitaxial growth substrate from the top surface of the epitaxial layer formed on the epitaxial growth substrate and acts as an air vent communicating with the outside of a wafer when the epitaxial layer and the supporting substrate are joined to each other.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: December 4, 2012
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiya Uemura, Masanobu Ando, Tomoharu Shiraki, Masahiro Ohashi, Naoki Arazoe, Ryohei Inazawa
  • Patent number: 8314011
    Abstract: Embodiments of the invention generally relate to epitaxial lift off (ELO) thin films and devices and methods used to form such films and devices. In one embodiment, a method for forming a thin film material during an epitaxial lift off process is provided which includes forming an epitaxial material over a sacrificial layer on a substrate, adhering a non-uniform support handle onto the epitaxial material, and removing the sacrificial layer during an etching process. The etching process further includes peeling the epitaxial material from the substrate while forming an etch crevice therebetween and bending the support handle to form compression in the epitaxial material during the etching process. In one example, the non-uniform support handle contains a wax film having a varying thickness.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: November 20, 2012
    Assignee: Alta Devices, Inc.
    Inventors: Thomas Gmitter, Gang He, Andreas Hegedus
  • Patent number: 8309432
    Abstract: Embodiments of the invention generally relate to epitaxial lift off (ELO) thin films and devices and methods used to form such films and devices. In one embodiment, a method for forming an ELO thin film is provided which includes depositing an epitaxial material over a sacrificial layer on a substrate, adhering a universally shrinkable support handle onto the epitaxial material, wherein the universally shrinkable support handle contains a shrinkable material, and shrinking the support handle to form tension in the support handle and compression in the epitaxial material during a shrinking process. The method further includes removing the sacrificial layer during an etching process, peeling the epitaxial material from the substrate while forming an etch crevice therebetween, and bending the support handle to have substantial curvature.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: November 13, 2012
    Assignee: Alta Devices, Inc.
    Inventors: Melissa Archer, Harry Atwater, Thomas Gmitter, Gang He, Andreas Hegedus, Gregg Higashi, Stewart Sonnenfeldt
  • Patent number: 8158490
    Abstract: A method for producing a Group III nitride-based compound semiconductor device includes, before bonding a support substrate to an epitaxial layer formed on an epitaxial growth substrate, forming trenches in such a manner as to extend from the top surface of a stacked structure including the epitaxial layer to at least the interface between the epitaxial growth substrate and the bottom surface of the epitaxial layer. The trenches divide the epitaxial layer into extended device areas which encompass respective product device structures, and stress relaxation areas. A plurality of laser irradiations are performed for laser lift-off such that, after each laser irradiation, the expanded device areas and the stress relaxation areas are formed by a laser-irradiated area and a laser-unirradiated area, and a strip-shaped laser-unirradiated stress relaxation area is formed at a boundary between the laser-irradiated area and the laser-unirradiated area.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: April 17, 2012
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiya Umemura, Masahiro Ohashi
  • Patent number: 8153475
    Abstract: A method for fabricating optical devices on a reusable handle substrate. The method includes providing a handle substrate having a surface region. The method also includes forming a plurality of optical device using at least an epitaxial growth process overlying the surface region and then releasing the handle substrate from the plurality of optical devices. The method reuses the handle substrate for another fabrication process.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: April 10, 2012
    Assignee: Sorra, Inc.
    Inventors: Frank Tin Chung Shum, Thomas M. Katona, Michael Ragan Krames
  • Patent number: 8067294
    Abstract: It is an object of the invention to provide a lightweight semiconductor device having a highly reliable sealing structure which can prevent ingress of impurities such as moisture that deteriorate element characteristics, and a method of manufacturing thereof. A protective film having superior gas barrier properties (which is a protective film that is likely to damage an element if the protective film is formed on the element directly) is previously formed on a heat-resistant substrate other than a substrate with the element formed thereon. The protective film is peeled off from the heat-resistant substrate, and transferred over the substrate with the element formed thereon so as to seal the element.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: November 29, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Yuugo Goto, Yumiko Fukumoto, Junya Maruyama, Takuya Tsurume
  • Patent number: 8058152
    Abstract: A method for separating an integrated circuit formed by a thin film having a novel structure or a method for transferring the integrated circuit to another substrate, that is, so-called transposing method, has not been proposed. According to the present invention, in the case that an integrated circuit having a thin film having a novel structure formed over a substrate via a release layer is separated, the release layer is removed in the state that the thin film integrated circuit is fixated, the thin film integrated circuit is transposed to a supporting substrate having an adhesion surface, and the thin film integrated circuit is transposed to another substrate having an adhesion surface with higher strength of adhesion than that of the supporting substrate.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: November 15, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Junya Maruyama, Yoshitaka Dozen
  • Patent number: 8039353
    Abstract: The present invention provides a thin and bendable semiconductor device utilizing an advantage of a flexible substrate used in the semiconductor device, and a method of manufacturing the semiconductor device. The semiconductor device has at least one surface covered by an insulating layer which serves as a substrate for protection. In the semiconductor device, the insulating layer is formed over a conductive layer serving as an antenna such that the value in the thickness ratio of the insulating layer in a portion not covering the conductive layer to the conductive layer is at least 1.2, and the value in the thickness ratio of the insulating layer formed over the conductive layer to the conductive layer is at least 0.2. Further, not the conductive layer but the insulating layer is exposed in the side face of the semiconductor device, and the insulating layer covers a TFT and the conductive layer.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: October 18, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshitaka Dozen, Tomoyuki Aoki, Hidekazu Takahashi, Daiki Yamada, Eiji Sugiyama, Kaori Ogita, Naoto Kusumoto
  • Patent number: 8026152
    Abstract: It is an object to provide a semiconductor device integrating various elements without using a semiconductor substrate, and a method of manufacturing the same. According to the present invention, a layer to be separated including an inductor, a capacitor, a resistor element, a TFT element, an embedded wiring and the like, is formed over a substrate, separated from the substrate, and transferred onto a circuit board 100. An electrical conduction with a wiring pattern 114 provided in the circuit board 100 is made by a wire 112 or a solder 107, thereby forming a high frequency module or the like.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: September 27, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yumiko Ohno, Yuugo Goto, Hideaki Kuwabara
  • Patent number: 8003492
    Abstract: Embodiments of the invention generally relate to epitaxial lift off (ELO) thin films and devices and methods used to form such films and devices. In one embodiment, a method for forming an ELO thin film is provided which includes depositing an epitaxial material over a sacrificial layer on a substrate, adhering a unidirectionally induced-shrinkage support handle onto the epitaxial material, and shrinking the support handle tangential to reinforcement fibers therein to form tension in the support handle and compression in the epitaxial material during the shrinking process. The unidirectionally induced-shrinkage support handle contains a shrinkable material and reinforcement fibers extending unidirectional throughout the shrinkable material. The method further includes removing the sacrificial layer during an etching process, peeling the epitaxial material from the substrate while forming an etch crevice therebetween, and bending the support handle to have substantial curvature.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: August 23, 2011
    Assignee: Alta Devices, Inc.
    Inventors: Thomas Gmitter, Gang He, Andreas Hegedus
  • Patent number: 7932111
    Abstract: A method for fabricating light emitting diode (LEDs) comprises providing a plurality of LEDs on a substrate wafer, each of which has an n-type and p-type layer of Group-III nitride material formed on a SiC substrate with the n-type layer sandwiched between the substrate and p-type layer. A conductive carrier is provided having a lateral surface to hold the LEDs. The LEDs are flip-chip mounted on the lateral surface of the conductive carrier. The SiC substrate is removed from the LEDs such that the n-type layer is the top-most layer. A respective contact is deposited on the n-type layer of each of the LEDs and the carrier is separated into portions such that each of the LEDs is separated from the others, with each of the LEDs mounted to a respective portion of said carrier.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: April 26, 2011
    Assignee: Cree, Inc.
    Inventor: John Edmond
  • Patent number: 7820529
    Abstract: A method for separating an integrated circuit formed by a thin film having a novel structure or a method for transferring the integrated circuit to another substrate, that is, so-called transposing method, has not been proposed. According to the present invention, in the case that an integrated circuit having a thin film having a novel structure formed over a substrate via a release layer is separated, the release layer is removed in the state that the thin film integrated circuit is fixated, the thin film integrated circuit is transposed to a supporting substrate having an adhesion surface, and the thin film integrated circuit is transposed to another substrate having an adhesion surface with higher strength of adhesion than that of the supporting substrate.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: October 26, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Junya Maruyama, Yoshitaka Dozen
  • Patent number: 7776715
    Abstract: A method of fabricating a memory cell comprises forming a plurality of doped semiconductor layers on a carrier substrate. The method further comprises forming a plurality of digit lines separated by an insulating material. The digit lines are arrayed over the doped semiconductor layers. The method further comprises etching a plurality of trenches into the doped semiconductor layers. The method further comprises depositing an insulating material into the plurality of trenches to form a plurality of electrically isolated transistor pillars. The method further comprises bonding at least a portion of the structure formed on the carrier substrate to a host substrate. The method further comprises separating the carrier substrate from the host substrate.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: August 17, 2010
    Assignee: Micron Technology, Inc.
    Inventors: David H. Wells, H. Montgomery Manning
  • Publication number: 20100167500
    Abstract: A method for forming a semiconductor structure that includes a thin layer of semiconductor material on a receiver wafer is disclosed. The method includes removing a thickness of material from a donor wafer, which comprises a support substrate and an epitaxial layer, for surface preparation and transferring a portion of the epitaxial layer from the donor wafer to the receiver wafer. The thickness removed during the surface preparation is adapted to enable formation of a new semiconductor structure from the remaining epitaxial portion of the donor wafer.
    Type: Application
    Filed: March 5, 2010
    Publication date: July 1, 2010
    Inventors: Nabil Chhaimi, Eric Guiot, Patrick Reynaud, Bruno Ghyselen, Cécile Aulnette, Bénédite Osternaud, Takeshi Akatsu, Yves-Matthieu Le Vaillant
  • Patent number: 7588969
    Abstract: The present invention provides a manufacturing method of a thinned semiconductor device with high reliability at low cost and a semiconductor device manufactured by the method. A peeling layer, a transistor, and an insulating layer are formed in this order over a substrate, an opening is formed so as to expose at least a part of the peeling layer, and the transistor is peeled off from the substrate by a physical means. The peeling layer is formed by forming a metal film and a metal oxide film so as to be in contact with the metal film by a method using a solution.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: September 15, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kaori Ogita, Tomoko Tamura, Junya Maruyama, Koji Dairiki
  • Patent number: 7579262
    Abstract: By omitting a growth mask or by omitting lithographical patterning processes for forming growth masks, a significant reduction in process complexity may be obtained for the formation of different strained semiconductor materials in different transistor types. Moreover, the formation of individually positioned semiconductor materials in different transistors may be accomplished on the basis of a differential disposable spacer approach, thereby combining high efficiency with low process complexity even for highly advanced SOI transistor devices.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: August 25, 2009
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jan Hoentschel, Andy Wei, Manfred Horstmann, Thorsten Kammler
  • Patent number: 7528055
    Abstract: AlxInyGa1-x-yN (0?x?1; 0?x?1; 0?x+y?1) layered device chips are produced by the steps of preparing a defect position controlled substrate of AlxInyGa1-x-yN (0?x?1; 0?y?1; 0?x+y?1) having a closed loop network defect accumulating region H of slow speed growth and low defect density regions ZY of high speed growth enclosed by the closed loop network defect accumulating region H, growing epitaxial upper layers B selectively on the low defect density regions ZY, harmonizing outlines and insides of device chips composed of the upper layers B with the defect accumulating region H and the low defect density regions ZY respectively, forming upper electrodes on the upper layers B or not forming the electrodes, dissolving bottom parts of the upper layers B by laser irradiation or mechanical bombardment, and separating the upper layer parts B as device chips C from each other and from the substrate S.
    Type: Grant
    Filed: September 5, 2006
    Date of Patent: May 5, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Seiji Nakahata, Koji Uematsu, Hideaki Nakahata
  • Patent number: 7442623
    Abstract: A high quality bonded substrate is obtained in which generation of microprotrusions and cracked particles are restricted on a surface of an active layer of the bonded substrate and the surface of the active layer is flattened. A laminated body is formed by overlapping a first semiconductor substrate serving as an active layer onto a second semiconductor substrate serving as a support substrate via an oxide film or without an oxide film; the active layer is formed by forming a thin film from the first semiconductor substrate; and the surface of the active layer is flattened by vapor-phase etching. After forming a thin film from the first semiconductor substrate and before flattening the surface of the active layer by the vapor-phase etching, an organic substance adhering to the surface of the active layer is removed and a native oxide film generated on the surface of the active layer is removed after removing the organic substance.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: October 28, 2008
    Assignee: Sumco Corporation
    Inventors: Akihiko Endo, Tatsumi Kusaba
  • Publication number: 20080113486
    Abstract: An object is to eliminate electric discharge due to static electricity generated by peeling when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element. A substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers. The film is bent along a curved surface of the pressurization roller on a side of the pressurization rollers, where the film is collected, and accordingly, peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film.
    Type: Application
    Filed: September 21, 2007
    Publication date: May 15, 2008
    Inventors: Shingo Eguchi, Yohei Monma, Atsuhiro Tani, Misako Hirosue, Kenichi Hashimoto, Yasuharu Hosaka