Abstract: A temperature compensated oscillation circuit includes an oscillation circuit that oscillates a resonator, a fractional N-PLL circuit that multiplies frequency of an oscillation signal which is output by the oscillation circuit, on the basis of a frequency division ratio which is input, a temperature measurement unit that measures temperature, and a storage unit that stores a temperature correction table for correcting frequency temperature characteristics of the oscillation signal, in which the frequency division ratio of the fractional N-PLL circuit is set on the basis of a measurement value obtained by the temperature measurement unit and the temperature correction table.

Abstract: Described is an apparatus for over-clocking or under-clocking, the apparatus comprises: a locked loop (e.g., phase locked loop or frequency locked loop) having a feedback divider, the locked loop to receive a reference clock and to compare it with a feedback clock which is output from the feedback divider, and to generate an output clock; a post locked loop divider, coupled to the locked loop, to receive the output clock and to generate a base clock for other logic units; and a control logic to adjust first and second divider ratios for the feedback divider and the post locked loop divider respectively for over-clocking or under-clocking the base clock such that the locked loop remains locked while being over-clocked or under-clocked.

Abstract: The present disclosure discloses a multi-standard performance reconfigurable I/Q orthogonal carrier generator. The generator may implement a continuously covered I/Q carrier output of 0.1-5 GHz and continuously covered differential signal outputs of 5-10 GHz and 1.5-3 GHz by means of reasonable frequency assignment; also, carrier signals under various frequencies with different loop bandwidths, different phase noises, different power consumption levels and different locking times can be generated by configuring a programmable charge pump (102), a loop filter (103) parameter, a multi-path voltage-controlled oscillator (104) and a first multiplexer (105) corresponding thereto, a five-stage-division-by-two frequency division link (109) and a corresponding second multiplexer (110) and third multiplexer (112), so as to implement generation of a multi-standard performance reconfigurable I/Q orthogonal carrier.

Abstract: An oscillation device for oscillating a terahertz wave includes a substrate, an active layer which is provided on an upper portion of the substrate and which generates a terahertz wave by intersubband transition of carrier, and a luminous layer which is provided on an upper portion of the substrate and which generates light by interband transition of carrier. In addition, the luminous layer is arranged at a position at which the light generated in the luminous layer can radiate on the active layer.

Abstract: A light emitting module includes a semiconductor light source, a first lead with a bonding pad to which the light source is attached, and a second lead spaced from the first lead in a first direction contained in the plane of the first die bonding pad. The second lead includes a wire bonding pad connected to the light source via a wire. The module also includes a case formed with a space elongated in the first direction for accommodating the light source. The first lead includes an extension extending from the first die bonding pad, and a mounting terminal connected to the extension. The extension extends in a second direction that is perpendicular to the first direction and contained in the plane of the first die bonding pad. The mounting terminal extends perpendicularly to the second direction. The extension overlaps the light source in the first direction.

Abstract: An integrated circuit package system includes providing a leadframe that is coplanar with a bottom surface of the integrated circuit package system to which is attached a device with a thermally conductive coating that is coplanar with the bottom surface of the integrated circuit package system to the leadframe, the device having the characteristics of being singulated from a wafer and the thermally conductive coating having the characteristics of being singulated from a wafer level thermally conductive coating and encapsulating the device with an encapsulation material that leaves the thermally conductive coating exposed for thermal dissipation.

Abstract: An optical semiconductor device can have a first lead for an optical semiconductor chip to be mounted on and a second lead for joining to a wire extending from the optical semiconductor chip. The device can be configured to be capable of reducing the possibility of a break of the wire even under a thermal shock and the like. The optical semiconductor device can include a first lead for an optical semiconductor chip to be mounted on, a second lead for joining to a wire (for example, gold wire) extending from the optical semiconductor chip mounted on the first lead; a holder part for supporting the first lead and the second lead at two locations each; a lens part; and a light-transmitting sealing part. The second lead can be separated into two lead pieces with a predetermined gap (?0) therebetween as seen in a plan view, or with certain bend configurations as shown in side views, within the inside space of the holder part by which the second lead is supported at two locations.

Abstract: A multi-chip module suitable for use in a battery protection circuit. The multi-chip module includes an integrated circuit chip, a first power transistor, a second power transistor, a first connection structure electrically coupling the integrated circuit chip to the first power transistor, a second connection structure electrically coupling the integrated circuit chip to the second power transistor, and a leadframe structure comprising a first lead, a second lead, a third lead and a fourth lead, wherein the integrated circuit chip, the first power transistor, and the second power transistor are mounted on the leadframe structure. A molding material covers at least part of the integrated circuit chip, the first power transistor, the second power transistor, the first connection structure, and the second connection structure.

Abstract: Provided is a light emitting device. The light emitting device includes: a plurality of lead frame units spaced apart from each other, each of the lead frame units being provided with at least one fixing space perforating a body thereof in a vertical direction; a light emitting diode chip mounted on one of the lead frame units; and a molding unit that is integrally formed on top surfaces of the lead frame units and in the fixing spaces to protect the light emitting diode chip.

Abstract: A semiconductor package assembly may include a lead frame having a die bonding pad and plurality of leads coupled to the first die bonding pad. A vertical semiconductor device may be bonded to the die bonding pad. The device may have a conductive pad electrically connected to one lead through a first bond wire. An electrically isolated conductive trace may be formed from a layer of conductive material of the first semiconductor device. The conductive trace provides an electrically conductive path between the first bond wire and a second bond wire. The conductive path may either pass underneath a third bond wire thereby avoiding the third bond wire crossing another bond wire, or the conductive path may result in a reduced length for the first and second bond wires that is less than a predetermined maximum length.

Abstract: A multi-chip module suitable for use in a battery protection circuit. The multi-chip module includes an integrated circuit chip, a first power transistor, a second power transistor, a first connection structure electrically coupling the integrated circuit chip to the first power transistor, a second connection structure electrically coupling the integrated circuit chip to the second power transistor, and a leadframe structure comprising a first lead, a second lead, a third lead and a fourth lead, wherein the integrated circuit chip, the first power transistor, and the second power transistor are mounted on the leadframe structure. A molding material covers at least part of the integrated circuit chip, the first power transistor, the second power transistor, the first connection structure, and the second connection structure.

Abstract: An integrated circuit package includes an inductance loop formed from a connection of lead wires and one or more input/output (I/O) package pins. In one embodiment, the inductance loop is formed from first and second wires which connect a first bonding pad on the integrated circuit chip to a first I/O pin of the package and a third and fourth wires which connect a second bonding pad on the chip to a second I/O pin of the package. To complete the inductor loop, the first and second I/O pins are connected by a third conductor between the pins. The third conductor may include one or more bonding wires and the I/O pins are preferably ones which are adjacent one another. However, the loop may be formed from non-adjacent connections of I/O pins based, for example, on loop-length requirements, space considerations, and/or other design or functional factors. In another embodiment, connection between the first and second I/O pins is established by making the I/O pins have a unitary construction.

Abstract: A chip-type light-emitting semiconductor device includes: a substrate 4; a blue LED 1 mounted on the substrate 4; and a luminescent layer 3 made of a mixture of yellow/yellowish phosphor particles 2 and a base material 13 (translucent resin). The yellow/yellowish phosphor particles 2 is a silicate phosphor which absorbs blue light emitted by the blue LED 1 to emit a fluorescence having a main emission peak in the wavelength range from 550 nm to 600 nm, inclusive, and which contains, as a main component, a compound expressed by the chemical formula: (Sr1-a1-b1-xBaa1Cab1Eux)2SiO4 (0?a1?0.3, 0?b1?0.8 and 0<x<1). The silicate phosphor particles disperse substantially evenly in the resin easily. As a result, excellent white light is obtained.

Abstract: A chip-type light-emitting semiconductor device includes: a substrate 4; a blue LED 1 mounted on the substrate 4; and a luminescent layer 3 made of a mixture of yellow/yellowish phosphor particles 2 and a base material 13 (translucent resin). The yellow/yellowish phosphor particles 2 is a silicate phosphor which absorbs blue light emitted by the blue LED 1 to emit a fluorescence having a main emission peak in the wavelength range from 550 nm to 600 nm, inclusive, and which contains, as a main component, a compound expressed by the chemical formula: (Sr1-a1-b1-xBaa1Cab1Eux)2SiO4 (0?a1?0.3, 0?b1?0.8 and 0<x<1). The silicate phosphor particles disperse substantially evenly in the resin easily. As a result, excellent white light is obtained.

Abstract: Embodiments of the invention provide a device with a die and a substrate having a similar coefficient of thermal expansion to that of the die. The substrate may comprise a silicon base layer. Build up layers may be formed on the side of the base layer further from the die.

Abstract: A power semiconductor module having surface-mountable flat external contact areas and a method for producing the same is disclosed. In one embodiment, the top sides of the external contacts form an inner housing plane, on which at least one power semiconductor chip is fixed by its rear side on a drain external contact. An insulation layer covers the top side over the edge sides of the semiconductor chip as far as the inner housing plane whilst leaving free the source and gate contact areas on the top side of the semiconductor chip and also whilst partly leaving free the top sides of the corresponding external contacts. Arranged on the insulation layer is a connecting conductive layer between the source contact areas on the top side of the semiconductor chip and the top sides of the source external contacts, and also a gate connecting layer from the gate contact areas to the top side of the gate external contact.

Abstract: The present invention provides a flexible substrate for a package of a die which has an active surface and a plurality of first bond pads arranged in a form of a row and formed on the active surface. The flexible substrate includes a flexible insulating film and a plurality of first leads formed on the flexible insulating film. Each of the first leads corresponds to one of the first bond pads and has a respective first body portion, a respective first bond portion and a respective first extension portion. For each of the first leads, the width of the first bond portion is larger than those of the first body portion and the first extension portion.

Abstract: A folded frame carrier has a die attach pad (DAP) 30 and one or more folded edges 32, 33, 34, 35. Each folded edge has one or more studs 36 and each stud has a trapezoidal tip. The folded frame carrier may be made of single gauge copper or copper alloy. Multiple folded frame carriers may be formed between opposite rails of a lead frame. The folded edges are cut with a relief groove. The tips are formed in edges of the DAP and then the tips are folded upright. The tips provide electrical connection to the terminal on the rear surface of a power semiconductor mounted on the DAP.

Abstract: An LED lighting device comprises a seat with a conductor. A light emitting diode is disposed on the conductor of the seat, and has an upper positive conductive pad, a lower negative conductive pad, and an insulating pad disposed between the positive and negative conductive pads. The lower negative conductive pad of the light emitting diode connects with the conductor. An exterior enclosure is disposed on top of the seat in such a way that a bottom end of the exterior enclosure is in contact with the upper positive conductive pad. A through hole is defined through the bottom end of the exterior enclosure for receiving the light emitting diode. The bottom of the seat is connected with a metal plate that is in contact with the conductor.

Abstract: A packaging structure (10) is provided having a hermetic sealed cavity for microelectronic applications. The packaging structure (10) comprises first and second packaging layers (12, 28) forming a cavity. Two liquid crystal polymer (LCP) layers (16, 22) are formed between and hermetically seal the first and second packaging layers (12, 28). First and second conductive strips (18, 20) are formed between the LCP layers (16, 22) and extend into the cavity. An electronic device (24) is positioned within the cavity and is coupled to the first and second conductive strips (18, 20).