Carbon, E.g., Fullerenes (epo) Patents (Class 257/E23.074)
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Patent number: 8878233Abstract: Provided are a compound semiconductor device and a manufacturing method thereof. A substrate and a graphene oxide layer are provided on the substrate. A first compound semiconductor layer is provided on the graphene oxide layer. The first compound semiconductor layer is selectively grown from the substrate exposed by the graphene oxide.Type: GrantFiled: October 26, 2011Date of Patent: November 4, 2014Assignee: LG Siltron Inc.Inventors: Sung-Jin An, Dong-Gun Lee, Seok-Han Kim
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Patent number: 8796667Abstract: A static random access memory (SRAM) includes: a first carbon nanotube (CNT) inverter, a second CNT inverter, a first switching transistor, and a second switching transistor. The first CNT inverter includes at least a first CNT transistor. The second CNT inverter is connected to the first CNT inverter and includes at least one second CNT transistor. The first switching transistor is connected to the first CNT inverter. The second switching transistor is connected to the second CNT inverter.Type: GrantFiled: December 1, 2009Date of Patent: August 5, 2014Assignees: Samsung Electronics Co., Ltd., Sungkyunkwan University Foundation for Corporate CollaborationInventors: Eun-hong Lee, Un-jeong Kim, Woo-jong Yu, Young-hee Lee
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Patent number: 8664091Abstract: A method for removing a metallic nanotube, which is formed on a substrate in a first direction, includes forming a plurality of conductors in a second direction crossing the first direction, electrically contacting the plurality of conductors with metallic nanotube, respectively, forming at least two voltage-applying electrodes on the conductors, each of which electrically contacting at least one of the conductors, and applying voltages to at least some of the conductors through the voltage-applying electrodes, respectively. Among the conductors to which the voltages are respectively applied, every two adjacent conductors have an electrical potential difference created therebetween, so as to burn out the metallic nanotube.Type: GrantFiled: November 21, 2011Date of Patent: March 4, 2014Assignee: Institute of Microelectronics, Chinese Academy of SciencesInventors: Huilong Zhu, Zhijiong Luo, Haizhou Yin
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Patent number: 8598607Abstract: A light emitting device and a method of manufacturing the same are disclosed. The light emitting device includes a buffer layer formed on a substrate, a nitride semiconductor layer including a first semiconductor layer, an active layer, and a second semiconductor layer, which are sequentially stacked on the buffer layer, a portion of the first semiconductor layer being exposed to the outside by performing mesa etching from the second semiconductor layer to the portion of the first semiconductor layer, and at least one nanocone formed on the second semiconductor layer.Type: GrantFiled: March 24, 2010Date of Patent: December 3, 2013Assignees: LG Electronics Inc., LG Innotek Co., Ltd.Inventors: Jong Wook Kim, Hyun Kyong Cho, Gyu Chul Yi, Sung Jin An, Jin Kyoung Yoo, Young Joon Hong
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Patent number: 8557714Abstract: A method of forming an amorphous carbon layer on an insulating layer includes the step of forming an amorphous carbon layer using a plasma reaction process. The amorphous carbon layer is formed in an atmosphere containing a plasma excitation gas, a CxHy series gas, a silicon-containing gas, and an oxygen-containing gas.Type: GrantFiled: June 25, 2010Date of Patent: October 15, 2013Assignee: Tokyo Electron LimitedInventor: Yoshiyuki Kikuchi
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Patent number: 8518834Abstract: A method for forming an oxide film on a carbon film includes the steps of forming a carbon film on an object to be processed; forming an object-to-be-oxidized layer on the carbon film; and forming an oxide film on the object-to-be-oxidized layer while oxidizing the object-to-be-oxidized layer.Type: GrantFiled: December 27, 2011Date of Patent: August 27, 2013Assignee: Tokyo Electron LimitedInventors: Akinobu Kakimoto, Atsushi Endo, Kazumi Kubo
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Patent number: 8501529Abstract: Provided are a method of doping carbon nanotubes, p-doped carbon nanotubes prepared using the method, and an electrode, a display device or a solar cell including the carbon nanotubes. Particularly, a method of doping carbon nanotubes having improved conductivity by reforming the carbon nanotubes using an oxidizer, doped carbon nanotubes prepared using the method, and an electrode, a display device or a solar cell including the carbon nanotubes are provided.Type: GrantFiled: October 7, 2010Date of Patent: August 6, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Seon-mi Yoon, Seong-jae Choi, Hyeon-jin Shin, Jae-young Choi, Sung-jin Kim, Young-hee Lee
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Electrical connection structure having elongated carbon structures with fine catalyst particle layer
Patent number: 8338822Abstract: An electrical connection structure having elongated carbon structures electrically connected to an electroconductive body is obtained by successively layering an electroconductive catalyst support layer, a fine catalyst particle layer for producing the elongated carbon structures and the elongated carbon structures on the electroconductive body. A low-resistance electrical connection structure is provided.Type: GrantFiled: November 17, 2005Date of Patent: December 25, 2012Assignee: Fujitsu LimitedInventor: Shintaro Sato -
Patent number: 8309992Abstract: A problem of a switching element using for the active layer a carbon nanotube (CNT) dispersion film that can be manufactured at low temperature has been that sufficient electrical contact and thermal conductivity between the CNTs and the source and drain electrode surfaces are not obtained. The switching element of the present invention has a structure in which a mixed layer of carbon nanotubes and a metal material, and a metal layer of the metal material are laminated in this order on source and drain electrodes, and thereby, the CNT-dispersed film and the electrode surfaces can be in firm electrical, mechanical, and thermal contact with each other. Thus, a switching element exhibiting good and stable transistor characteristics is obtained with a low-temperature, convenient, and low-cost process.Type: GrantFiled: September 8, 2008Date of Patent: November 13, 2012Assignee: NEC CorporationInventors: Satoru Toguchi, Hideaki Numata, Hiroyuki Endoh
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Patent number: 8198106Abstract: A field emitter array structure is provided. The field emitter array structure includes a plurality of vertical un-gated transistor structures formed on a semiconductor substrate. The semiconductor substrate includes a plurality of vertical pillar structures to define said un-gated transistor structures. A plurality of emitter structures are formed on said vertical un-gated transistor structures. Each of said emitter structures is positioned in a ballasting fashion on one of said vertical un-gated transistor structures so as to allow said vertical ungated transistor structure to effectively provide high dynamic resistance with large saturation currents.Type: GrantFiled: September 19, 2008Date of Patent: June 12, 2012Assignee: Massachusetts Institute of TechnologyInventors: Akintunde I. Akinwande, Luis Fernando Velásquez-García
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Patent number: 7786487Abstract: Disclosed is a semiconductor device including a SiC substrate and a heat conductor formed in a hole in the SiC substrate and made of a linear structure of carbon elements.Type: GrantFiled: March 10, 2004Date of Patent: August 31, 2010Assignee: Fujitsu LimitedInventors: Mizuhisa Nihei, Masahiro Horibe, Yuji Awano, Kazukiyo Joshin
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Patent number: 7781267Abstract: A semiconductor device and associated method for forming. The semiconductor device comprises an electrically conductive nanotube formed over a first electrically conductive member such that a first gap exists between a bottom side the electrically conductive nanotube and a top side of the first electrically conductive member. A second insulating layer is formed over the electrically conductive nanotube. A second gap exists between a top side of the electrically conductive nanotube and a first portion of the second insulating layer. A first via opening and a second via opening each extend through the second insulating layer and into the second gap.Type: GrantFiled: May 19, 2006Date of Patent: August 24, 2010Assignee: International Business Machines CorporationInventors: Jeffrey Peter Gambino, Son Van Nguyen
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Patent number: 7713858Abstract: A carbon nanotube (CNT) array is patterned on a substrate. The substrate can be a microelectronic die, an interposer-type structure for a flip-chip, a mounting substrate, or a board. The CNT array is patterned by using a patterned metallic seed layer on the substrate to form the CNT array by chemical vapor deposition. The patterned CNT array can also be patterned by using a patterned mask on the substrate to form the CNT array by growing. A computing system that uses the CNT array for heat transfer from the die is also used.Type: GrantFiled: March 31, 2006Date of Patent: May 11, 2010Assignee: Intel CorporationInventors: Nachiket Raravikar, Daewoong Suh
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Patent number: 7709880Abstract: Field effect devices having a gate controlled via a nanotube switching element. Under one embodiment, a non-volatile transistor device includes a source region and a drain region of a first semiconductor type of material and each in electrical communication with a respective terminal. A channel region of a second semiconductor type of material is disposed between the source and drain region. A gate structure is disposed over an insulator over the channel region and has a corresponding terminal. A nanotube switching element is responsive to a first control terminal and a second control terminal and is electrically positioned in series between the gate structure and the terminal corresponding to the gate structure. The nanotube switching element is electromechanically operable to one of an open and closed state to thereby open or close an electrical communication path between the gate structure and its corresponding terminal.Type: GrantFiled: April 30, 2007Date of Patent: May 4, 2010Assignee: Nantero, Inc.Inventors: Claude L. Bertin, Thomas Rueckes, Brent M. Segal
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Publication number: 20100072617Abstract: A multiple die structure includes a first die (110), a second die (120), a carbon nanotube (130) having a first end (131) in physical contact with the first die and having a second end (132) in physical contact with the second die, and an electrically conductive material (240) in physical contact with the first end of the carbon nanotube and in physical contact with the first die. Forming a connection between the first die and the second die can include providing a connection structure (400, 500, 600, 900) in which the electrically conductive material is adjacent to the carbon nanotube, placing the connection structure adjacent to the first die and to the second die, and bonding the first die and the second die to the connection structure.Type: ApplicationFiled: September 22, 2008Publication date: March 25, 2010Inventors: Lakshmi Supriya, Gloria Alejandra Camacho-Bragado
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Patent number: 7671398Abstract: An apparatus includes a plurality of wash durable clothing strands; an array of nano electronic elements fabricated in the strands; and an array of memory elements coupled to the nano electronic elements. The nano electronic elements can include solar cells, display elements, or antennas, among others.Type: GrantFiled: March 6, 2006Date of Patent: March 2, 2010Inventor: Bao Q. Tran
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Patent number: 7585718Abstract: A multilayer insulating structure including a first stop layer, a first insulating layer and a second stop layer is formed on the first conductive structure. A second conductive structure and a second insulating layer are formed on the first conductive structure. The second insulating layer and the second conductive structure are etched to form a first hole and a second hole having a first radius. A spacer is formed on sidewalls of the first and second holes. The second stop layer and the first insulating layer are etched using the spacer as an etch mask to form a third hole having a second radius smaller than the first radius. A sacrificial filler is formed on the first stop layer to fill the third hole. After removing the spacer, the sacrificial filler is removed. The first stop layer is etched. A carbon nano-tube is grown from the first conductive structure.Type: GrantFiled: October 31, 2007Date of Patent: September 8, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Hong Cho, Seung-Pil Chung, Hong Sik Yoon, Kyung-Rae Byun
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Patent number: 7538436Abstract: The high-power pack semiconductor module (1) comprises a layer (3, 4), which is brought into direct contact with one or both of the main electrodes of the Si semiconductor chip, (2), said layer being made of a metal matrix composite material whose coefficient of thermal expansion can be tailored to a value either close or matching that of Si.Type: GrantFiled: September 29, 2003Date of Patent: May 26, 2009Assignee: ABB Research LtdInventors: Satish Gunturi, Daniel Schneider
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Publication number: 20080169563Abstract: A semiconductor package is disclosed that includes a semiconductor device; a circuit board; and a connection mechanism including a first conductive terminal provided on the semiconductor device, and a second conductive terminal provided on the circuit board side, the connection mechanism electrically connecting the semiconductor device and the circuit board via the first conductive terminal and the second conductive terminal. At least one of the first conductive terminal and the second conductive terminal of the connection mechanism includes one or more carbon nanotubes each having one end thereof fixed to the surface of the at least one of the first conductive terminal and the second conductive terminal, and extending in a direction away from the surface. The first conductive terminal and the second conductive terminal engage each other through the carbon nanotubes.Type: ApplicationFiled: September 14, 2007Publication date: July 17, 2008Applicant: FUJITSU LIMITEDInventors: Yuji Awano, Masataka Mizukoshi
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Patent number: 7371696Abstract: A Carbon NanoTube (CNT) structure includes a substrate, a CNT support layer, and a plurality of CNTs. The CNT support layer is stacked on the substrate and has pores therein. One end of each of the CNTs is attached to portions of the substrate exposed through the pores and each of the CNTs has its lateral sides supported by the CNT support layer. A method of vertically aligning CNTs includes: forming a first conductive substrate; stacking a CNT support layer having pores on the first conductive substrate; and attaching one end of the each of the CNTs to portions of the first conductive substrate exposed through the pores.Type: GrantFiled: June 19, 2006Date of Patent: May 13, 2008Assignee: Samsung SDI Co., Ltd.Inventors: Yong-Wan Jin, Jong-Min Kim, Hee-Tae Jung, Tae-Won Jeong, Young-Koan Ko
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Patent number: 7332736Abstract: This invention provides novel methods of fabricating novel gated field emission structures that include aligned nanowire electron emitters (individually or in small groups) localized in central regions within gate apertures. It also provides novel devices using nanoscale emitters for microwave amplifiers, electron-beam lithography, field emission displays and x-ray sources. The new emission structures are particularly useful in the new devices.Type: GrantFiled: December 16, 2004Date of Patent: February 19, 2008Assignee: Samsung Electronic Co., LtdInventor: Sungho Jin
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Patent number: 7316982Abstract: An embodiment of the present invention is a technique to control carbon nanotubes (CNTs). A laser beam is focused to a carbon nanotube (CNT) in a fluid. The CNT is responsive to a trapping frequency. The CNT is manipulated by controlling the focused laser beam.Type: GrantFiled: December 24, 2003Date of Patent: January 8, 2008Assignee: Intel CorporationInventor: Yuegang Zhang
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Patent number: 7294877Abstract: Nanotube on gate FET structures and applications of such, including n2 crossbars requiring only 2n control lines. A non-volatile transistor device includes a source region and a drain region of a first semiconductor type of material and a channel region of a second semiconductor type of material disposed between the source and drain region. A gate structure is made of at least one of semiconductive or conductive material and is disposed over an insulator over the channel region. A control gate is made of at least one of semiconductive or conductive material. An electromechanically-deflectable nanotube switching element is in fixed contact with one of the gate structure and the control gate structure and is not in fixed contact with the other of the gate structure and the control gate structure. The device has a network of inherent capacitances, including an inherent capacitance of an undeflected nanotube switching element in relation to the gate structure.Type: GrantFiled: March 26, 2004Date of Patent: November 13, 2007Assignee: Nantero, Inc.Inventors: Thomas Rueckes, Brent M. Segal, Bernard Vogeli, Darren K. Brock, Venkatachalam C. Jaiprakash, Claude L. Bertin
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Patent number: 7268423Abstract: The present invention describes a rewiring plate for components with connection grids of between approx. 100 nm and 10 ?m, which rewiring plate includes a base body and passages with carbon nanotubes, the lower end of the passages opening out into contact connection surfaces, and the carbon nanotubes forming an electrically conductive connection from the contact connection surfaces to the front surface of the base body.Type: GrantFiled: December 16, 2004Date of Patent: September 11, 2007Assignee: Infineon Technologies AGInventors: Gottfried Beer, Jochen Dangelmaier, Alfred Haimerl, Manfred Mengel, Klaus Mueller, Klaus Pressel
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Patent number: 7211854Abstract: Field effect devices having a gate controlled via a nanotube switching element. Under one embodiment, a non-volatile transistor device includes a source region and a drain region of a first semiconductor type of material and each in electrical communication with a respective terminal. A channel region of a second semiconductor type of material is disposed between the source and drain region. A gate structure is disposed over an insulator over the channel region and has a corresponding terminal. A nanotube switching element is responsive to a first control terminal and a second control terminal and is electrically positioned in series between the gate structure and the terminal corresponding to the gate structure. The nanotube switching element is electromechanically operable to one of an open and closed state to thereby open or close an electrical communication path between the gate structure and its corresponding terminal.Type: GrantFiled: June 9, 2004Date of Patent: May 1, 2007Assignee: Nantero, Inc.Inventors: Claude L. Bertin, Thomas Rueckes, Brent M. Segal