Abstract: A cooling assembly for a computer module has a cooling device and a mounting device. The mounting device includes a rod shaped fastening element having a male thread and a stop. The fastening element is nonrotatable and movable along its axis with respect to the cooling device. The fastening element is guided through a first hole in the cooling device and a second hole in the computer module, when the cooling device is mounted on the computer module. The stop prevents the fastening element from sliding through the first and second holes. The mounting device also has an elastic element arranged along the axis of the fastening element that presses or pulls the stop away from the computer module. A nut on the mounting device is engageable with the male thread of the fastening element. The stop and the nut are arranged at opposite sides of the computer module.

Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a deep trench capacitor (DTC) having a portion within the substrate, and an interconnect structure over the DTC and the substrate. The interconnect structure includes a seal ring structure in electrical contact with the substrate, a first conductive via in electrical contact with the DTC, and a first conductive line electrically coupling the seal ring structure to the first conductive via.

Abstract: In an embodiment, a structure includes: a first integrated circuit die including first die connectors; a first dielectric layer on the first die connectors; first conductive vias extending through the first dielectric layer, the first conductive vias connected to a first subset of the first die connectors; a second integrated circuit die bonded to a second subset of the first die connectors with first reflowable connectors; a first encapsulant surrounding the second integrated circuit die and the first conductive vias, the first encapsulant and the first integrated circuit die being laterally coterminous; second conductive vias adjacent the first integrated circuit die; a second encapsulant surrounding the second conductive vias, the first encapsulant, and the first integrated circuit die; and a first redistribution structure including first redistribution lines, the first redistribution lines connected to the first conductive vias and the second conductive vias.

Abstract: A tunable filter with wide tuning range and high out-of-band rejection is achieved with a tunable bandpass filter and a number of cascaded, fixed frequency Lame-Mode Resonators (LMRs) notch filters or other resonators. In some embodiments, the filter can be implemented with all of the elements on an integrated circuit, saving space for use in applications such as mobile phones or other mobile communication devices.

Abstract: A shielding structure for a system-in-package includes a substrate having stacked first ground planes in the substrate, a second ground plane on a surface of the substrate, and a ground pad arranged along an edge of the substrate disposed on the second ground plane. In addition, ground holes disposed in the substrate electrically couple the adjacent ground planes. The ground holes are arranged in a ring around a board body and spacing between the adjacent ground holes is less than a specified distance in an arrangement that defines a Faraday cage. A device is disposed on the opposing surface of the substrate and a package layer is disposed on the device.

Abstract: The present invention reduces an electromagnetic coupling that can occur between a first signal line provided on a first substrate and a second signal line provided on a main surface of a second substrate on the first substrate side. A wireless module (10) includes an RFIC (28), a baseband IC (16), a first substrate (11) on which first signal lines (121 through 126) for transmitting a baseband signal are provided, and a second substrate (21) provided with second signal lines (2201 through 2232) for transmitting an RF signal on a main surface (211). The first substrate (11) is provided with a pseudo conductor wall (post wall 13) for shielding the first signal lines (121 through 126) and the second signal lines (2201 through 2232).

Abstract: In a circuit board (700A), a first capacitor (410) extends from a wiring pattern (110) to a region located on one side of the wiring pattern (110) in the width direction. A second capacitor (420) extends from the wiring pattern (110) to a region located on the other side of the wiring pattern (110) in the width direction. With a semiconductor device (300) mounted on the circuit board (700A), a power supply terminal (320) is electrically connected to the wiring pattern (110). The semiconductor device (300), the wiring pattern (110), the first capacitor (410), a first interlayer joint (510), a ground plane (210), and a third interlayer joint (530) constitute a first closed circuit. The semiconductor device (300), the wiring pattern (110), the second capacitor (420), a second interlayer joint (520), the ground plane (210), and the third interlayer joint (530) constitute a second closed circuit.

Abstract: A semiconductor device assembly is provided. The assembly includes a substrate including an upper surface having a plurality of internal contact pads and at least one grounding pad and a lower surface having a plurality of external contact pads. The assembly further includes a semiconductor die coupled to the plurality of internal contact pads, a conductive underfill dam coupled to the at least one grounding pad, and underfill material disposed at least between the semiconductor die and the substrate. The underfill material includes a fillet between the semiconductor die and the underfill dam. The assembly further includes a conductive EMI shield disposed over the semiconductor die, the fillet, and the conductive underfill dam.

Abstract: Disclosed is a radio frequency integrated circuit (RFIC) chip that includes an integrated circuit (IC) area and a crackstop laterally surrounding the IC area. The crackstop includes a metallic barrier (or, alternatively, concentric metallic barriers) electrically isolated from the IC area. One or more noise suppressors and, particularly, one or more passive filters (e.g., low pass filter(s), high pass filter(s), band pass filter(s), and/or band stop filter(s)) are integrated into the structure of the metallic barrier(s) to inhibit propagation, through the crackstop, of noise signals within a specific RF range. The specific RF range can be a customer-specified operating parameter. By embedding customized noise suppressor(s) into the crackstop, local signal interference unique to the customer-specified operating parameters can be minimized while also avoiding or at least minimizing the risk of moisture ingress to the IC area. Also disclosed is a method of forming the chip.

Abstract: A propulsion system for use with an aircraft includes a gas turbine engine, an electric power system, and at least one propulsor. The gas turbine engine includes a compressor, a combustor, and a turbine. The electric power system includes a generator coupled to the gas turbine engine to generate electrical energy, power electronics connected to the generator to receive the electrical energy from the generator, and a motor configured to produce rotational energy in response to receiving electric energy from the power electronics. The propulsor is configured to use rotational energy received from the motor of the electric power system to generate thrust for propelling the aircraft.

Abstract: A semiconductor package structure includes a semiconductor device with an active surface, a conductive pillar on the conductive pad, an adhesion strengthening layer, and an encapsulant in contact with the adhesion strengthening layer. The conductive pillar has a side surface and a top surface. The adhesion strengthening layer is conformally disposed on the side surface of the conductive pillar and the active surface of the semiconductor device.

Abstract: Disclosed herein are integrated circuit (IC) structures that may be included in package substrates. For example, disclosed herein are passive components in package substrate, wherein the passive components include at least one non-circular via and at least one pad in contact with the at least one non-circular via, and the passive components include an inductor or a capacitor. Other embodiments are also disclosed.

Abstract: A signal feeding assembly to a radiating element which is not formed from a metal frame or casing includes a substrate, a signal coupling unit, a switching unit, and a transmission unit. The switching unit includes at least two switching output ends. The transmission unit can transmit and receive a baseband signal and an RF signal. The signal coupling unit is spaced from a radiation element and can generate a plurality of radiation modes. The signal coupling unit includes at least two coupling pieces. Each coupling piece is electrically connected to a switching output end. The switching unit controls switching of the coupling pieces through the switching output ends and can switch a plurality of radiation modes. The application also provides an antenna module and an electronic device.

Abstract: A light-weight radiation protection panel comprising radiation protection layer and a flexible material. The radiation protection layer comprises a plurality of a shielding material distributed in repeated and adjacent units of geometrical shapes, the light-weight radiation protection panel being able to be embodied in a wearable garment providing flexibility.

Abstract: A semiconductor structure includes a first redistribution structure, wherein the first redistribution structure includes first conductive pattern. The semiconductor structure further includes a die over the first redistribution structure. The semiconductor structure further includes a molding over the first redistribution structure, wherein the molding surrounds the die, and the molding has a first dielectric constant. The semiconductor structure further includes a dielectric member extending through the molding, wherein the dielectric member has a second dielectric constant different from the first dielectric constant. The semiconductor structure further includes a second redistribution structure over the die, the dielectric member and the molding, wherein the second redistribution layer includes an antenna over the dielectric member, and the antenna is electrically connected to the die.

Abstract: A module includes: a substrate including a first main surface; a first component mounted on the first main surface; a first land electrode provided on the first main surface; a first mold resin that covers at least the first main surface and the first component; a top surface shield film that covers a top surface of the first mold resin; a side surface shield film that covers a side surface of the first mold resin; a first conductor pillar provided in the first mold resin to electrically connect the first land electrode and the top surface shield film; and an upper first bypass conductor provided in the first mold resin to electrically connect the top surface shield film and the side surface shield film.

Abstract: An electrostatic discharge (ESD) protection circuit is configured to protect a target circuit that operates in a cryogenic temperature is provided. The ESD protection circuit connects a terminal of the target circuit and a ground potential with no connection to a bias potential. When the ESD protection circuit receives a voltage potential at the terminal of the target circuit, the ESD protection circuit (i) disallows electrical current to flow through from the received voltage potential when the device is at a cryogenic temperature and (ii) allows electrical current to flow through from the received voltage potential when the device is at a room temperature.

Abstract: A semiconductor device package is provided that includes a substrate, a first support structure disposed on the substrate and a first antenna. The first support structure includes a first surface spaced apart from the substrate by a first distance. The first antenna is disposed above the first surface of the first support structure. The first antenna has a first surface, a second surface opposite the first surface and a third surface extending from the first surface to the second surface, wherein the first surface and the second surface of the first antenna are exposed.

Abstract: A semiconductor package may include a package substrate, a first interposer substrate mounted on the package substrate, and a first semiconductor chip disposed on the first interposer substrate. The first interposer substrate may include a first base layer, a second base layer disposed on the first base layer, circuit patterns provided in each of the first base layer and the second base layer, and an integrated device embedded in the first base layer and connected to at least one of the circuit patterns. A top surface of the first base layer may contact a bottom surface of the second base layer.

Abstract: The present publication discloses a micromechanical structure including at least one active element, the micromechanical structure comprising a substrate, at least one layer formed on the substrate forming the at least part of the at least one active element, mechanical contact areas through which the micromechanical structure can be connected to other structures like printed circuit boards and like. In accordance with the invention the micromechanical structure includes weakenings like trenches around the mechanical contact areas for eliminating the thermal mismatch between the active element of the micromechanical structure and the other structures.

Abstract: An electronic apparatus includes a semiconductor package including a sensor unit that outputs a signal responding to an applied physical quantity, mounted on a mounting member. An island projected region is defined as a region in the mounting member obtained by projecting an outline of an island on which the sensor unit is mounted, and a part of or entire of the island projected region is configured as a through hole or a concave portion.

Abstract: A semiconductor device includes a semiconductor element, an internal electrode connected to the semiconductor element, a sealing resin covering the semiconductor element and a portion of the internal electrode, and an external electrode exposed from the sealing resin and connected to the internal electrode. The internal electrode includes a wiring layer and a columnar portion, where the wiring layer has a wiring layer front surface facing the back surface of the semiconductor element and a wiring layer back surface facing opposite from the wiring layer front surface in the thickness direction. The columnar portion protrudes in the thickness direction from the wiring layer front surface. The columnar portion has an exposed side surface facing in a direction perpendicular to the thickness direction. The external electrode includes a first cover portion covering the exposed side surface.

Abstract: Provided is a current detection device including a first stacked board; a second stacked board provided on a first region on the first stacked board; a third stacked board provided on a second region on the first stacked board; a magnetic measurement element provided in a third region on the first stacked board, the magnetic element provided between the first region and the second region; and a first coil provided on the magnetic measurement element or below the magnetic measurement element.

Abstract: An integrated circuit package that includes a liquid phase thermal interface material (TIM) is described. The package may include any number of die. The liquid phase TIM can be sealed in a chamber between a die and an integrated heat spreader and bounded on the sides by a perimeter layer. The liquid phase TIM can be fixed in place or circulated, depending on application. A thermal conductivity of the liquid phase TIM can be at least 15 Watts/meter-Kelvin, according to some embodiments. A liquid phase TIM eliminates failure mechanisms present in solid phase TIMs, such as cracking due to warpage and uncontained flow out of the module.

Abstract: A semiconductor package including a substrate including at least one ground pad and a ground pattern; a semiconductor chip on the substrate; and a shield layer on the substrate and covering the semiconductor chip, wherein the shield layer extends onto a bottom surface of the substrate and includes an opening region on the bottom surface of the substrate, a bottom surface of the at least one ground pad is at the bottom surface of the substrate, a side surface of the ground pattern is at a side surface of the substrate, and the shield layer on the bottom surface of the substrate is in contact with the bottom surface of the at least one ground pad and in contact with the side surface of the ground pattern.

Abstract: Embodiments include package substrates and methods of forming the package substrates. A package substrate includes a first conductive layer in a first dielectric, a second dielectric over the first dielectric, and a second conductive layer in the second dielectric, where the second conductive layer includes first and second traces. The package substrate also includes a third conductive layer over the second dielectric, and a high dielectric constant (Dk) and low DK regions in the first and second dielectrics, where the high Dk region surrounds the first traces, and where the low Dk region surrounds the second traces. The high Dk region may be between the first and third conductive layers. The low Dk region may be between the first and third conductive layers. The package substrate may include a dielectric region in the first and second dielectrics, where the dielectric region separates the high Dk and low Dk regions.

Abstract: An antenna apparatus comprises a semiconductor die in a molding compound layer, a first through via is between a sidewall of the semiconductor die and a sidewall of the molding compound layer and an antenna structure over the molding compound layer, wherein a first portion of the antenna structure is directly over a top surface of the semiconductor die and a second portion of the antenna structure is directly over a top surface of the first through via.

Abstract: A heatsink comprising a heat exchange device having a plurality of heat exchange elements each having a surface boundary with respect to a heat transfer fluid, having successive elements or regions having varying size scales. According to one embodiment, an accumulation of dust or particles on a surface of the heatsink is reduced by a removal mechanism. The mechanism can be thermal pyrolysis, vibration, blowing, etc. In the case of vibration, adverse effects on the system to be cooled may be minimized by an active or passive vibration suppression system.

Abstract: A semiconductor device comprises; a lead frame having leads and a die pad; a printed circuit board including an electrode for the connection of each of the leads and the die pad, a wiring pattern, and an opening exposing a part of a surface of the die pad; the semiconductor element for processing a high frequency signal, mounted on a surface of a metal block bonded to the surface of the die pad exposed through the opening, and connected to the wiring pattern with a metal wire; electronic components connected to the wiring pattern and mounted on a surface of the printed circuit board; and a sealing resin to seal the printed circuit board, the semiconductor element, the electronic components, and the metal wire so as to expose rear surfaces of the leads and the die pad.

Abstract: A component carrier with a stack that has at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a semiconductor component embedded in the stack, and a highly-conductive block embedded in the stack and being thermally and/or electrically coupled with the semiconductor component is illustrated and described.

Abstract: A method of forming a structure upon a substrate is disclosed. The method comprises: providing a substrate upon a surface of which a plurality of electrically conductive pads are disposed; depositing fluid containing a dispersion of electrically polarizable nanoparticles onto the substrate such that at least a portion of a first one of the plurality of pads is in contact with the fluid; applying an alternating electric field to the fluid using a first electrode and a second electrode, the first electrode being positioned so as to provide an effective first electrode end position from which the electric field is applied, coincident with the deposited fluid, and spaced apart from the first pad by a distance, and the second electrode being in contact with the first pad, such that a plurality of the nanoparticles are assembled to form a first elongate structure extending along at least part of the distance between the effective first electrode end position and the portion of the first pad.

Abstract: A patch antenna includes a flat-plate radiating element; and a metal wall provided outside a peripheral edge of the radiating element, such that a wall surface of the metal wall intersects a line connecting a center of the radiating element and a feeding point. An antenna device for a vehicle includes: the patch antenna; a housing installed in a predetermined orientation at a predetermined position of the vehicle; and a support supporting the patch antenna such that the patch antenna is used for vertically polarized waves when the housing is installed in the predetermined orientation at the predetermined position.

Abstract: A magnetic sensor device having a spin-valve-type magnetoresistive effect element and capable of stably applying a bias magnetic field on the free layer of the magnetoresistive effect element includes a spin-valve-type magnetoresistive effect element, a substrate on which the magnetoresistive effect element is positioned, a power source that supplies a substantially constant electric current applied on the magnetoresistive effect element, and a magnetic field generator that is connected to the electric current path of the electric current applied on the magnetoresistive effect element in series. The magnetic field generator is provided to be capable of applying a bias magnetic field on at least a portion of the magnetoresistive effect element. The magnetic field generator is close to a portion of the magnetoresistive effect element and is positioned at a different level from the substrate.

Abstract: The present disclosure provides an electronic package. The electronic package includes a substrate, an electronic component, a plurality of conductive elements, a metal sheet and a molding layer. The electronic component is disposed on the substrate and electrically connected to the substrate. The conductive elements are disposed on the substrate and electrically connected with the grounding circuit on the substrate. The metal sheet is disposed above the electronic component and is in electrical contact with the conductive elements. The molding layer is formed between the substrate and the metal sheet to enclose the electronic component and the conductive elements. The present disclosure further provides a method of manufacturing the above electronic package.

Abstract: Disclosed are an electroluminescent display panel and a brightness compensation method therefor. The electroluminescent display panel is provided with photoelectric detectors corresponding to at least a portion of light-emitting structures. The photoelectric detector is used to convert, under control of a sample control line, light emitted when the corresponding light-emitting structure is turned on into an electric signal, and to output the same to a detection output line. The display panel employs a photoelectric detector to detect a change in display brightness of a corresponding light-emitting structure, such that voltage compensation can be performed on the light-emitting structure according to the detected brightness change, thereby ensuring good display performance of the entire display panel.

Abstract: A component carrier including: i) a layer stack with at least one electrically insulating layer structure and at least one electrically conductive layer structure, ii) a cavity formed in the layer stack, iii) a dielectric element at least partially placed in the cavity, wherein the dielectric element and the layer stack are electromagnetically couple-able, and iv) an electrically insulating connection material between the dielectric element and the layer stack.

Abstract: An apparatus and a method of fabricating an apparatus for piercing an object, the apparatus comprises: a substrate; one or more needles; one or more anchors and one or more piezoelectric actuators. The method comprises the steps of deposit sacrificial layer over the substrate; deposit conducting layer over the sacrificial layer; deposit piezoelectric layer over the conducting layer; etch a geometry of the one or more piezoelectric actuators using a first mask created by lithography process; deposit the one or more needle and one or more anchors using a second mask created by lithography process and a lift-off process; etch the sacrificial layer under the needle and the one or more piezoelectric actuators, wherein the anchors are configured to connect the substrate to the piezoelectric actuators and the one or more piezoelectric actuators are configured to expand, contract or bend, and form holding arms that are configured to move the one or more needles.

Abstract: Provided is a high-frequency module capable of enhancing its shielding performance by reducing a placement interval of bonding wires at a desired position using a plurality of bonding wires different in arc height when a shield member is formed using the bonding wires. A high-frequency module includes a multilayer wiring board, components mounted on an upper surface of the multilayer wiring board, a shield member disposed along the component, a sealing resin layer, and a shield film. The shield member is formed of a plurality of bonding wires different in arc height. When the bonding wires are disposed by allowing a bonding wire having a high arc height to sequentially straddle a bonding wire having a low arc height in a nested manner, a placement interval of the bonding wires at a desired position can be reduced and shielding performance can be enhanced.

Abstract: The present disclosure relates to a wiring circuit, and a method for producing the wiring circuit, that includes graphite wiring having a specified thickness, a high electrical conductivity, and a high carrier mobility. The wiring circuit may include graphite wiring comprised of graphite where the graphite wiring has a thickness of 3 nm or more and less than 300 nm. The graphite may have an electrical conductivity along a graphite film plane direction of 18000 S/cm or more, and the graphite may have a carrier mobility along the graphite film plane direction of 9500 cm2/Vsec or more. The method for producing a wiring circuit may include steps of: (1) bonding a graphite film with a substrate; (2) plasma etching the graphite film to form a graphite thin film; and (3) etching the graphite thin film to form a wiring circuit.

Abstract: An antenna device comprises: a printed circuit board formed with both sides in a plate shape including a first surface and a second surface and including at least one conductive layer between the first surface and the second surface; an array of conductive plates formed parallel to the first surface on or in the printed circuit board; a wireless communication circuit electrically connected to the array of conductive plates, coupled to the first surface, and capable of transmitting or receiving frequencies between 3 GHz and 300 GHz; and a conductive shielding structure mounted on the first surface of the printed circuit board and electrically connected to the at least one conductive layer when covering the wireless communication circuit, wherein the conductive shielding structure may include: a third surface facing the first surface when seen from the top of the first surface; and an electromagnetic bandgap (EBG) structure formed on the third surface.

Abstract: An electronic package comprising a first substrate that includes a first plurality of substrate vias and one or more cavities, a second substrate that includes a second plurality of substrate vias and one or more cavities, and a standoff substrate(s). The standoff substrate(s)positioned between the first and second substrate, the standoff substrate(s) is affixed to each of the first and second substrate, standoff substrate(s) forms a clearance between the first and second substrate, the standoff substrate(s) comprises an intervening plurality of substrate vias passing through the entire thickness of the standoff substrate(s), and a portion of the second plurality of substrate vias are configured to be or capable of being electrically connected to a portion of the first plurality of substrate vias by way of a portion of the intervening plurality of substrate vias.

Abstract: An electronic package and a method for fabricating the same are provided. The method includes disposing an electronic component on a lower side of a first carrier and forming an encapsulant on an upper side of the first carrier. A first conductor is disposed on the encapsulant and configured for generating radiation energy by an alternating voltage, an alternating current or radiation variation. As such, the electronic package has a reduced thickness and improved antenna efficiency.

Abstract: The present disclosure provides a control unit of display device and a display device. The control unit of display device includes: a back plate a plurality of circuit structures, the plurality of circuit structures being arranged on the back plate; a plurality of electric field shielding structures, each of the electric field shielding structures being arranged between the circuit structures and configured to shield an electric field between the circuit structures, wherein each of the electric field shielding structures includes a plurality of shielding strips, the plurality of shielding strips are spaced apart from each other and projections of the shielding strips on a corresponding side of the circuit structure are continuous and uninterrupted.

Abstract: An electronic substrate includes a dielectric core, a first conducting layer on a first side of the core and a second conducting layer on the second side of the core opposite the first side. At least one differential coaxial through-via includes a first inner signal through-via that is at least electrical conductor lined for a first signal path and at least a second inner signal through-via that is also at least electrical conductor lined positioned side-by-side and being dielectrically isolated from the first inner signal through-via for a second signal path. An annular-shaped outer ground shield enclosure is at least conductor lined that surrounds and is dielectrically isolated from both the first and second inner signal through-vias.

Abstract: A module includes a wiring substrate; a component; a metal pin attached to a land electrode formed at one main surface and has a first extending portion extends from the one main surface, a second extending portion that is bent and extends from one end of the first extending portion on an opposite side from the one end surface, and a third extending portion that is bent and extends from one end of the second extending portion on an opposite side from the first extending portion to approach the one main surface; a sealing resin layer that covers the one main surface, the component, and the metal pin; and a shield layer that covers a side surface of the wiring substrate, a surface of the sealing resin layer, and the upper surface and the side outer surface of the metal pin.

Abstract: A power semiconductor module arrangement includes a substrate including a dielectric insulation layer, a first metallization layer arranged on a first side of the dielectric insulation layer, and a second metallization layer arranged on a second side of the dielectric insulation layer, the dielectric insulation layer being disposed between the first and second metallization layers. The arrangement further includes at least one first connection element mounted on the substrate, a housing having sidewalls, and at least one second connection element. Each second connection element includes a first part extending vertically through a sidewall of the housing, a second part coupled to a first end of the first part and protruding from the sidewall in a vertical direction, and a third part coupled to a second end of the first part opposite the first end. Each third part is detachably coupled to one of the at least one first connection element.

Abstract: A module unit includes a carrier substrate, an antenna substrate as well as sealants. The carrier substrate includes a chip arranged on a first main surface as well as a spacer arranged on the first main surface. The antenna substrate includes at least one antenna structure. The sealants hermetically seal off the antenna substrate and the carrier substrate in an edge area and connect same to each other. The antenna substrate is connected to the carrier substrate via the spacer, so that a cavity is formed between the chip and the antenna substrate.

Abstract: A socket assembly includes a socket connector including a socket substrate having an upper surface and a lower surface, upper socket contacts on the upper surface configured to be terminated to an electronic package and lower socket contacts configured to be terminated to a host circuit board. The socket connector includes first and second power contacts. The first power contact is configured to be terminated to the electronic package. The socket assembly includes a power connector terminated to the socket substrate having a power connector terminal electrically connected to the second power contact. The socket substrate is configured to electrically connect the power connector to the electronic package through the first power contact and the second power contact.

Abstract: An offset interposer includes a land side including land-side ball-grid array (BGA) and a package-on-package (POP) side including a POP-side BGA. The land-side BGA includes two adjacent, spaced-apart land-side pads, and the POP-side BGA includes two adjacent, spaced-apart POP-side pads that are coupled to the respective two land-side BGA pads through the offset interposer. The land-side BGA is configured to interface with a first-level interconnect. The POP-side BGA is configured to interface with a POP substrate. Each of the two land-side pads has a different footprint than the respective two POP-side pads.

Abstract: An electromagnetic-coupling module including a radio IC chip and a feeder circuit board on which the radio IC chip is mounted and a feeder circuit including a resonant circuit having a predetermined resonant frequency is attached to an article. The article has a radiation element that radiates a transmission signal supplied from the feeder circuit of the electromagnetic-coupling module via electromagnetic coupling and that supplies a received reception signal to the feeder circuit via the electromagnetic coupling.