Abstract: An active matrix substrate includes a first TFT disposed in each of pixel regions, a first flattened layer covering the first TFT, and a pixel electrode provided on the first flattened layer. The first TFT includes a lower gate electrode, a lower gate insulating layer, an oxide semiconductor layer, an upper gate insulating layer, and an upper gate electrode. The active matrix substrate further includes a first connection electrode for electrically connecting a drain contact region of the oxide semiconductor layer and the pixel electrode. The first flattened layer includes a pixel contact hole formed so as to expose a part of the first connection electrode. The bottom face of the pixel contact hole at least partially overlaps, of a lower gate metal layer including a lower gate electrode and an upper gate metal layer including an upper gate electrode, at least the lower gate metal layer when viewed from the normal direction of the substrate.

Abstract: Disclosed is a display device and a method of manufacturing the same having improved reliability. In the display device, at least one of a plurality of dielectric films disposed between an oxide semiconductor layer and a light-emitting device includes a lower region disposed on the oxide semiconductor layer and an upper region disposed on the lower region, the upper region including a trap element configured to trap hydrogen, whereby reliability of a thin film transistor including the oxide semiconductor layer is improved.

Abstract: The present disclosure provides a display panel and a display device. The display panel includes a plurality of auxiliary pixel driving circuits. Each of the auxiliary pixel driving circuits includes transistors, and each of the transistors includes an active layer and an insulation layer. The display panel is defined with first dummy holes in a transition display area, and the first dummy holes penetrate a part of the insulation layer away from the active layer in order to reduce difference in electrical properties between the auxiliary pixel driving circuits through the first dummy holes, thereby achieving display uniformity of the display panel.

Abstract: A pixel electrode or a common electrode is a light-transmissive conductive film; therefore, it is formed of ITO conventionally. Accordingly, the number of manufacturing steps and masks, and manufacturing cost have been increased. An object of the present invention is to provide a semiconductor device, a liquid crystal display device, and an electronic appliance each having a wide viewing angle, less numbers of manufacturing steps and masks, and low manufacturing cost compared with a conventional device. A semiconductor layer of a transistor, a pixel electrode, and a common electrode of a liquid crystal element are formed in the same step.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of light-emitting elements on a first substrate and forming a first pattern array on a second substrate, wherein the first pattern array includes an adhesive layer. The method also includes transferring the plurality of light-emitting elements from the first substrate to the second substrate and forming the first pattern array on a third substrate. The method includes transferring the plurality of light-emitting elements from the second substrate to the third substrate, and reducing an adhesion force of a portion of the adhesive layer. The method also includes forming a second pattern array on a fourth substrate, and transferring the plurality of light-emitting elements from the third substrate to the fourth substrate. The pitch between the plurality of light-emitting elements on the first substrate is different than the pitch of the first pattern array.

Abstract: A display panel and a display device are provided. The display panel includes a display region including a first region and a second region and a frame region. The display panel also includes a frame adhesive located in the second region, and a padding metal located in the second region. Along a direction perpendicular to a plane where the display panel is located, the padding metal at least partially overlaps the frame adhesive. In addition, the display panel includes a cathode signal line located in the first region. Moreover, the display panel includes a cathode layer located in the display region and connected to the cathode signal line. Further, the display panel includes at least one connecting part connected to the padding metal. The connecting part is located on a side of the padding metal adjacent to the first region, and is connected to the cathode signal line.

Abstract: The present disclosure provides a display panel and a method for making the display panel. The method for making the display panel includes: providing a substrate; preparing a driving circuit layer on one side of the substrate; the driving circuit layer includes a binding layer, a display base and an array circuit layer which are stacked, and the binding layer is located between the display base and the substrate. Removing the substrate and the binding layer is exposed; binding the external control unit on the binding layer.

Abstract: Embodiments of a glass wafer for semiconductor fabrication processes are described herein. In some embodiments, a glass wafer includes: a glass substrate comprising: a top surface, a bottom surface opposing the top surface, and an edge surface between the top surface and the bottom surface; a first coating disposed atop the glass substrate, wherein the first coating is a doped crystalline silicon coating having a sheet-resistance of 100 to 1,000,000 ohm per square; and a second coating having one or more layers disposed atop the glass substrate, wherein the second coating comprises a silicon containing coating, wherein the glass wafer has an average transmittance (T) of less than 50% over an entire wavelength range of 400 nm to 1000 nm.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of diodes on a first substrate and forming a first pattern array on a second substrate. The method also includes transferring the plurality of diodes from the first substrate to the second substrate. The method further includes forming the first pattern array on a third substrate. In addition, the method includes transferring the plurality of diodes from the second substrate to the third substrate. The method also includes forming a second pattern array on a fourth substrate. The method further includes transferring the plurality of diodes from the third substrate to the fourth substrate. The pitch between the plurality of diodes on the first substrate is different from the pitch of the first pattern array.

Abstract: A first electrode (110) has optical transparency, and a second electrode (130) has light reflectivity. An organic layer (120) is located between the first electrode (110) and the second electrode (130). Light-transmitting regions (a second region (104) and a third region (106)) are located between a plurality of light-emitting units (140). An insulating film (150) defines the light-emitting units (140) and includes tapers (152, 154). A sealing member (170) covers the light-emitting units (140) and the insulating film (150). A low reflection film (190) is located on the side opposite to a substrate (100) with the second electrode (130) therebetween. The low reflection film (190) covers at least one portion of the tapers (152 and 154).

Abstract: A display panel and a fabricating method thereof, and a displaying device. The display panel includes a substrate, a resistance reducing trace, an inter-layer-medium layer and a signal line. The substrate is divided into a plurality of sub-pixel regions and a pixel separating region. The resistance reducing trace is provided on the pixel separating region of the substrate. The inter-layer-medium layer is provided on the substrate, and the inter-layer-medium layer has an opening exposing the resistance reducing trace. The signal line is provided within the opening, the signal line is connected to the resistance reducing trace, the signal line is distributed in a column direction along the display panel, and in a row direction along the display panel, a width of the opening is greater than or equal to a width of the signal line.

Abstract: An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.

Abstract: A liquid crystal display device comprising a TFT substrate having pixels each including a common electrode formed on an organic passivation film, an interlayer insulating film formed so as to cover the common electrode, a pixel electrode having a slit and formed on the interlayer insulating film, a through-hole formed in the organic passivation film and the interlayer insulating film, and a source electrode electrically conducted to the pixel electrode via the through-hole. A taper angle at a depth of D/2 of the through-hole is equal to or more than 50 degrees. The pixel electrode covers part of a side wall of the through-hole but does not cover the remaining part of the side wall of the through-hole. This configuration facilitates the alignment film material to flow into the through-hole, thereby solving a thickness unevenness of the alignment film in vicinity of the through-hole.

Abstract: A display apparatus includes: a substrate including a first area, and a second area adjacent to the first area; a plurality of first pixel circuits at the first area of the substrate, each of the plurality of first pixel circuits including a silicon-based transistor, and an oxide-based transistor; a plurality of second pixel circuits at the second area of the substrate, the plurality of second pixel circuits including transistors; a first shielding layer at the first area, the first shielding layer including a shielding pattern overlapping with the silicon-based transistor of each of the plurality of first pixel circuits; and a second shielding layer at the second area, the second shielding layer including a first through-hole between adjacent second pixel circuits from among the plurality of second pixel circuits. The first shielding layer and the second shielding layer include different materials from each other.

Abstract: Provided are a display panel and a display device. The display panel includes multiple data lines and multiple scanning lines. The multiple data lines intersect with the multiple scanning lines to define multiple pixel units arranged in an array, and the data lines are insulated from the scanning lines; and pixel electrodes of pixel units that are among the multiple pixel units and in at least portion of the array include multiple first branch electrodes arranged in parallel; along a direction of the multiple scanning lines, each of the multiple first branch electrodes includes multiple first branch electrode segments connected sequentially; and an included angle between two adjacently connected first branch electrode segments of the multiple first branch electrode segments is less than 180°.

Abstract: An electronic device is provided. The electronic device includes a first substrate, a multilayer structure, and a passivation layer. The multilayer structure is disposed on the first substrate. The multilayer structure includes a first conductive layer and a second conductive layer disposed on the first conductive layer. The passivation layer is disposed on the second conductive layer. In addition, a thermal expansion coefficient of the second conductive layer is between a thermal expansion coefficient of the first conductive layer and a thermal expansion coefficient of the passivation layer.

Abstract: The optical sensor includes a substrate, a first transistor for functioning as a light-receiving element and a second transistor for writing/reading in a pixel region provided on the substrate. The first transistor is formed by a transistor using polycrystalline silicon, the second transistor is formed by a transistor using an oxide semiconductor. A light-shielding layer is provided on the back side of the oxide semiconductor of the second transistor. Thus, it is possible to irradiate light to the optical sensor fora long time, and in addition to increasing the amount of light received by the first transistor, it is possible to suppress variations in the characteristics of the second transistor.

Abstract: Provided is an imaging element including a photoelectric conversion unit formed by stacking a first electrode, a photoelectric conversion layer and a second electrode. The photoelectric conversion unit further includes a charge storage electrode which is disposed to be spaced apart from the first electrode and disposed opposite to the photoelectric conversion layer via an insulating layer. The photoelectric conversion unit is formed of N number of photoelectric conversion unit segments, and the same applies to the photoelectric conversion layer, the insulating layer and the charge storage electrode. An nth photoelectric conversion unit segment is formed of an nth charge storage electrode segment, an nth insulating layer segment and an nth photoelectric conversion layer segment. As n increases, the nth photoelectric conversion unit segment is located farther from the first electrode. A thickness of the insulating layer segment gradually changes from a first to Nth photoelectric conversion unit segment.

Abstract: A display substrate and a manufacturing method thereof and a display panel are disclosed. The display substrate includes a base substrate, a connection electrode, a conductive sealant, a plurality of via-holes respectively in different layers and a bridge electrode. The connection electrode is on the base substrate; the conductive sealant is at a side, away from the base substrate, of the connection electrode and is electrically connected with the connection electrode via the plurality of via-holes respectively in different layers; the bridge electrode is at least partially in at least one via-hole of the plurality of via-holes, and is electrically connected with the connection electrode and the conductive sealant; in a direction perpendicular to the base substrate, the plurality of via-holes are at least partially not overlapped with each other.

Abstract: Thin film transistor structures may include a regrown source or drain material between a channel material and source or drain contact metallization. The source or drain material may be selectively deposited at low temperatures to backfill recesses formed in the channel material. Electrically active dopant impurities may be introduced in-situ during deposition of the source or drain material. The source or drain material may overlap a portion of a gate electrode undercut by the recesses. With channel material of a first composition and source or drain material of a second composition, thin film transistor structures may display low external resistance and high channel mobility.

Abstract: An electronic detection interface comprises a substrate structure and a plurality of detection units in array. The substrate structure includes a circuit film, which comprises a plurality of circuit units in array. The detection units are disposed on a surface of the substrate structure, and are corresponded to the circuit units in a respect manner. Each of the detection units includes at least one resilient conductive pillar, which is electrically connected to each of the circuit units.

Abstract: A display device includes a plurality of subpixels each including a transmission portion and a light emitting portion on a substrate, wherein the light emitting portion includes a driving transistor and an organic light emitting diode connected to the driving transistor, and an extension line extending from a drain electrode of the driving transistor and a first electrode of the organic light emitting diode are connected to each other in the transmission portion.

Abstract: To provide a semiconductor device including a narrowed bezel obtained by designing a gate driver circuit. A gate driver of a display device includes a shift register unit, a demultiplexer circuit, and n signal lines. By connecting the n signal lines for transmitting clock signals to one stage of the shift register unit, (n?3) output signals can be output. The larger n becomes, the smaller the rate of signal lines for transmitting clock signals which do not contribute to output becomes; accordingly, the area of the shift register unit part is small compared to a conventional structure in which one stage of a shift register unit outputs one output signal. Therefore, the gate driver circuit can have a narrow bezel.

Abstract: A light emitting display device includes a lower substrate, a driving transistor positioned on the lower substrate and including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode, and a light shield layer covering a lower surface, an upper surface, and a side surface of the semiconductor layer, for protecting the driving transistor from external light.

Abstract: A method and resulting structures for a semiconductor device includes forming a source terminal of a semiconductor fin on a substrate. An energy barrier is formed on a surface of the source terminal. A channel is formed on a surface of the energy barrier, and a drain terminal is formed on a surface of the channel. The drain terminal and the channel are recessed on either sides of the channel, and the energy barrier is etched in recesses formed by the recessing. The source terminal is recessed using timed etching to remove a portion of the source terminal in the recesses formed by etching the energy barrier. A first bottom spacer is formed on a surface of the source terminal and a sidewall of the semiconductor fin, and a gate stack is formed on the surface of the first bottom spacer.

Abstract: An electronic device is provided and includes a first voltage trace, a second voltage trace, a first region electrode, a second region electrode, and a voltage source module. The second voltage trace is electrically insulated from the first voltage trace, the first region electrode is electrically connected to the first voltage trace, and the second region electrode is electrically connected to the second voltage trace. The voltage source module provides a first driving voltage to the first voltage trace and provides a second driving voltage to the second voltage trace, in which the first driving voltage is different from the second driving voltage. In a top-view direction of the electronic device, the first voltage trace is separated from the second voltage trace, and the first voltage trace and the second voltage trace are formed of a conductive layer.

Abstract: An array substrate and a display panel are provided. By arranging a drain and a connection hole in a range defined by two branch portions of a source, an area occupied by the drain is reduced, and the defective problems of bright spots or vertical lines displayed on the display panel due to a short circuit of the drain and data lines can be avoided.

Abstract: A manufacturing method of a display device is provided. The manufacturing method of the display device includes forming a switching structure. The switching structure includes a plurality of switching elements. The manufacturing method of the display device also includes forming a light-emitting structure. The light-emitting structure includes a plurality of light-emitting elements. The manufacturing method of the display device further includes arranging the light-emitting structure on the switching structure, so that each of the light-emitting elements is above each of the switching elements. The manufacturing method of the display device includes connecting each of the light-emitting elements to a corresponding switching element via a laser.

Abstract: According to the disclosure, highly integrated memory cells and a semiconductor device having the same are provided. According to an embodiment, a semiconductor device comprises a plurality of memory cells vertically stacked on a base substrate, each of the plurality of memory cells includes, a bit line vertically oriented from the base substrate, a capacitor horizontally spaced apart from the bit line, an active layer horizontally oriented between the bit line and the capacitor, a word line positioned on at least one of a top surface and bottom surface of the active layer and horizontally extending in a direction crossing the active layer, and a capping layer positioned between the word line and the bit line and including, at least, a low-k material and an air gap.

Abstract: A laser processing apparatus and a laser processing method that can effectively prevent a processing time for one semiconductor film from increasing are provided. A laser processing apparatus (1) according to an embodiment includes a laser light source (2) configured to irradiate a semiconductor film (M1) with a laser beam, a film state measuring instrument (5) configured to measure a state of the semiconductor film after the semiconductor film (M1) is irradiated with the laser beam, and a laser light adjusting mechanism configured to adjust a timing at which the semiconductor film (M1) is irradiated with a next laser beam and intensity of the laser beam according to the state of the semiconductor film (M1) measured by the film state measuring instrument (5).

Abstract: A novel, highly convenient or reliable functional panel is provided. A novel, highly convenient or reliable method for manufacturing a functional panel is provided. The functional panel includes a first base; a second base having a region overlapping with the first base; a bonding layer that bonds the first base to the second base; and an insulating layer in contact with the first base, the second base, and the bonding layer. With this structure, an opening which is formed easily in a region where the bonding layer is in contact with the first base or the second base can be filled with the insulating layer, which can prevent impurities from being diffused into the functional layer located in a region surrounded by the first base, the second base, and the bonding layer that bonds the first base to the second base.

Abstract: Each thin film transistor of an active matrix substrate includes an oxide semiconductor layer, a gate electrode disposed closer to the substrate side of the oxide semiconductor layer, a gate insulating layer, a source electrode, and a drain electrode, wherein the oxide semiconductor layer includes a layered structure including a first layer and a second layer disposed on a part of the first layer and extending across the first layer in a channel width direction when viewed in a normal direction of the substrate, the first layer includes an overlapping portion overlapping with the second layer, and a first portion and a second portion each located on a corresponding one of both sides of the second layer, when viewed in a normal direction of the substrate, the second layer covers an upper surface and a side surface of the overlapping portion of the first layer, the source electrode is electrically connected to at least a part of an upper surface of the first portion, and the drain electrode is electrically conn

Abstract: A semiconductor chip includes: an epitaxial film made of gallium nitride; a semiconductor element disposed in the epitaxial film; a chip formation substrate including the epitaxial film and having a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface; and a convex and a concavity on the side surface.

Abstract: In a semi-transmission liquid crystal display device, two resist masks are required to form a reflective electrode and a transparent electrode; therefore, cost is high. A transparent electrode and a reflective electrode which function as a pixel electrode are stacked. A resist pattern which includes a region having a thick film thickness and a region having a thinner film thickness than the aforementioned region is formed over the reflective electrode by using a light exposure mask which includes a semi-transmission portion. The reflective electrode and the transparent electrode are formed by using the resist pattern. Therefore, the reflective electrode and the transparent electrode can be formed by using one resist mask.

Abstract: A display apparatus includes a substrate including a first display area and a second display area. The second display area includes a transmission area, a plurality of first opposite electrodes and a plurality of second opposite electrodes each corresponding to the first display area, and a plurality of third opposite electrodes and a plurality of fourth opposite electrodes each corresponding to the second display area and surrounding at least a portion of the transmission area. A shape of each of the plurality of first opposite electrodes is the same as that of each of the plurality of third opposite electrodes.

Abstract: A transistor whose channel region includes an oxide semiconductor is used as a pull down transistor. The band gap of the oxide semiconductor is 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. Thus, hot carrier degradation in the transistor can be suppressed. Accordingly, the circuit size of the semiconductor device including the pull down transistor can be made small. Further, a gate of a pull up transistor is made to be in a floating state by switching of on/off of the transistor whose channel region includes an oxide semiconductor. Note that when the oxide semiconductor is highly purified, the off-state current of the transistor can be 1 aA/?m (1×10?18 A/?m) or less. Therefore, the drive capability of the semiconductor device can be improved.

Abstract: An electro-optical device includes a substrate having light-transmissivity, a capacitance element having light-transmissivity and including a first electrode, a dielectric layer, and a second electrode, a first insulating film having light-transmissivity, a light-shielding film, a second insulating film having light-transmissivity, and a transistor. The first electrode, the dielectric layer, the second electrode, the first insulating film, the light-shielding film, the second insulating film, and the transistor are layered in this order from the substrate side, and an interfacial reflection at the first insulating film side of the light-shielding film is greater than an interfacial reflection at the dielectric layer side of the first electrode with respect to light entering from the substrate.

Abstract: A display apparatus includes a substrate, a first thin film transistor on the substrate, the first thin film transistor including an active layer including a source region, a drain region, and a channel region between the source region and the drain region, and a display device on the substrate and electrically connected to the first thin film transistor. The source region, the drain region, and the channel region include a first dopant and a second dopant, the second dopant being different from the first dopant. A concentration of the first dopant in the channel region is less than a concentration of the first dopant in the source region and the drain region.

Abstract: The present application discloses a semiconductor device with a graded porous dielectric structure. The semiconductor device includes a substrate; two conductive features positioned apart from each other over the substrate, a graded porous dielectric structure positioned between the two conductive features; and a dielectric layer positioned between one of the two conductive features and the graded porous dielectric structure; wherein the graded porous dielectric structure comprises a first portion having a first porosity and a second portion having a second porosity, and the second porosity is higher than the first porosity.

Abstract: A display device includes a plurality of pixels arranged in a matrix on a substrate along a first direction and a second direction intersecting the first direction. Each of the plurality of pixels includes a transistor, a first transparent electrode located over the transistor and electrically connected to the transistor, a second transparent electrode located over the first transparent electrode and electrically connected to the first transparent electrode via an opening, an insulating layer located over the second transparent electrode, a third transparent electrode located over the insulating layer; and a metal layer in contact with the third transparent electrode. The opening overlaps a gate electrode of the transistor. At least a part of the metal layer is provided in the opening and overlaps the gate electrode. The metal layer extends along the first direction and is commonly provided in the pixels arranged in the first direction.

Abstract: This application discloses a method for manufacturing a thin film transistor, and a display panel. The method for manufacturing a thin film transistor includes steps of providing a substrate; forming an amorphous silicon thin film layer on the substrate; patterning the amorphous silicon thin film layer to form an amorphous silicon layer; forming a metal seed layer made of a nickel disilicide (NiSi2) material on the amorphous silicon layer; converting the amorphous silicon layer into a polysilicon layer under an induction effect of the metal seed layer and through an annealing treatment; and forming a source and drain layer.

Abstract: A display apparatus comprises a first signal line on a substrate, a second signal line intersecting with the first signal line, a first gate electrode, a first source electrode, a first drain electrode, and a second gate electrode disposed on the same layer as that of the first signal line, a first active layer spaced apart from the first gate electrode and partially overlapped with the first gate electrode, a second active layer spaced apart from the second gate electrode and partially overlapped with the second gate electrode, and a first electrode of a display device connected with the second active layer.

Abstract: Systems and methods in which dot-like portions of a material (e.g., a viscous material such as a solder paste) are printed or otherwise transferred onto an intermediate substrate at a first printing unit, the intermediate substrate having the dot-like portions of material printed thereon is transferred to a second printing unit, and the dot-like portions of material are transferred from the intermediate substrate to a final substrate at the second printing unit. Optionally, the first printing unit includes a coating system that creates a uniform layer of the material on a donor substrate, and the material is transferred in the individual dot-like portions from the donor substrate onto the intermediate substrate at the first printing unit. Each of the first and second printing units may employ a variety of printing or other transfer technologies. The system may also include material curing and imaging units to aid in the overall process.

Abstract: The disclosure relates to a display device which includes a substrate having a bent portion and a main portion, a plurality of pixels disposed on the main portion, an electrical circuit disposed on the bent portion, and a conductive layer disposed on the substrate. At least a portion of the electrical circuit overlaps the plurality of pixels along a direction perpendicular to the main portion. The conductive layer is electrically connected to at least one of the plurality of pixels and the electrical circuit, and the conductive layer has at least one opening.

Abstract: A nanowire device of the present description may be produced with the incorporation of at least one hardmask during the fabrication of at least one nanowire transistor in order to assist in protecting an uppermost channel nanowire from damage that may result from fabrication processes, such as those used in a replacement metal gate process and/or the nanowire release process. The use of at least one hardmask may result in a substantially damage free uppermost channel nanowire in a multi-stacked nanowire transistor, which may improve the uniformity of the channel nanowires and the reliability of the overall multi-stacked nanowire transistor.

Abstract: A display device includes: a substrate; a driving voltage line and a data line that are on the substrate; a semiconductor layer that includes a first electrode, a channel, and a second electrode of a driving transistor, the driving transistor being connected to the driving voltage line; a gate electrode of the driving transistor overlapping the channel; a lower storage electrode extending from the gate electrode; and an upper storage electrode overlapping the lower storage electrode, wherein the semiconductor layer further includes a first electrode, a channel, and a second electrode of a switching transistor, the switching electrode being connected between the lower storage electrode and the data line, the upper storage electrode does not overlap the channel of the driving transistor, the lower storage electrode includes a first portion and a second portion that are at opposite sides of the gate electrode.

Abstract: A display apparatus is discussed, which comprises a substrate including a display area and a non-display area, an inorganic layer provided on the substrate, an organic layer provided on the inorganic layer, a light emitting diode provided in the display area of the substrate and including a first electrode, a light emitting layer and a second electrode, and a ground line provided on the organic layer and provided in at least a portion of the non-display area, wherein the ground line and the second electrode are electrically connected with each other, and the ground line includes at least one concave portion and at least one convex portion, which are arranged to adjoin each other.

Abstract: Provided is a thin film transistor including a highly-textured dielectric layer, an active layer, a gate electrode and a source/drain electrode that are stacked on a base substrate. The source/drain electrode includes a source electrode and a drain electrode. The gate electrode and the active layer are insulated from each other. The source electrode and the drain electrode are electrically connected to the active layer. Constituent particles of the active layer are of monocrystalline silicon-like structures. According to the present disclosure, the highly-textured dielectric layer is adopted to replace an original buffer layer to induce the active layer to grow into a monocrystalline silicon-like structure, such that the performance of the thin film transistor is improved.

Abstract: A display device includes a display area configured to include a plurality of pixels and a plurality of data lines connected to the pixels. A hole area is disposed within the display area. A hole crack detection line is disposed adjacent to the hole area and surrounds the hole area. The device includes first and second detection lines which include first and second detection transfer lines and first and second detection receiving lines, respectively. A test controller electrically connects the first detection receiving line to a first data line and the second detection receiving line to a second data line. Pixels connected to the first data line that is connected to a first bright-line transistor and pixels connected to the second data line that is connected to a second bright-line transistor are configured to emit light when a crack occurs in the hole crack detection line.

Abstract: A design for an organic light-emitting display device that increases capacitor capacity and increases aperture ratio by forming an initializing voltage electrode on a different layer than an electrode of the capacitor and forming only one via hole for an entire set of three sub-pixels. One of the source electrodes and the drain electrodes of switching transistors for the three sub-pixels are formed in common, along with the gate electrodes of the switching transistors.