Abstract: A liquid crystal display is formed by arraying a plurality of pixels 10, and the pixel 10 includes a first substrate 20, a second substrate 50, a first electrode 120 formed on the first substrate 20, a second electrode 52 formed on the second substrate 50, and a liquid crystal layer 60. A pretilt angle is provided to a liquid crystal molecule 61, and the first electrode 120 is formed of a transparent conductive material layer and a foundation layer 150 including a plurality of projecting portions 130 and recessed portions 140. A first transparent conductive material layer 135 connected to a first power feeding unit is formed on a projecting portion top surface 151 of the foundation layer 150, and a second transparent conductive material layer 145 connected to a second power feeding unit is formed on a recessed portion bottom surface 152 of the foundation layer 150.

Abstract: A transparent display device is disclosed, which may improve transmittance in a non-display area and at the same reduce resistance of power lines. The transparent display device includes a substrate provided with a display area, in which a plurality of subpixels are disposed, and a non-display area adjacent to the display area. The device includes a plurality of power lines provided in the non-display area over the substrate and extended in parallel in a first direction. The display area includes first non-transmissive areas provided with the plurality of subpixels and a first transmissive area provided between the first non-transmissive areas, the non-display area includes second non-transmissive areas provided with the plurality of power lines and a second transmissive area provided between the second non-transmissive areas.

Abstract: A single light emitting diode (LED) structure includes an array of spaced discrete light emitting zones separated by isolation areas. Each emitting zone includes an epitaxial structure configured to emit an emitting light having a particular wavelength over an effective emission area. In addition, the effective emission area for each emitting zone can be geometrically defined and electrically configured to provide a desired light intensity. For example, each effective emission area can have a selected size and spacing depending on the application and light intensity requirements. Each emitting zone also includes a wavelength conversion member on its effective emission area configured to convert an emitting wavelength of the emitting light to a different color. The single (LED) structure can include multiple colors at different zones to produce a desired spectra or design.

Abstract: A display apparatus includes a substrate; a light-emitting diode on the substrate; a pixel separating layer surrounding the light-emitting diode; and a light dispersion layer on the light-emitting diode and the pixel separating layer.

Abstract: A liquid crystal display is formed by arraying a plurality of pixels 10, and the pixel 10 includes a first substrate 20, a second substrate 50, a first electrode 120 formed on the first substrate 20, a second electrode 52 formed on the second substrate 50, and a liquid crystal layer 60. A pretilt angle is provided to a liquid crystal molecule 61, and the first electrode 120 is formed of a transparent conductive material layer and a foundation layer 150 including a plurality of projecting portions 130 and recessed portions 140. A first transparent conductive material layer 135 connected to a first power feeding unit is formed on a projecting portion top surface 151 of the foundation layer 150, and a second transparent conductive material layer 145 connected to a second power feeding unit is formed on a recessed portion bottom surface 152 of the foundation layer 150.

Abstract: A method for forming a common electrode is provided, including: a) providing a support substrate on which rest optoelectronic devices separated by trenches; b) forming a dielectric layer on front faces, flanks, and a bottom of the trenches, of a thickness E1 and a thickness E2, which is less than the thickness E1, at, respectively, the front faces and the flanks; c) etching a thickness E3 of the dielectric layer, so as to uncover the flanks at a first section of the trenches; d) forming a metal layer filling the trenches and covering the front faces; and e) performing a mechanochemical polishing of the metal layer, the polishing stopping on a portion of the dielectric layer, the metal layer remaining in the trenches forming the common electrode.

Abstract: A flexible organic EL display device includes a plurality of short ring wiring lines. Each of the plurality of short ring wiring lines contacts a flattening film that is a resin layer on an end face of a terminal portion region in the flexible organic EL display device.

Abstract: A chip may include a first substantially planar isolation layer with a first surface and a second surface opposite the first surface. The chip may include a first substantially planar conduction layer with a first surface positioned adjacent to the second surface of the first isolation layer and a second surface opposite the first surface. The chip may include a second substantially planar isolation layer with a first surface positioned adjacent to the second surface of the first conduction layer and a second surface opposite the first surface. The chip may include a second conduction layer etched on the second surface of the second isolation layer. The second conduction layer may include an anode trace, a cathode trace, and an optical transmitter positioned on the cathode trace. The chip may include one or more vias through the second isolation layer electrically coupling the anode trace with the first conduction layer.

Abstract: A communication module may include a communication ground layer. The communication module may also include a circuit board. The circuit board may be located proximate the communication ground layer. The circuit board may include a stitch layer. The stitch layer may be electrically coupled to the communication ground layer via a plurality of stitch layer vias. Additionally, the communication module may include multiple ground vias. The ground vias may be electrically coupled to a portion of the circuit board and to the communication ground layer.

Abstract: An image forming device comprises: an exposer having a plurality of light emitting devices, a light emitting device among the plurality of light emitting devices to transmit light toward a photosensitive drum; and a developer to develop an electrostatic latent image formed on a surface of the photosensitive drum by the light, wherein the light emitting device among the plurality of light emitting devices includes: a light emitting layer to generate the light; and a reflective layer to reflect at least a portion of the generated light. The reflective layer can include a plurality of sub-reflective layers, in which a thickness of a sub-reflective layer among the plurality of sub-reflective layers is different from a thickness of another sub-reflective layer among the plurality of sub-reflective layers, and/or a refractive index of a sub-reflective layer among the plurality of sub-reflective layers is different from a refractive index of another sub-reflective layer among the plurality of sub-reflective layers.

Abstract: Optical devices and systems are depicted and described herein. One example of the optical system is disclosed to include a semiconductor layer, a first metal strip positioned adjacent to a first surface of the semiconductor layer, a second metal strip positioned adjacent to a second surface of the semiconductor layer that opposes the first surface of the semiconductor layer, and a third metal strip positioned adjacent to the second surface of the semiconductor layer. In one example, the first metal strip includes a first aperture positioned adjacent to a first active region in the semiconductor layer and second aperture positioned adjacent to a second active region in the semiconductor layer. The second metal strip overlaps the first metal strip in proximity with the first active region and not the second active region and the third metal strip is oriented substantially parallel with the second metal strip.

Abstract: Provided are a substrate having concave-convex patterns, a light-emitting diode (LED) including the substrate, and a method of fabricating the LED. The LED includes a substrate, and concave-convex patterns disposed in an upper surface of the substrate and having convexes and concaves defined by the convexes. Unit light-emitting device having a first conductive semiconduct or layer, an active layer, and a second conductive semiconductor layer disposed on the substrate in sequence is present.

Abstract: A voltage equal to the threshold value of a TFT (106) is held in capacitor unit (109). When a video signal is inputted from a source signal line, the voltage held in the capacitor unit is added thereto and a resultant signal is applied to a gate electrode of the TFT (106). Even when a threshold value is varied for each pixel, each threshold value is held in the capacitor unit (109) for each pixel. Thus, the influence of a variation in threshold value can be eliminated. Further, holding of the threshold value is conducted by only the capacitor unit (109) and a charge does not move at writing of a video signal so that a voltage between both electrodes is not changed. Thus, it is not influenced by a variation in capacitance value.

Abstract: Light emitting devices and methods of integrating micro LED devices into light emitting device are described. In an embodiment a light emitting device includes a reflective bank structure within a bank layer, and a conductive line atop the bank layer and elevated above the reflective bank structure. A micro LED device is within the reflective bank structure and a passivation layer is over the bank layer and laterally around the micro LED device within the reflective bank structure. A portion of the micro LED device and a conductive line atop the bank layer protrude above a top surface of the passivation layer.

Abstract: A method is provided for fabricating thin-film transistors (TFTs) for an LCD having an array of pixels. The method includes depositing a first photoresist layer over a portion of a TFT stack that includes a conductive gate layer, and a semiconductor layer. The method also includes doping the exposed semiconductor layer with a first doping dose. The method further includes etching a portion of the conductive gate layer to expose a portion of the semiconductor layer, and doping the exposed portion of the semiconductor layer with a second doping dose. The method also includes depositing a second photoresist layer over a first portion of the doped semiconductor layer in an active area of the pixels to expose a second portion of the doped semiconductor layer in an area surrounding the active area, and doping the second portion of the doped semiconductor layer with a third doping dose.

Abstract: An OLED display includes a first polysilicon layer pattern on a substrate having a first gate electrode, a second gate electrode, and a first capacitor electrode, a gate insulating layer pattern, a second polysilicon layer pattern including a first active layer, a second active layer, and a capacitor polycrystalline dummy layer, a third amorphous silicon layer pattern including first source and drain resistant contact layers on a predetermined region of the first active layer, second source and drain resistant contact layers on a predetermined region of the second active layer, and a capacitor amorphous dummy layer on the capacitor polycrystalline dummy layer, and a data metal layer pattern including first source/drain electrodes, second source/drain electrodes, and a second capacitor electrode.

Abstract: A thin film transistor (TFT), a method for fabricating a TFT, an array substrate for a display device having a TFT, and a method for fabricating the same are provided. An oxide thin film transistor (TFT) includes: a gate electrode formed on a substrate; a gate insulating layer formed on the gate electrode; an active layer formed on the gate insulating layer above the gate electrode; an etch stop layer pattern formed on the active layer; a source alignment element and a drain alignment element formed on the etch stop layer pattern and spaced apart from one another; and a source electrode in contact with the source alignment element and the active layer and a drain electrode in contact with the drain alignment element and the active layer.

Abstract: An organic light-emitting display apparatus having improved durability and image quality may include a substrate; a first electrode formed on the substrate; a first pixel definition layer formed to cover at least one lateral surface of the first electrode; a second pixel definition layer formed so as to be spaced apart from at least an upper surface of the first pixel definition layer; an intermediate layer formed on the first electrode and including an organic light-emitting layer; and a second electrode formed on the intermediate layer.

Abstract: According to one embodiment, a display device includes a first substrate, a second substrate, a display layer, a seal unit, a protrusion and a spacing adjustment layer. The display layer is provided between the first substrate and the second substrate. The seal unit surrounds the display layer between the first substrate and the second substrate. The protrusion is provided along an outer edge of the seal unit at an outside of the seal unit on a first major surface of the first substrate facing the display layer. The spacing adjustment layer is provided along the outer edge at the outside of the seal unit, includes a portion overlaying the protrusion as viewed along a direction from the first substrate toward the second substrate, and is in contact with the protrusion.

Abstract: A voltage equal to the threshold value of a TFT (106) is held in capacitor unit (109). When a video signal is inputted from a source signal line, the voltage held in the capacitor unit is added thereto and a resultant signal is applied to a gate electrode of the TFT (106). Even when a threshold value is varied for each pixel, each threshold value is held in the capacitor unit (109) for each pixel. Thus, the influence of a variation in threshold value can be eliminated. Further, holding of the threshold value is conducted by only the capacitor unit (109) and a charge does not move at writing of a video signal so that a voltage between both electrodes is not changed. Thus, it is not influenced by a variation in capacitance value.

Abstract: An organic light emitting diode display is disclosed. The organic light emitting diode display includes a base substrate including a display area and a non-display area around the display area, a plurality of pixels formed over the display area of the base substrate, the plurality of pixels including a common electrode, a common power line formed over the base substrate and electrically connected to a circuit of each of the plurality of pixels, an encapsulation substrate bonded to the base substrate by a sealing member surrounding the plurality of pixels, the encapsulation substrate including an inner surface facing the base substrate, a first conductive layer formed over the inner surface and electrically connecting the common power line to a first potential, and a second conductive layer formed over the inner surface and spaced apart from the first conductive layer, the second conductive layer electrically connecting the common electrode to a second potential.

Abstract: A display substrate includes a substrate, a pixel part, a pad part and a sacrificial electrode. The substrate includes a display area and a peripheral area. The pixel part is on the display area and includes a switching element, and a pixel electrode electrically connected to the switching element. The pad part is on the peripheral area and contacts a terminal of an external device. The pad part includes a pad electrode a contact electrode. The pad electrode includes a first metal layer, and a second metal layer on the first metal layer, and the contact electrode contacts the second metal layer. The sacrificial electrode is spaced apart from the pad electrode and contacts the contact electrode. An exposed portion of the sacrificial electrode is exposed to an external side of the display substrate.

Abstract: A three-terminal light emitting device (LED) chip, associated fabrication method, and LED array are provided. The method forms an n-doped semiconductor layer overlying a substrate, an active semiconductor layer overlying the n-doped semiconductor layer, and a p-doped semiconductor layer overlying the active semiconductor layer. A trench is formed through the p-doped and active semiconductor layers, exposing the n-doped semiconductor layer. In one aspect, the trench is formed at least part way, but not completely, through the n-doped semiconductor layer. Then, an LED P electrode is formed overlying a first region of the p-doped semiconductor layer, a diode P electrode is formed overlying a second region of the p-doped semiconductor layer that is separated from the first region of the p-doped semiconductor layer by the trench, and an N electrode is formed overlying a top surface of the exposed n-doped semiconductor layer in the trench, shared by the LED and diode.

Abstract: An array substrate disclosed herein includes: scanning signal lines (16i and 16j); data signal lines (15x, 15y, 15X, and 15Y) to each of which a data signal is supplied; a first pixel region column; and a second pixel region column adjacent to the first pixel region column, each of the first and second pixel region columns including pixel regions, wherein: two data signal lines corresponding to the first pixel region column are provided, two data signal lines corresponding to the second pixel region column are provided, a gap between two adjacent data signal lines (15y and 15X) is provided, one of the two adjacent data signal lines being corresponding to the first pixel region column, and the other of the two adjacent data signal lines being corresponding to the second pixel region column; and a gap line 41 is provided within the gap, a Vcom signal being supplied to the gap line 41.

Abstract: A pixel electrode is provided, with a nanostructure-film deposited over an active matrix substrate, such that the pixel electrode makes electrical contact with an underlying layer. Similarly, auxiliary data pads and auxiliary gate pads are provided, which also have nanostructure-films deposited over an active matrix substrate, such that they make electrical contact with underlying layers.

Abstract: An organic electroluminescent display device including a plurality of scan lines and a plurality of data lines crossing the scan lines, a plurality of pixels at regions defined by the scan lines and the data lines, and one or more thin-film transistors (TFTs) for selectively applying voltages to each of the pixels, wherein the data lines are successively located at a side of the pixels, and a first TFT of the TFTs is located at least partially between an area corresponding to an nth data line of the data lines and an area corresponding to an (n?1)th data line of the data lines, the nth data line and the (n?1)th data line being successively positioned.

Abstract: A panel is disclosed, in which, a patterned semiconductor layer is formed on an insulation layer. The patterned semiconductor layer includes a portion corresponding to an electrode and another portion corresponding to a wiring trace. The portion corresponding to the electrode may be formed as, for example, a channel, and the other portion corresponding to the wiring trace may protect the wiring trace during fabrication process or in the structure from scratching or corrosion.

Abstract: A flexible display apparatus is disclosed. The flexible display apparatus includes: a substrate on which a display unit for displaying an image, a non-display area formed outside the display unit, and at least one pad for inputting an electrical signal to the display unit are located; and a circuit board including circuit terminals to be electrically connected to the at least one pad. A stiffener including a plurality of reinforcement lines that are patterned to reduce or prevent thermal deformation of the substrate is formed on the substrate.

Abstract: A display panel includes a substrate, a plurality of bottom electrodes, an isolation layer, a plurality of light emitting layers, a top electrode, and at least one first auxiliary electrode. The bottom electrodes and the isolation layer are disposed on the substrate. The isolation layer has a plurality of pixel region openings and at least one buffer region. Each of the pixel region openings respectively exposes the corresponding bottom electrode. The buffer region is disposed between two adjacent pixel region openings. The light emitting layers are respectively disposed on the corresponding bottom electrodes. The top electrode covers the light emitting layers, the isolation layer, and the buffer region. The first auxiliary electrode is disposed in the buffer region.

Abstract: A mask assembly includes a frame forming an opening, and a plurality of unit masks which form a plurality of deposition openings, the longitudinal ends of the unit masks being fixed to the frame. At least two adjacent ones of the plurality of unit masks have deposition recesses formed on both sides facing each other. The width of the deposition recesses along a width direction of the unit masks is equal to or greater than the width of the deposition openings along the width direction of the unit masks.

Abstract: An object is to improve field effect mobility of a thin film transistor using an oxide semiconductor. Another object is to suppress increase in off current even in a thin film transistor with improved field effect mobility. In a thin film transistor using an oxide semiconductor layer, by forming a semiconductor layer having higher electrical conductivity and a smaller thickness than the oxide semiconductor layer between the oxide semiconductor layer and a gate insulating layer, field effect mobility of the thin film transistor can be improved, and increase in off current can be suppressed.

Abstract: A light emitting device is disclosed. The light emitting device includes a first conductive type semiconductor layer, an active layer disposed on the first conductive type semiconductor layer, a tunnel junction layer comprising a second conductive type nitride semiconductor layer and a first conductive type nitride semiconductor layer disposed on the active layer, wherein the first conductive type nitride semiconductor layer and the second conductive type nitride semiconductor layer are PN junctioned, a first electrode disposed on the first conductive type semiconductor layer, and a second electrode disposed on the first conductive type nitride semiconductor layer, wherein a portion of the second electrode is in schottky contact with the second conductive type nitride semiconductor layer through the first conductive type nitride semiconductor layer.

Abstract: The present invention aims to provide a semiconductor light emitting device that may be firmly attached to a substrate with maintaining excellent light emitting efficiency, and a manufacturing method of the same, and a lighting apparatus and a display apparatus using the same. In order to achieve the above object, the semiconductor light emitting device according to the present invention includes a luminous layer, a light transmission layer disposed over a main surface of the luminous layer, and having depressions on a surface facing away from the luminous layer, and a transmission membrane disposed on the light transmission layer so as to follow contours of the depressions, and light from the luminous layer is irradiated so as to pass through the light transmission layer and the transmission membrane.

Abstract: A display panel includes: gate lines disposed on a first substrate; signal lines extending across the gate lines and including portions, other than portions thereof that extend across the gate lines, disposed on the same surface as the gate lines, the portions that extend across the gate lines being disposed in positions facing the gate lines with an insulating film interposed therebetween; transistors having gate electrodes connected to the gate lines, source electrodes connected to the signal lines and disposed on the insulating film, and drain electrodes disposed on the insulating film; pixel electrodes connected to the drain electrode and disposed on the insulating film; a protective film covering the transistors and the pixel electrodes; and a common electrode disposed on the protective film.

Abstract: An organic light emitting diode (OLED) display includes: a substrate including a first area and a second area; a first electrode at the first area of the substrate, and a first electrode at the second area of the substrate; a reflective electrode on the first electrode at the first area; a barrier rib on the substrate, the barrier rib having openings exposing the reflective electrode and the first electrode at the second area; an organic emission layer on the reflective electrode and the first electrode at the second area; a second electrode on the organic emission layer; and a reflective layer on the second electrode at the second area.

Abstract: A light emitting diode package includes an electrically insulated base, first and second electrodes, an LED chip, a voltage stabilizing module, and an encapsulative layer. The base has a first surface and an opposite second surface. The first and second electrodes are formed on the first surface of the base. The LED chip is electrically connected to the first and second electrodes. The voltage stabilizing module is formed on the first surface of the base, positioned between and electrically connected to the first and second electrodes. The voltage stabilizing module connects to the LED chip in reverse parallel and has a polarity arranged opposite to that of the LED chip. The voltage stabilizing module has an annular shape and encircles the first electrode. The encapsulative layer is formed on the base and covers the LED chip.

Abstract: An integrated circuit device. The integrated circuit device includes a semiconductor substrate having a surface region. A gate dielectric layer overlies the surface region of the substrate. The device includes a MOS device having a p+ active region. The p+ active region forms a first electrode for a resistive switching device. The resistive switching device includes an amorphous silicon switching material overlying the p+ active region and a metal electrode overlies the first metal conductor structure. The metal electrode includes a metal material, upon application of a positive bias to the metal electrode, forms a metal region in the amorphous silicon switching material. The MOS device provides for a select transistor for the integrated circuit device.

Abstract: Adverse effects of variation in threshold voltage are reduced. In a semiconductor device, electric charge is accumulated in a capacitor provided between a gate and a source of a transistor, and then, the electric charge accumulated in the capacitor is discharged; thus, the threshold voltage of the transistor is obtained. After that, current flows to a load. In the semiconductor device, the potential of one terminal of the capacitor is set higher than the potential of a source line, and the potential of the source line is set lower than the potential of a power supply line and the cathode side potential of the load.

Abstract: This disclosure discloses a light-emitting device. The light-emitting device comprises: a substrate; and a first light-emitting unit comprising a plurality of light-emitting diodes electrically connected to each other on the substrate. A first light-emitting diode in the first light-emitting unit comprises a first semiconductor layer with a first conductivity-type, a second semiconductor layer with a second conductivity-type, and a light-emitting stack formed between the first and second semiconductor layers. The first light-emitting diode in the first light-emitting unit further comprises a first connecting layer on the first semiconductor layer for electrically connecting to a second light-emitting diode in the first light-emitting unit; a second connecting layer, separated from the first connecting layer, formed on the first semiconductor layer; and a third connecting layer on the second semiconductor layer for electrically connecting to a third light-emitting diode in the first light-emitting unit.

Abstract: A high-voltage alternating current (AC) light-emitting diode (LED) structure is provided. The high-voltage AC LED structure includes a circuit substrate and a plurality of high-voltage LED (HV LED) chips. Each one of the HV LED chips includes a first substrate, an adhering layer, first ohmic contact layers, epi-layers, a first insulating layer, at least two first electrically conducting plates, at least two second electrically conducting plates, and a second substrate. The HV LED chips manufactured by a wafer-level process are coupled to the low-cost circuit substrate to produce the downsized high-voltage AC LED structure.

Abstract: An array substrate for a fringe field switching mode LCD device includes a pixel electrode having a plate shape in a pixel region; and a common electrode including a plurality of bar-type openings that correspond to the pixel electrode and long axes of which are inclined at a first angle in a clockwise direction or counterclockwise direction with respect to a normal line perpendicular to the gate line, wherein a data line is formed in a zigzag shape, wherein two adjacent data lines among three adjacent data lines are disposed in parallel with each other and the other data line is linearly symmetrical with respect to the two adjacent data lines, and wherein the long axis of each of the plurality of bar-type openings is disposed in parallel with one of data lines that define the pixel region and are located at both sides of the pixel region.

Abstract: An optoelectonice device package, an array of optoelectronic device packages and a method of fabricating an optoelectronic device package. The array includes a plurality of optoelectronic device packages, each enclosing an optoelectronic device, and positioned in at least one row. Each package including two geometrically parallel transparent edge portions and two geometrically parallel non-transparent edge portions, oriented substantially orthogonal to the transparent edge portions. The transparent edge portions are configured to overlap at least one adjacent package, and may be hermetically sealed. The optoelectronic device portion fabricated using R2R manufacturing techniques.

Abstract: A method is provided for fabricating thin-film transistors (TFTs) for an LCD having an array of pixels. The method includes depositing a first photoresist layer over a portion of a TFT stack that includes a conductive gate layer, and a semiconductor layer. The method also includes doping the exposed semiconductor layer with a first doping dose. The method further includes etching a portion of the conductive gate layer to expose a portion of the semiconductor layer, and doping the exposed portion of the semiconductor layer with a second doping dose. The method also includes depositing a second photoresist layer over a first portion of the doped semiconductor layer in an active area of the pixels to expose a second portion of the doped semiconductor layer in an area surrounding the active area, and doping the second portion of the doped semiconductor layer with a third doping dose.

Abstract: A pixel array substrate includes: a first through fourth transistors (Ta through Td); a light-emitting element (OEL); a scanning line connected with a control terminal of the fourth transistor; a data line connected with one conducting terminal of the fourth transistor; a first control line (AZi) connected with one conducting terminal of the third transistor; a second control line (Ei) connected with a control terminal of the first transistor; and a first power source line (Ypj) connected with one conducting terminal of the first transistor. One conducting terminal of the second transistor is connected with the first power source line via the first transistor. A control terminal of the second transistor is connected with the data line via the fourth transistor and with a terminal of the light-emitting element via a capacitor (C).

Abstract: A combined semiconductor apparatus includes a semiconductor substrate having an integrated circuit, a planarized region formed in a surface of the semiconductor substrate, and a semiconductor thin film including at least one semiconductor device and bonded on the planarized region. A surface of the semiconductor thin film, in which the semiconductor device is formed, is disposed on a side of the planarized region. The apparatus may further include a planarized film disposed between the planarized region and the semiconductor thin film.

Abstract: A voltage equal to the threshold value of a TFT (106) is held in capacitor unit (109). When a video signal is inputted from a source signal line, the voltage held in the capacitor unit is added thereto and a resultant signal is applied to a gate electrode of the TFT (106). Even when a threshold value is varied for each pixel, each threshold value is held in the capacitor unit (109) for each pixel. Thus, the influence of a variation in threshold value can be eliminated. Further, holding of the threshold value is conducted by only the capacitor unit (109) and a charge does not move at writing of a video signal so that a voltage between both electrodes is not changed. Thus, it is not influenced by a variation in capacitance value.

Abstract: An array substrate for a liquid crystal display device includes: a gate line and a gate electrode on a substrate, the gate electrode connected to the gate line; a gate insulating layer on the gate line and the gate electrode, the gate insulating layer including an organic insulating material such that a radical of carbon chain has a composition ratio of about 8% to about 11% by weight; a semiconductor layer on the gate insulating layer over the gate electrode; a data line crossing the gate line to define a pixel region; source and drain electrodes on the semiconductor layer, the source electrode connected to the data line and the drain electrode spaced apart from the source electrode; a passivation layer on the data line, the source electrode and the drain electrode, the passivation layer having a drain contact hole exposing the drain electrode; and a pixel electrode on the passivation layer, the pixel electrode connected to the drain electrode through the drain contact hole.

Abstract: Provided is a light emitting device according to one embodiment including: a substrate which has protrusions on the C-face, and of which unit cells are constructed in a hexagonal structure; a semiconductor layer which is formed on the substrate, in which empty spaces are formed in sides of the protrusions, and of which unit cells are constructed in a hexagonal structure; and a light emitting structure layer comprising a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer formed between the first conductive semiconductor layer and second conductive semiconductor layer which are formed on the semiconductor layer, wherein the A-face of the substrate and the A-face of the semiconductor layer form an angle of greater than zero degree, and the protrusions include the R-faces.

Abstract: A display apparatus includes an active device array substrate, an opposite substrate disposed opposite to the active device array substrate, and a display medium disposed between the active device array substrate and the opposite substrate. The opposite substrate includes a first base and a light-shielding structure disposed on the first base and located between the first base and the active device array substrate. The light-shielding structure has a first dielectric layer, a second dielectric layer, a third dielectric layer, a metal layer, a fourth dielectric layer, a fifth dielectric layer, and a sixth dielectric layer stacked sequentially in a direction from the first base to the active device array substrate. The first, second, and third dielectric layers have different thicknesses. The fourth, fifth, and sixth dielectric layers have different thicknesses.

Abstract: Pixel control structure for use in a backplane for an electronic display, including a transistor that has a gate, a source, a drain, and an organic semiconductor element. The pixel control structure is formed by a first patterned conductive layer portion, a second patterned conductive layer portion, a dielectric layer portion, and an organic patterned semiconductive layer portion. The dielectric layer portion comprises an overlap region defined by overlap of the second conductive layer portion over the first conductive layer portion. The overlap region defines an overlap boundary, defined by an edge portion of the first patterned conductive layer portion and an edge portion of the second patterned conductive layer portion. The patterned semiconductive layer portion extends over the overlap region and away from the overlap region so as to extend from both first and second edge portions.