Doping Structures (e.g., Doping Superlattices, Nipi-superlattices) (epo) Patents (Class 257/E29.073)
  • Patent number: 8772763
    Abstract: The present invention provides a photovoltaic cell having a large short-circuit current density and a large photoelectric conversion efficiency.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: July 8, 2014
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Ken Yoshimura, Katsuhiro Suenobu
  • Patent number: 8421058
    Abstract: A light emitting diode structure and a method of forming a light emitting diode structure are provided. The structure includes a superlattice comprising, a first barrier layer; a first quantum well layer comprising a first metal-nitride based material formed on the first barrier layer; a second barrier layer formed on the first quantum well layer; and a second quantum well layer including the first metal-nitride based material formed on the second barrier layer; and wherein a difference between conduction band energy of the first quantum well layer and conduction band energy of the second quantum well layer is matched to a single or multiple longitudinal optical phonon energy for reducing electron kinetic energy in the superlattice.
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: April 16, 2013
    Assignee: Agency for Science, Technology and Research
    Inventors: Wei Liu, Chew Beng Soh, Soo Jin Chua, Jing Hua Teng
  • Publication number: 20120298964
    Abstract: A semiconductor chip includes a semiconductor body with a semiconductor layer sequence. An active region intended for generating radiation is arranged between an n-conductive multilayer structure and a p-conductive semiconductor layer. A doping profile is formed in the n-conductive multilayer structure which includes at least one doping peak.
    Type: Application
    Filed: December 27, 2010
    Publication date: November 29, 2012
    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Matthias Peter, Tobias Meyer, Alexander Walter, Tetsuya Taki, Juergen Off, Rainer Butendeich, Joachim Hertkorn
  • Patent number: 8247793
    Abstract: Provided are a ZnO-based thin film and a ZnO-based semiconductor device which allow: reduction in a burden on a manufacturing apparatus; improvement of controllability and reproducibility of doping; and obtaining p-type conduction without changing a crystalline structure. In order to be formed into a p-type ZnO-based thin film, a ZnO-based thin film is formed by employing as a basic structure a superlattice structure of a MgZnO/ZnO super lattice layer 3. This superlattice component is formed with a laminated structure which includes acceptor-doped MgZnO layers 3b and acceptor-doped ZnO layers 3a. Hence, it is possible to improve controllability and reproducibility of the doping, and to prevent a change in a crystalline structure due to a doping material.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: August 21, 2012
    Assignee: Rohm Co., Ltd.
    Inventors: Ken Nakahara, Shunsuke Akasaka, Masashi Kawasaki, Akira Ohtomo, Atsushi Tsukazaki
  • Publication number: 20120043528
    Abstract: A homo-material heterophased quantum well includes a first structural layer, a second structural layer and a third structural layer. The second structural layer is sandwiched between the first and third structural layers. The first structural layer, second structural layer and third structural layer are formed by growing atoms of a single material in a single growth direction. The energy gap of the second structural layer is smaller than that of the first and third structural layers.
    Type: Application
    Filed: January 19, 2011
    Publication date: February 23, 2012
    Inventors: I-Kai Lo, Yu-Chi Hsu, Chia-Ho Hsieh, Wen-Yuan Pang, Ming-Chi Chou
  • Patent number: 8106378
    Abstract: A p-type semiconductor barrier layer is provided in the vicinity of undoped quantum dots, and holes in the p-type semiconductor barrier layer are injected in advance in the ground level of the valence band of the quantum dots. Lowering the threshold electron density of conduction electrons in the ground level of the conduction band of quantum dots in this way accelerates the relaxation process of electrons from an excited level to the ground level in the conduction band.
    Type: Grant
    Filed: December 18, 2006
    Date of Patent: January 31, 2012
    Assignee: NEC Corporation
    Inventor: Hideaki Saito
  • Publication number: 20120007053
    Abstract: Disclosed herein is a nitride-based semiconductor device. The nitride-based semiconductor device includes a base substrate having a PN junction structure, an epi-growth layer disposed on the base substrate, and an electrode unit disposed on the epi-growth layer.
    Type: Application
    Filed: November 2, 2010
    Publication date: January 12, 2012
    Inventors: Woo Chul JEON, Ki Yeol Park, Jung Hee Lee, Young Hwan Park
  • Publication number: 20110272672
    Abstract: An embodiment of the present invention improves the fabrication and operational characteristics of a type-II superlattice material. Layers of indium arsenide and gallium antimonide comprise the bulk of the superlattice structure. One or more layers of indium antimonide are added to unit cells of the superlattice to provide a further degree of freedom in the design for adjusting the effective bandgap energy of the superlattice. One or more layers of gallium arsenide are added to unit cells of the superlattice to counterbalance the crystal lattice strain forces introduced by the aforementioned indium antimonide layers.
    Type: Application
    Filed: May 6, 2011
    Publication date: November 10, 2011
    Applicant: SVT ASSOCIATES, INC.
    Inventors: Yiqiao Chen, Peter Chow
  • Publication number: 20110215299
    Abstract: A semiconductor device may include a substrate and at least one MOSFET adjacent the substrate. The MOSFET may include a superlattice channel including a plurality of stacked groups of layers, a source and a drain adjacent the superlattice channel, and a gate adjacent the superlattice channel. Each group of layers of the superlattice channel may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. A first dopant may be in at least one region adjacent at least one of the source and drain, and a second dopant may also be in the at least one region. The second dopant may be different than the first dopant and reduce diffusion thereof.
    Type: Application
    Filed: March 8, 2011
    Publication date: September 8, 2011
    Applicant: MEARS Technologies, Inc.
    Inventor: KALIPATNAM RAO
  • Patent number: 7977666
    Abstract: The present invention is disclosed that a device capable of normal incident detection of infrared light to efficiently convert infrared light into electric signals. The device includes a substrate, a first contact layer formed on the substrate, an active layer formed on the first contact layer, a barrier layer formed on the active layer and a second contact layer formed on the barrier layer, wherein the active layer includes multiple quantum dot layers.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: July 12, 2011
    Assignee: Academia Sinica
    Inventors: Shiang-Yu Wang, Hong-Shi Ling, Ming-Cheng Lo, Chien-Ping Lee
  • Patent number: 7834345
    Abstract: A semiconductor device includes a channel region; a gate dielectric over the channel region; a gate electrode over the gate dielectric; and a first source/drain region adjacent the gate dielectric. The first source/drain region is of a first conductivity type. At least one of the channel region and the first source/drain region includes a superlattice structure. The semiconductor device further includes a second source/drain region on an opposite side of the channel region than the first source/drain region. The second source/drain region is of a second conductivity type opposite the first conductivity type. At most, one of the first source/drain region and the second source/drain region comprises an additional superlattice structure.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: November 16, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Krishna Kumar Bhuwalka, Ching-Ya Wang, Ken-Ichi Goto, Wen-Chin Lee, Carlos H. Diaz
  • Publication number: 20100117059
    Abstract: Optical modulators include active quantum well structures coherent with pseudosubstrates comprising relaxed buffer layers on a silicon substrate. In a preferred method the active structures, consisting of Si1?x Gex barrier and well layers with different Ge contents x, are chosen in order to be strain compensated. The Ge content in the active structures may vary in a step-wise fashion along the growth direction or in the form of parabolas within the quantum well regions. Optical modulation may be achieved by a plurality of physical effects, such as the Quantum Confined or Optical Stark Effect, the Franz-Keldysh Effect, exciton quenching by hole injection, phase space filling, or temperature modulation. In a preferred method the modulator structures are grown epitaxially by low-energy plasma-enhanced chemical vapor deposition (LEPCVD).
    Type: Application
    Filed: August 7, 2007
    Publication date: May 13, 2010
    Applicants: PAUL SCHERRER INSTITUT, POLITECNICO DI MILANO
    Inventors: Daniel Chrastina, Hans-Christen Sigg, Soichiro Tsujino, Hans Von Känel
  • Patent number: 7700936
    Abstract: In one embodiment, a method of producing an optoelectronic nanostructure includes preparing a substrate; providing a quantum well layer on the substrate; etching a volume of the substrate to produce a photonic crystal. The quantum dots are produced at multiple intersections of the quantum well layer within the photonic crystal. Multiple quantum well layers may also be provided so as to form multiple vertically aligned quantum dots. In another embodiment, an optoelectronic nanostructure includes a photonic crystal having a plurality of voids and interconnecting veins; a plurality of quantum dots arranged between the plurality of voids, wherein an electrical connection is provided to one or more of the plurality of quantum dots through an associated interconnecting vein.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: April 20, 2010
    Assignee: University of Delaware
    Inventors: Janusz Murakowski, Garrett Schneider, Dennis W. Prather
  • Publication number: 20090206325
    Abstract: A GaN based semiconductor light-emitting device is provided. The light-emitting device includes a first GaN based compound semiconductor layer of an n-conductivity type; an active layer; a second GaN based compound semiconductor layer; an underlying layer composed of a GaN based compound semiconductor, the underlying layer being disposed between the first GaN based compound semiconductor layer and the active layer; and a superlattice layer composed of a GaN based compound semiconductor doped with a p-type dopant, the superlattice layer being disposed between the active layer and the second GaN based compound semiconductor layer.
    Type: Application
    Filed: September 12, 2006
    Publication date: August 20, 2009
    Applicant: SONY CORPORATION
    Inventors: Goshi Biwa, Hiroyuki Okuyama
  • Publication number: 20080296556
    Abstract: In a calibration method, the relation between dopant concentrations of ?-doping layers in a multilayered semiconductor structure and process parameters is determined S1 based on multiple bulk specimens of the material in which the ?-doping layers are located. A desired dopant concentration is selected S2, and the semiconductor structure with predetermined doping levels can be generated S3 based on the relation between the process parameters and the predetermined doping concentrations.
    Type: Application
    Filed: November 11, 2004
    Publication date: December 4, 2008
    Inventors: Patricia Lustoza De Souza, Christiana Villas-Boas Tribuzy, Mauricio Pamplona Pires, Sandra Marcela Landi