Amorphous Materials (epo) Patents (Class 257/E29.095)
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Patent number: 12133006Abstract: A solid-state imaging device including a plurality of pixels including a photoelectric conversion portion, a charge holding portion accumulating a signal charge transferred from the photoelectric conversion portion, and a floating diffusion region to which the signal charge of the charge holding portion is transferred, wherein the photoelectric conversion portion includes a first semiconductor region of a first conductivity type, and a second semiconductor region of a second conductivity type formed under the first semiconductor region, the charge holding portion includes a third semiconductor region of the first conductivity type, and a fourth semiconductor region of the second conductivity type formed under the third semiconductor region, and a p-n junction between the third semiconductor region and the fourth semiconductor region is positioned deeper than a p-n junction between the first semiconductor region and the second semiconductor region.Type: GrantFiled: March 29, 2021Date of Patent: October 29, 2024Assignee: CANON KABUSHIKI KAISHAInventors: Masahiro Kobayashi, Takeshi Ichikawa, Hirofumi Totsuka, Yusuke Onuki
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Patent number: 12022720Abstract: A display device, an electronic device, or a lighting device that is unlikely to be broken is provided. A flexible first substrate and a flexible second substrate overlap with each other with a display element provided therebetween. A flexible third substrate is bonded on the outer surface of the first substrate, and a flexible fourth substrate is bonded on the outer surface of the second substrate. The third substrate is formed using a material softer than the first substrate, and the fourth substrate is formed using a material softer than the second substrate.Type: GrantFiled: November 14, 2022Date of Patent: June 25, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takuya Kawata, Akihiro Chida
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Patent number: 11996423Abstract: An imaging device that generates a pulse signal by utilizing photoelectric conversion operation is provided. A data potential generated by the photoelectric conversion operation is input to a pulse generation circuit to output a pulse signal having a spike waveform. In addition, a structure in which product-sum operation of pulse signals is performed is provided, and digital data is generated from a new pulse signal. The digital data is taken into a neural network or the like, whereby processing such as image recognition can be performed. Processing up to taking an enormous amount of image data into a neural network or the like can be performed in the imaging device; thus, processing can be efficiently performed.Type: GrantFiled: December 2, 2021Date of Patent: May 28, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Takayuki Ikeda
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Patent number: 11791420Abstract: A semiconductor device includes a channel layer, source/drain contacts, and first barrier liners. The channel layer includes an oxide semiconductor material. The source/drain contacts are disposed in electrical contact with the channel layer. The first barrier liners surround the source/drain contacts, respectively, and include a hydrogen barrier material so as to prevent hydrogen from diffusion through the first barrier liners to the channel layer.Type: GrantFiled: April 19, 2021Date of Patent: October 17, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Marcus Johannes Henricus Van Dal, Gerben Doornbos, Georgios Vellianitis, Mauricio Manfrini
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Patent number: 11620936Abstract: Integrated active-matrix light emitting pixel arrays based displays and methods of fabricating the integrated displays are provided. One of the methods include: forming first color light emitting diodes (LEDs) and respective intermediate metallic layers on a first substrate, integrating the first color LEDs with pixel circuits in a backplane device, injecting laser pulses into particular first color LEDs, such that each particular first color LED is individually separated from the first substrate and locally bonded with a respective pixel circuit through a respective intermediate metallic layer, and removing the first substrate from the backplane device. The backplane device bonded with the particular first color LEDs can be further bonded with other different color LEDs formed on other substrates. Other first color LEDs without exposure of the laser pulses are removed with the first substrate and can be further used to integrate with another backplane device bonded with another color LEDs.Type: GrantFiled: October 22, 2020Date of Patent: April 4, 2023Inventor: Shaoher Pan
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Patent number: 8946669Abstract: A method for forming a resistive memory device includes providing a substrate comprising a first metal material, forming a conductive silicon-bearing layer on top of the first metal material, wherein the conductive silicon-bearing layer comprises an upper region and a lower region, and wherein the lower region is adjacent to the first metal material, forming an amorphous layer from the upper region of the conductive silicon-bearing layer, and disposing an active metal material above the amorphous layer.Type: GrantFiled: August 15, 2012Date of Patent: February 3, 2015Assignee: Crossbar, Inc.Inventors: Sung Hyun Jo, Kuk-Hwan Kim, Tanmay Kumar
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Patent number: 8927985Abstract: A semiconductor device includes first and second conductive layers over an insulating surface, a first insulating layer over the first and second conductive layers, first and second oxide semiconductor layers over the first insulating layer, third and fourth conductive layers over the first oxide semiconductor layer, a second insulating layer over the third and fourth conductive layers, and a fifth conductive layer over the second insulating layer. In the semiconductor device, the third conductive layer is electrically connected to the second conductive layer, the fifth conductive layer is electrically connected to the fourth conductive layer, the first oxide semiconductor layer has a region overlapping with the first conductive layer, the second oxide semiconductor layer has a region overlapping with the fifth conductive layer, and the second oxide semiconductor layer has a region intersecting with the second conductive layer.Type: GrantFiled: September 16, 2013Date of Patent: January 6, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Hideki Matsukura
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Patent number: 8890159Abstract: An oxide semiconductor stacked film which does not easily cause a variation in electrical characteristics of a transistor and has high stability is provided. Further, a transistor which includes the oxide semiconductor stacked film in its channel formation region and has stable electrical characteristics is provided. An oxide semiconductor stacked film includes a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer which are sequentially stacked and each of which contains indium, gallium, and zinc. The content percentage of indium in the second oxide semiconductor layer is higher than that in the first oxide semiconductor layer and the third oxide semiconductor layer, and the absorption coefficient of the oxide semiconductor stacked film, which is measured by the CPM, is lower than or equal to 3×10?3/cm in an energy range of 1.5 eV to 2.3 eV.Type: GrantFiled: July 29, 2013Date of Patent: November 18, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masashi Tsubuku, Ryosuke Watanabe, Masashi Oota, Noritaka Ishihara, Koki Inoue
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Patent number: 8853690Abstract: An object is to provide a transistor including an oxide layer which includes Zn and does not include a rare metal such as In or Ga. Another object is to reduce an off current and stabilize electric characteristics in the transistor including an oxide layer which includes Zn. A transistor including an oxide layer including Zn is formed by stacking an oxide semiconductor layer including insulating oxide over an oxide layer so that the oxide layer is in contact with a source electrode layer or a drain electrode layer with the oxide semiconductor layer including insulating oxide interposed therebetween, whereby variation in the threshold voltage of the transistor can be reduced and electric characteristics can be stabilized.Type: GrantFiled: January 17, 2013Date of Patent: October 7, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hiromichi Godo, Hideyuki Kishida
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Publication number: 20140027758Abstract: This disclosure provides implementations of multi-gate transistors, structures, devices, apparatus, systems, and related processes. In one aspect, a device includes a thin-film semiconducting layer arranged over a substrate. A drain and source are coupled to the semiconducting layer. The device also includes first, second and third gates all arranged adjacent the semiconducting layer and configured to receive first, second, and third control signals, respectively. Dielectric layers insulate the gates from the semiconducting layer and from one another. In a first mode, the first, second, and third gates are configured such that charge is stored in a potential well in a region of the semiconducting layer adjacent the second gate. In a second mode, the first, second and third gate electrodes are configured such that the stored charge is transferred through the region of the semiconducting layer adjacent the third gate electrode and through the source to a load.Type: ApplicationFiled: July 24, 2012Publication date: January 30, 2014Applicant: QUALCOMM MEMS TECHNOLOGIES, INC.Inventors: John Hyunchul Hong, Cheonhong Kim, Tze-Ching Fung
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Patent number: 8610119Abstract: A plasma hydrogenated region in the dielectric layer of a semiconductor thin film transistor (TFT) structure improves the stability of the TFT. The TFT is a multilayer structure including an electrode, a dielectric layer disposed on the electrode, and a metal oxide semiconductor on the dielectric. Exposure of the dielectric layer to a hydrogen containing plasma prior to deposition of the semiconductor produces a plasma hydrogenated region at the semiconductor-dielectric interface. The plasma hydrogenated region incorporates hydrogen which decreases in concentration from semiconductor/dielectric interface into the bulk of one or both of the dielectric layer and the semiconductor layer.Type: GrantFiled: December 4, 2009Date of Patent: December 17, 2013Assignee: 3M Innovative Properties CompanyInventors: Steven D. Theiss, David H. Redinger
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Patent number: 8502222Abstract: An amorphous oxide semiconductor contains at least one element selected from In, Ga, and Zn at an atomic ratio of InxGayZnz, wherein the density M of the amorphous oxide semiconductor is represented by the relational expression (1) below: M?0.94×(7.121x+5.941y+5.675z)/(x+y+z)??(1) where 0?x?1, 0?y?1, 0?z?1, and x+y+z?0.Type: GrantFiled: February 23, 2012Date of Patent: August 6, 2013Assignee: Canon Kabushiki KaishaInventors: Hisato Yabuta, Ayanori Endo, Nobuyuki Kaji, Ryo Hayashi
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Patent number: 8431927Abstract: A thin film transistor including: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode and exposed portions of the substrate; an oxide semiconductor layer formed on the gate insulating layer to correspond to the gate electrode, and comprising an HfInZnO-based oxide semiconductor, wherein the concentration of Hf is from about 9 to about 15 at % based on 100 at % of the total concentration of Hf, In, and Zn; and source and drain regions respectively formed to extend on both sides of the oxide semiconductor layer and the gate insulating layer.Type: GrantFiled: August 31, 2010Date of Patent: April 30, 2013Assignee: Samsung Display Co., Ltd.Inventors: Kwang-Suk Kim, Jin-Seong Park
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Publication number: 20130075719Abstract: According to one embodiment, a thin film transistor includes a substrate, a gate electrode, a first insulating film, an oxide semiconductor film, a second insulating film, a source electrode, and a drain electrode. The gate electrode is provided on a part of the substrate. The first insulating film covers the gate electrode. The oxide semiconductor film is provided on the gate electrode via the first insulating film. The second insulating film is provided on a part of the oxide semiconductor film. The source and drain electrodes are respectively connected to first and second portions of the oxide semiconductor film not covered with the second insulating film. The oxide semiconductor film includes an oxide semiconductor. Concentrations of hydrogen contained in the first and second insulating films are not less than 5×1020 atm/cm3, and not more than 1019 atm/cm3, respectively.Type: ApplicationFiled: May 30, 2012Publication date: March 28, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Shintaro NAKANO, Tomomasa UEDA, Kentaro MIURA, Nobuyoshi SAITO, Tatsunori SAKANO, Hajime YAMAGUCHI
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Publication number: 20130069057Abstract: A wafer with high rupture resistance includes a plurality of surfaces, wherein the surfaces include a largest surface having a largest area than others and a side surface connected to the fringe of the largest surface. The side surface forms a nanostructured layer thereon to assist the stress dispersion of the wafer. Accordingly, the wafer is provided with a high rupture resistance so as to prevent the wafer from damages during semiconductor or other processes.Type: ApplicationFiled: September 20, 2012Publication date: March 21, 2013Inventor: JER-LIANG YEH
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Patent number: 8399274Abstract: An organic light emitting display is disclosed. The display has a pixel which includes a transistor and a capacitor. The active layer of the transistor and at least one of the electrodes of the capacitor comprise a semiconductor oxide.Type: GrantFiled: July 9, 2010Date of Patent: March 19, 2013Assignee: Samsung Display Co., Ltd.Inventors: Ki-Nyeng Kang, Young-Shin Pyo, Dong-Un Jin
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Publication number: 20130056728Abstract: Provided is a thin film transistor capable of improving reliability in the thin film transistor including an oxide semiconductor layer. A thin film transistor including: a gate electrode; a gate insulating film formed on the gate electrode; an oxide semiconductor layer forming a channel region corresponding to the gate electrode on the gate insulating film; a channel protective film formed at least in a region corresponding to the channel region on the oxide semiconductor layer; and a source/drain electrode. A top face and a side face of the oxide semiconductor layer are covered with the source/drain electrode and the channel protective layer on the gate insulating film.Type: ApplicationFiled: October 31, 2012Publication date: March 7, 2013Applicant: SONY CORPORATIONInventor: SONY CORPORATION
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Publication number: 20130048978Abstract: Provided is a semiconductor device including an oxide semiconductor and having stable electrical characteristics. Specifically, a semiconductor device including an oxide semiconductor and including a gate insulating film with favorable characteristics is provided. Further, a method for manufacturing the semiconductor device is provided. The semiconductor device includes a gate electrode, a gate insulating film over the gate electrode, an oxide semiconductor film over the gate insulating film, and a source electrode and a drain electrode in contact with the oxide semiconductor film. The gate insulating film includes at least a silicon oxynitride film and an oxygen release type oxide film which is formed over the silicon oxynitride film. The oxide semiconductor film is formed on and in contact with the oxygen release type oxide film.Type: ApplicationFiled: August 23, 2012Publication date: February 28, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Masahiro WATANABE, Mitsuo MASHIYAMA, Takuya HANDA, Kenichi OKAZAKI, Shunpei YAMAZAKI
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Patent number: 8362478Abstract: An object is to provide a transistor including an oxide layer which includes Zn and does not include a rare metal such as In or Ga. Another object is to reduce an off current and stabilize electric characteristics in the transistor including an oxide layer which includes Zn. A transistor including an oxide layer including Zn is formed by stacking an oxide semiconductor layer including insulating oxide over an oxide layer so that the oxide layer is in contact with a source electrode layer or a drain electrode layer with the oxide semiconductor layer including insulating oxide interposed therebetween, whereby variation in the threshold voltage of the transistor can be reduced and electric characteristics can be stabilized.Type: GrantFiled: April 13, 2010Date of Patent: January 29, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hiromichi Godo, Hideyuki Kishida
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Publication number: 20120305874Abstract: A steering device. The steering device includes an n-type impurity region comprising a zinc oxide material and a p-type impurity region comprising a silicon germanium material. A pn junction region formed from the zinc oxide material and the silicon germanium material. The steering device is a serially coupled to a resistive switching device to provide rectification for the resistive switching device to form a non-volatile memory device.Type: ApplicationFiled: May 31, 2011Publication date: December 6, 2012Applicant: Crossbar, Inc.Inventor: Scott Brad HERNER
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Publication number: 20120305914Abstract: To reduce adverse effects on actual operation and to reduce adverse effects of noise. A structure including an electrode, a wiring electrically connected to the electrode, an oxide semiconductor layer overlapping with the electrode in a plane view, an insulating layer provided between the electrode and the oxide semiconductor layer in a cross-sectional view, and a functional circuit to which a signal is inputted from the electrode through the wiring and in which operation is controlled in accordance with the signal inputted. A capacitor is formed using an oxide semiconductor layer, an insulating layer, and a wiring or an electrode.Type: ApplicationFiled: August 14, 2012Publication date: December 6, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hideki UOCHI, Daisuke KAWAE
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Patent number: 8319217Abstract: A thin film transistor including: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode and exposed portions of the substrate; an oxide semiconductor layer formed on the gate insulating layer to correspond to the gate electrode, and comprising an HfInZnO-based oxide semiconductor, wherein the oxide semiconductor layer has a Zn concentration gradient; and source and drain regions respectively formed on both sides of the oxide semiconductor layer and the gate insulating layer.Type: GrantFiled: August 31, 2010Date of Patent: November 27, 2012Assignee: Samsung Display Co., Ltd.Inventors: Kwang-Suk Kim, Min-Kyu Kim
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Publication number: 20120181533Abstract: A thin film transistor array panel includes: an substrate; a gate line positioned on the substrate; a data line intersecting the gate line; a thin film transistor connected to the gate line and the data line; a gate insulating layer between the gate electrode of the thin film transistor and the semiconductor of the thin film transistor; a pixel electrode connected to the thin film transistor; and a passivation layer positioned between the pixel electrode and the thin film transistor, wherein at least one of the gate insulating layer and the passivation layer includes a silicon nitride layer, and the silicon nitride layer includes hydrogen content at less than 2×1022 cm3 or 4 atomic %.Type: ApplicationFiled: September 23, 2011Publication date: July 19, 2012Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyeong Suk YOO, Joo-Han KIM, Je Hun LEE, Seong-Hun KIM, Jung Kyu LEE, Chang Oh JEONG
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Patent number: 8207531Abstract: Provided is a thin film transistor including: a first gate electrode; a first gate insulating layer covering the first gate electrode; a semiconductor layer on the first gate insulating layer; a second gate insulating layer on the semiconductor layer; a second gate electrode on the second gate insulating layer; and a drain electrode and a source electrode electrically connected to the semiconductor layer, in which: the semiconductor layer is an amorphous oxide semiconductor containing at least one of Zn, Ga, In, and Sn; the first gate electrode shields light entering the semiconductor layer from below, and the second gate electrode shields light entering the semiconductor layer from above; and the second gate electrode is electrically connected to the first gate electrode by penetrating the first gate insulating layer and the second gate insulating layer, to thereby shield light entering the semiconductor layer from at least one of sides thereof.Type: GrantFiled: August 18, 2010Date of Patent: June 26, 2012Assignee: Canon Kabushiki KaishaInventors: Kenji Takahashi, Ryo Hayashi, Seiichiro Yaginuma
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Publication number: 20120132907Abstract: One of objects is to provide a semiconductor film having stable characteristics. Further, one of objects is to provide a semiconductor element having stable characteristics. Further, one of objects is to provide a semiconductor device having stable characteristics. Specifically, a structure which includes a seed crystal layer (seed layer) including crystals each having a first crystal structure, one of surfaces of which is in contact with an insulating surface, and an oxide semiconductor film including crystals growing anisotropically, which is on the other surface of the seed crystal layer (seed layer) may be provided. With such a heterostructure, electric characteristics of the semiconductor film can be stabilized.Type: ApplicationFiled: November 23, 2011Publication date: May 31, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei Yamazaki, Masahiro Takahashi, Tetsunori Maruyama
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Patent number: 8188467Abstract: In a field effect transistor, a channel layer of the field effect transistor is composed of an amorphous oxide including In, Zn, N and O, an atomic composition ratio of N to N and O (N/(N+O)) in the amorphous oxide is equal to or larger than 0.01 atomic percent and equal to or smaller than 3 atomic percent, and the amorphous oxide does not include Ga, or, in a case where the amorphous oxide includes Ga, the number of Ga atoms contained in the amorphous oxide is smaller than the number of N atoms.Type: GrantFiled: May 22, 2008Date of Patent: May 29, 2012Assignee: Canon Kabushiki KaishaInventors: Naho Itagaki, Tatsuya Iwasaki
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Publication number: 20120086002Abstract: The present invention relates to a process for producing a layer comprising at least one semiconductive metal oxide on a substrate, comprising at least the steps of: (A) applying a porous layer of at least one semiconductive metal oxide to a substrate, (B) treating the porous layer from step (A) with a solution comprising at least one precursor compound of the semiconductive metal oxide, such that the pores of the porous layer are at least partly filled with this solution and (C) thermally treating the layer obtained in step (B) in order to convert the at least one precursor compound of the semiconductive metal oxide to the semiconductive metal oxide, wherein the at least one precursor compound of the at least one semiconductive metal oxide in step (B) is selected from the group consisting of carboxylates of mono-, di- or polycarboxylic acids having at least three carbon atoms or derivatives of mono-, di- or polycarboxylic acids, alkoxides, hydroxides, semicarbazides, carbamates, hydroxamates, isocyanates, amType: ApplicationFiled: June 15, 2010Publication date: April 12, 2012Applicant: BASF SEInventors: Friederike Fleischhaker, Imme Domke, Andrey Karpov, Marcel Kastler, Veronika Wloka, Lothar Weber
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Patent number: 8154017Abstract: An amorphous oxide semiconductor contains at least one element selected from In, Ga, and Zn at an atomic ratio of InxGayZnz, wherein the density M of the amorphous oxide semiconductor is represented by the relational expression (1) below: M?0.94×(7.121x+5.941y+5.675z)/(x+y+z)??(1) where 0?x?1, 0?y?1, 0?z?1, and x+y+z?0.Type: GrantFiled: April 15, 2008Date of Patent: April 10, 2012Assignee: Canon Kabushiki KaishaInventors: Hisato Yabuta, Ayanori Endo, Nobuyuki Kaji, Ryo Hayashi
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Publication number: 20110303914Abstract: One object is to provide a semiconductor device including an oxide semiconductor with improved electrical characteristics. The semiconductor device includes a first insulating film including an element of Group 13 and oxygen; an oxide semiconductor film partly in contact with the first insulating film; a source electrode and a drain electrode electrically connected to the oxide semiconductor film; a gate electrode overlapping with the oxide semiconductor film; and a second insulating film partly in contact with the oxide semiconductor film, between the oxide semiconductor film and the gate electrode. Further, the first insulating film including an element of Group 13 and oxygen includes a region where an amount of oxygen is greater than that in a stoichiometric composition ratio.Type: ApplicationFiled: June 6, 2011Publication date: December 15, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Shunpei Yamazaki
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Publication number: 20110266536Abstract: Provided is a solution composition for manufacturing a metal oxide semiconductor including aluminum salts, metal acetylacetonate and a solvent. In addition, provided is a method for manufacturing a metal oxide semiconductor, including: manufacturing of a metal oxide semiconductor by performing heat treatment after coating a solution composition for manufacturing the metal oxide semiconductor above a substrate. In addition, provided is a thin film transistor, including: a gate substrate; a metal oxide semiconductor manufactured to be overlapped with the gate substrate; a source electrode electrically connected to the metal oxide semiconductor; and a drain electrode that is electrically connected to the metal oxide semiconductor and faces the source electrode.Type: ApplicationFiled: September 1, 2010Publication date: November 3, 2011Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Byeong-Soo Bae, Young Hwan Hwang
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Publication number: 20110253998Abstract: A plasma hydrogenated region in the dielectric layer of a semiconductor thin film transistor (TFT) structure improves the stability of the TFT. The TFT is a multilayer structure including an electrode, a dielectric layer disposed on the electrode, and a metal oxide semiconductor on the dielectric. Exposure of the dielectric layer to a hydrogen containing plasma prior to deposition of the semiconductor produces a plasma hydrogenated region at the semiconductor-dielectric interface. The plasma hydrogenated region incorporates hydrogen which decreases in concentration from semiconductor/dielectric interface into the bulk of one or both of the dielectric layer and the semiconductor layer.Type: ApplicationFiled: December 4, 2009Publication date: October 20, 2011Inventors: Steven D. Theiss, David H. Redinger
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Publication number: 20110147735Abstract: Provided are a thin film transistor and a method of forming the same. The thin film transistor includes: a substrate; a source electrode and a drain electrode on the substrate; an oxide active layer between the source electrode and the drain electrode; a gate electrode on one side of the oxide active layer; a gate dielectric layer between the gate electrode and the oxide active layer; and a buffer layer between the gate dielectric layer and the oxide active layer.Type: ApplicationFiled: August 30, 2010Publication date: June 23, 2011Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventor: Woo-Seok Cheong
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Publication number: 20110140096Abstract: A thin film transistor including: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode and exposed portions of the substrate; an oxide semiconductor layer formed on the gate insulating layer to correspond to the gate electrode, and comprising an HfInZnO-based oxide semiconductor, wherein the concentration of Hf is from about 9 to about 15 at % based on 100 at % of the total concentration of Hf, In, and Zn; and source and drain regions respectively formed to extend on both sides of the oxide semiconductor layer and the gate insulating layer.Type: ApplicationFiled: August 31, 2010Publication date: June 16, 2011Applicant: c/o Samsung Mobile Display Co., Ltd.Inventors: Kwang-Suk Kim, Jin-Seong Park
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Publication number: 20110140095Abstract: A thin film transistor including: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode and exposed portions of the substrate; an oxide semiconductor layer formed on the gate insulating layer to correspond to the gate electrode, and comprising an HfInZnO-based oxide semiconductor, wherein the oxide semiconductor layer has a Zn concentration gradient; and source and drain regions respectively formed on both sides of the oxide semiconductor layer and the gate insulating layer.Type: ApplicationFiled: August 31, 2010Publication date: June 16, 2011Applicant: c/o Samsung Mobile Display Co., Ltd.Inventors: Kwang-Suk Kim, Min-Kyu Kim
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Publication number: 20110127522Abstract: Objects are to provide a semiconductor device for high power application in which a novel semiconductor material having high productivity is used and to provide a semiconductor device having a novel structure in which a novel semiconductor material is used. The present invention is a vertical transistor and a vertical diode each of which has a stacked body of an oxide semiconductor in which a first oxide semiconductor film having crystallinity and a second oxide semiconductor film having crystallinity are stacked. An impurity serving as an electron donor (donor) which is contained in the stacked body of an oxide semiconductor is removed in a step of crystal growth; therefore, the stacked body of an oxide semiconductor is highly purified and is an intrinsic semiconductor or a substantially intrinsic semiconductor whose carrier density is low. The stacked body of an oxide semiconductor has a wider band gap than a silicon semiconductor.Type: ApplicationFiled: November 22, 2010Publication date: June 2, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Shunpei YAMAZAKI
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Publication number: 20110127519Abstract: An organic light emitting display device and a method for manufacturing the same. The organic light emitting display device includes: an insulating layer formed on a substrate; a resistance layer of oxide semiconductor formed on the insulating layer; a wiring layer connected to both side portions of the resistance layer; an organic layer formed on the upper portion including the resistance layer and the wiring layer; and a capping layer formed on the organic layer to be overlapped with the resistance layer.Type: ApplicationFiled: July 7, 2010Publication date: June 2, 2011Applicant: Samsung Mobile Display Co., Ltd.Inventors: Ki-Nyeng KANG, Young-Shin Pyo, Jae-Seob Lee
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Publication number: 20110108836Abstract: A solid-state image sensor which holds a potential for a long time and includes a thin film transistor with stable electrical characteristics is provided. When the off-state current of a thin film transistor including an oxide semiconductor layer is set to 1×10?13 A or less and the thin film transistor is used as a reset transistor and a transfer transistor of the solid-state image sensor, the potential of the signal charge storage portion is kept constant, so that a dynamic range can be improved. When a silicon semiconductor which can be used for a complementary metal oxide semiconductor is used for a peripheral circuit, a high-speed semiconductor device with low power consumption can be manufactured.Type: ApplicationFiled: November 3, 2010Publication date: May 12, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Jun KOYAMA, Shunpei YAMAZAKI
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Publication number: 20110101336Abstract: With a non-linear element (e.g., a diode) with small reverse saturation current, a power diode or rectifier is provided. A non-linear element includes a first electrode provided over a substrate, an oxide semiconductor film provided on and in contact with the first electrode and having a concentration of hydrogen of 5×1019 atoms/cm3 or less, a second electrode provided on and in contact with the oxide semiconductor film, a gate insulating film covering the first electrode, the oxide semiconductor film, and the second electrode, and third electrodes provided in contact with the gate insulating film and facing each other with the first electrode, the oxide semiconductor film, and the second electrode interposed therebetween or a third electrode provided in contact with the gate insulating film and surrounding the second electrode. The third electrodes are connected to the first electrode or the second electrode. With the non-linear element, a power diode or a rectifier is formed.Type: ApplicationFiled: October 26, 2010Publication date: May 5, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Shunpei Yamazaki
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Publication number: 20110084270Abstract: An object is to provide a thin film transistor including an oxide semiconductor layer, in which a material used for the oxide semiconductor layer and a material used for source and drain electrode layers are prevented from reacting with each other. The source and drain electrode layers provided over a substrate having an insulating surface have a stacked structure of two or more layers. In the stack of layers, a layer which is in contact with an oxide semiconductor layer is a metal layer including a metal element other than a metal element included in the oxide semiconductor layer. An element selected from Sn, Sb, Se, Te, Pd, Ag, Ni, and Cu; an alloy containing any of these elements as a component; an alloy containing any of these elements in combination; or the like is used for a material of the metal layer used.Type: ApplicationFiled: October 6, 2010Publication date: April 14, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Shunpei YAMAZAKI
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Publication number: 20110084272Abstract: An object is to provide a thin film transistor having favorable electric characteristics and a semiconductor device including the thin film transistor as a switching element. The thin film transistor includes a gate electrode formed over an insulating surface, a gate insulating film over the gate electrode, an oxide semiconductor film which overlaps with the gate electrode over the gate insulating film and which includes a layer where the concentration of one or a plurality of metals contained in the oxide semiconductor is higher than that in other regions, a pair of metal oxide films formed over the oxide semiconductor film and in contact with the layer, and a source electrode and a drain electrode in contact with the metal oxide films. The metal oxide films are formed by oxidation of a metal contained in the source electrode and the drain electrode.Type: ApplicationFiled: October 7, 2010Publication date: April 14, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Akiharu Miyanaga, Junichiro Sakata, Masayuki Sakakura, Masahiro Takahashi, Hideyuki Kishida, Shunpei Yamazaki
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Publication number: 20110062434Abstract: An object of the invention is to improve the reliability of a light-emitting device. Another object of the invention is to provide flexibility to a light-emitting device having a thin film transistor using an oxide semiconductor film. A light-emitting device has, over one flexible substrate, a driving circuit portion including a thin film transistor for a driving circuit and a pixel portion including a thin film transistor for a pixel. The thin film transistor for a driving circuit and the thin film transistor for a pixel are inverted staggered thin film transistors including an oxide semiconductor layer which is in contact with a part of an oxide insulating layer.Type: ApplicationFiled: September 13, 2010Publication date: March 17, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shingo EGUCHI, Yoshiaki OIKAWA, Kenichi OKAZAKI, Hotaka MARUYAMA
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Publication number: 20110049509Abstract: Provided is a thin film transistor including: a first gate electrode; a first gate insulating layer covering the first gate electrode; a semiconductor layer on the first gate insulating layer; a second gate insulating layer on the semiconductor layer; a second gate electrode on the second gate insulating layer; and a drain electrode and a source electrode electrically connected to the semiconductor layer, in which: the semiconductor layer is an amorphous oxide semiconductor containing at least one of Zn, Ga, In, and Sn; the first gate electrode shields light entering the semiconductor layer from below, and the second gate electrode shields light entering the semiconductor layer from above; and the second gate electrode is electrically connected to the first gate electrode by penetrating the first gate insulating layer and the second gate insulating layer, to thereby shield light entering the semiconductor layer from at least one of sides thereof.Type: ApplicationFiled: August 18, 2010Publication date: March 3, 2011Applicant: CANON KABUSHIKI KAISHAInventors: Kenji Takahashi, Ryo Hayashi, Seiichiro Yaginuma
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Publication number: 20110042675Abstract: An etching resist including first and second portions, the first portion being thicker than the second portion, is formed on a metallic layer. Through the etching resist, a semiconductor layer and the metallic layer are patterned by etching so as to form a wiring from the metallic layer and leave the semiconductor layer under the wiring. An electrical test is conducted on the wiring. The second portion is removed while the first portion is left unremoved. Selective etching is performed through the first portion so as to leave the semiconductor layer unetched to pattern the wiring to be divided into drain and source electrodes. A substrate is cut. In patterning the wiring, the wiring is etched to be cut at a position closer to a cutting line of the substrate with respect to the drain and source electrodes, while leaving the semiconductor layer unetched.Type: ApplicationFiled: August 20, 2010Publication date: February 24, 2011Inventors: Tetsuya Kawamura, Masashi Sato, Yoshiki Watanabe, Hiroaki Iwato, Masafumi Hirata
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Publication number: 20110012107Abstract: A novel field-effect transistor is provided which employs an amorphous oxide. In an embodiment of the present invention, the transistor comprises an amorphous oxide layer containing electron carrier at a concentration less than 1×10?18/cm3, and the gate-insulating layer is comprised of a first layer being in contact with the amorphous oxide and a second layer different from the first layer.Type: ApplicationFiled: September 15, 2010Publication date: January 20, 2011Applicants: CANON KABUSHIKI KAISHA, TOKYO INSTITUTE OF TECHNOLOGYInventors: Masafumi Sano, Katsumi Nakagawa, Hideo Hosono, Toshio Kamiya, Kenji Nomura
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Publication number: 20110006300Abstract: A method of manufacturing an electronic device includes: preparing a film-attached substrate including a substrate, and an oxide semiconductor film containing In, Ga, and Zn and a metal film containing at least one of W or Mo provided in this order on the substrate; and wet-etching the metal film of the film-attached substrate using an etching liquid of which a main component is hydrogen peroxide under conditions such that an etching selection ratio between the metal film and the oxide semiconductor film (etching rate of the metal film/etching rate of the oxide semiconductor film) is 100 or higher.Type: ApplicationFiled: July 8, 2010Publication date: January 13, 2011Applicant: FUJIFILM CORPORATIONInventors: Fumihiko MOCHIZUKI, Atsushi TANAKA
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Publication number: 20100320457Abstract: Provided is an etching solution composition for selectively etching a metal film, which is composed of Al, Al alloy or the like and is arranged on an amorphous oxide film, from a laminated film including the metal film and an amorphous oxide film of various types. The etching solution composition is used for selectively etching the metal film from the laminated film which includes the amorphous oxide film and the metal film composed of Al, Al alloy, Cu, Cu alloy, Ag or Ag alloy, and is composed of an aqueous solution containing an alkali.Type: ApplicationFiled: November 21, 2008Publication date: December 23, 2010Inventors: Masahito Matsubara, Kazuyoshi Inoue, Koki Yano, Yuki Igarashi
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Publication number: 20100308327Abstract: Provided are a ZnO-based substrate having a high-quality surface suitable for crystal growth, a method for processing the ZnO-based substrate, and a ZnO-based semiconductor device. The ZnO-based substrate is formed such that any one of a carboxyl group and a carbonate group is substantially absent in a principal surface on a crystal growth side. Also, in order for a carboxyl group or a carbonate group to be substantially absent, any one of oxygen radicals, oxygen plasma and ozone is brought into contact with the surface of the ZnO-based substrate before the crystal growth is started. Consequently, cleanness of the surface of the ZnO substrate is enhanced, thereby enabling fabrication of a high-quality ZnO-based thin film on the substrate.Type: ApplicationFiled: January 30, 2009Publication date: December 9, 2010Inventors: Ken Nakahara, Shunsuke Akasaka, Masashi Kawasaki, Akira Ohtomo, Atsushi Tsukazaki
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Publication number: 20100276689Abstract: An amorphous oxide containing hydrogen (or deuterium) is applied to a channel layer of a transistor. Accordingly, a thin film transistor having superior TFT properties can be realized, the superior TFT properties including a small hysteresis, normally OFF operation, a high ON/OFF ratio, a high saturated current, and the like. Furthermore, as a method for manufacturing a channel layer made of an amorphous oxide, film formation is performed in an atmosphere containing a hydrogen gas and an oxygen gas, so that the carrier concentration of the amorphous oxide can be controlled.Type: ApplicationFiled: July 9, 2010Publication date: November 4, 2010Applicant: CANON KABUSHIKI KAISHAInventor: Tatsuya Iwasaki
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Publication number: 20100171117Abstract: It is an object of the present invention to simplify steps needed to process a wiring in forming a multilayer wiring. In addition, when a droplet discharging technique or a nanoimprint technique is used to form a wiring in a contact hole having a comparatively long diameter, the wiring in accordance with the shape of the contact hole is formed, and the wiring portion of the contact hole is likely to have a depression compared with other portions. A penetrating opening is formed by irradiating a light-transmitting insulating film with laser light having high intensity and a pulse high in repetition frequency. A plurality of openings having a minute contact area is provided instead of forming one penetrating opening having a large contact area to have an even thickness of a wiring by reducing a partial depression and also to ensure contact resistance.Type: ApplicationFiled: March 23, 2010Publication date: July 8, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hideaki KUWABARA, Hiroko YAMAMOTO
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Publication number: 20100140611Abstract: In a field effect transistor, a channel layer of the field effect transistor is composed of an amorphous oxide including In, Zn, N and O, an atomic composition ratio of N to N and O (N/(N+O)) in the amorphous oxide is equal to or larger than 0.01 atomic percent and equal to or smaller than 3 atomic percent, and the amorphous oxide does not include Ga, or, in a case where the amorphous oxide includes Ga, the number of Ga atoms contained in the amorphous oxide is smaller than the number of N atoms.Type: ApplicationFiled: May 22, 2008Publication date: June 10, 2010Applicant: CANON KABUSHIKI KAISHAInventors: Naho Itagaki, Tatsuya Iwasaki