Abstract: A crystalline oxide thin film contains an In element, a Ga element and an Ln element, in which the In element is a main component, the Ln element is at least one element selected from the group consisting of La, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, and an average crystal grain size D1 is in a range from 0.05 ?m to 0.5 ?m.

Abstract: The present disclosure relates to a method of forming an antenna layer for use in a light emitting device, the method comprising providing a plurality of particles on a support layer so that a space is formed between at least two particles of the plurality of particles, depositing a material so that at least a portion of the material passes through the space between the at least two particles on to the support layer and removing the plurality of particles from the support layer, the portion of the material remaining on the support layer to form at least a part of the antenna layer.

Abstract: A photovoltaic cell may include a hydrogenated amorphous silicon layer including a n-type doped region and a p-type doped region. The n-type doped region may be separated from the p-type doped region by an intrinsic region. The photovoltaic cell may include a front transparent electrode connected to the n-type doped region, and a rear electrode connected to the p-type doped region. The efficiency may be optimized for indoor lighting values by tuning the value of the H2/SiH4 ratio of the hydrogenated amorphous silicon layer.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first III-V compound layer disposed on the substrate, a second III-V compound layer disposed on the first III-V compound layer, a p-type doped III-V compound layer disposed on the second III-V compound layer, a gate disposed over the p-type doped III-V compound layer, a source and a drain disposed on opposite sides of the gate, and a dielectric layer disposed between the p-type doped III-V compound layer and the gate. A method for forming the above semiconductor device is also provided.

Abstract: The semiconductor device includes a substrate, a stack structure including gate patterns and interlayer insulating films that are alternately stacked on the substrate, an insulating pillar extending in a thickness direction of the substrate within the stack structure, a polycrystalline metal oxide film extending along a sidewall of the insulating pillar between the insulating pillar and the stack structure, a liner film having a transition metal between the insulating pillar and the polycrystalline metal oxide film, and a tunnel insulating film, a charge storage film, and a blocking insulating film which are disposed in order between the polycrystalline metal oxide film and the gate patterns.

Abstract: A solid-state imaging device with high productivity and improved dynamic range is provided. In the imaging device including a photoelectric conversion element having an i-type semiconductor layer, functional elements, and a wiring, an area where the functional elements and the wiring overlap with the i-type semiconductor in a plane view is preferably less than or equal to 35%, further preferably less than or equal to 15%, and still further preferably less than or equal to 10% of the area of the i-type semiconductor in a plane view. Plural photoelectric conversion elements are provided in the same semiconductor layer, whereby a process for separating the respective photoelectric conversion elements can be reduced. The respective i-type semiconductor layers in the plural photoelectric conversion elements are separated by a p-type semiconductor layer or an n-type semiconductor layer.

Abstract: Resistive memory devices are provided which are configured to mitigate resistance drift. A device comprises a phase-change element, a resistive liner, a first electrode, a second electrode, and a third electrode. The resistive liner is disposed in contact with a first surface of the phase-change element. The first electrode is coupled to a first end portion of the resistive liner. The second electrode is coupled to a second end portion of the resistive liner. The third electrode is coupled to the first surface of the phase-change element.

Abstract: An object is to provide a material suitably used for a semiconductor included in a transistor, a diode, or the like. Another object is to provide a semiconductor device including a transistor in which the condition of an electron state at an interface between an oxide semiconductor film and a gate insulating film in contact with the oxide semiconductor film is favorable. Further, another object is to manufacture a highly reliable semiconductor device by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used for a channel. A semiconductor device is formed using an oxide material which includes crystal with c-axis alignment, which has a triangular or hexagonal atomic arrangement when seen from the direction of a surface or an interface and rotates around the c-axis.

Abstract: Disclosed herein is a method for manufacturing a metal-oxide thin film transistor. The method includes the steps of: (a1) forming a gate electrode on a substrate; (a2) forming a gate insulating layer over the gate electrode; (a3) forming a metal-oxide semiconductor layer having a channel region on the gate insulating layer; (a4) forming a source electrode and a drain electrode on the metal-oxide semiconductor layer, wherein the source electrode is spaced apart from the drain electrode by a gap exposing the channel region; (a5) forming a mobility-enhancing layer on the channel region, wherein the mobility-enhancing layer is not in contact with the source electrode and the drain electrode; and (a6) annealing the metal-oxide semiconductor layer and the mobility-enhancing layer in an environment at a temperature of about 200° C. to 350° C.

Abstract: The present invention relates to formulations comprising a) at least two different ZnO cubanes of which at least one ZnO cubane is present in solid form under SATP conditions and at least one ZnO cubane is present in liquid form under SATP conditions, and b) at least one solvent, to processes for producing semiconductive ZnO layers from these formulations, to the use of the formulations for producing electronic components and to the electronic components themselves.

Abstract: Disclosed herein is a thin film transistor, which includes a metal oxide semiconductor layer, an insulating layer, a gate electrode, a source electrode and a drain electrode. The metal oxide semiconductor layer includes a channel region having at least one first region and a second region. The first region has an oxygen vacancy concentration greater than an oxygen vacancy concentration of the second region. The second region surrounds the first region. A method for manufacturing the thin film transistor is disclosed as well.

Abstract: One of objects is to provide a semiconductor film having stable characteristics. Further, one of objects is to provide a semiconductor element having stable characteristics. Further, one of objects is to provide a semiconductor device having stable characteristics. Specifically, a structure which includes a seed crystal layer (seed layer) including crystals each having a first crystal structure, one of surfaces of which is in contact with an insulating surface, and an oxide semiconductor film including crystals growing anisotropically, which is on the other surface of the seed crystal layer (seed layer) may be provided. With such a heterostructure, electric characteristics of the semiconductor film can be stabilized.

Abstract: An amorphous oxide thin film containing amorphous oxide is exposed to an oxygen plasma generated by exciting an oxygen-containing gas in high frequency. The oxygen plasma is preferably generated under the condition that applied frequency is 1 kHz or more and 300 MHz or less and pressure is 5 Pa or more. The amorphous oxide thin film is preferably exposed by a sputtering method, ion-plating method, vacuum deposition method, sol-gel method or fine particle application method.

Abstract: Provided is an organic electroluminescent device including: a substrate (11, 101); a first electrode (12, 102) formed on the substrate (11, 101) and including a pixel region; a partition wall (23, 203) formed on the substrate (11, 101), partitioning the first electrode (12, 102), and including a surface with a recessed and projected form; a luminescent medium layer (19, 109) formed on the pixel region and the partition wall (23, 203), a film thickness of the partition wall (23, 203) being uneven according to the recessed and projected form; and a second electrode (17, 107) formed on the luminescent medium layer (19, 109).

Abstract: The objective is to improve capabilities such as high-speed switching of a compound semiconductor device. Provided is a semiconductor wafer comprising a silicon wafer; an insulating film that is formed on the silicon wafer and that has an open portion reaching the silicon wafer; a Ge crystal formed in the open portion; a seed compound semiconductor crystal that is grown with the Ge crystal as a nucleus and that protrudes beyond a surface of the insulating film; and a laterally grown compound semiconductor layer that is laterally grown on the insulating film with a specified surface of the seed compound semiconductor crystal as a seed surface.

Abstract: Compound semiconductors capable of emitting light in the green spectrum are provided. The compound semiconductors may display improved quantum efficiencies when applied to various optical devices. Also, light emitting diodes and light emitting diode modules comprising the compound semiconductors are provided.

Abstract: A method of manufacturing a semiconductor wafer of the present invention includes the steps of: obtaining a composite base by forming a base surface flattening layer having a surface RMS roughness of not more than 1.0 nm on a base; obtaining a composite substrate by attaching a semiconductor crystal layer to a side of the composite base where the base surface flattening layer is located; growing at least one semiconductor layer on the semiconductor crystal layer of the composite substrate; and obtaining the semiconductor wafer including the semiconductor crystal layer and the semiconductor layer by removing the base surface flattening layer by wet etching and thereby separating the semiconductor crystal layer from the base.

Abstract: It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

Abstract: A thin film transistor (TFT) using an oxide semiconductor as an active layer, a method of manufacturing the TFT, and a flat panel display device having the TFT include source and drain electrodes formed on a substrate; an active layer formed of an oxide semiconductor disposed on the source and drain electrodes; a gate electrode; and an interfacial stability layer formed on at least one of top and bottom surfaces of the active layer. In the TFT, the interfacial stability layer is formed of an oxide having a band gap of 3.0 to 8.0 eV. Since the interfacial stability layer has the same characteristics as a gate insulating layer and a passivation layer, chemically high interface stability is maintained. Since the interfacial stability layer has a band gap equal to or greater than that of the active layer, charge trapping is physically prevented.

Abstract: An object is to provide a manufacturing method of a semiconductor device having a high field effect mobility and including an oxide semiconductor layer in a semiconductor device including an oxide semiconductor. Another object is to provide a manufacturing method of a semiconductor device capable of high speed operation. An oxide semiconductor layer is terminated by a halogen element, and thus an increase in the contact resistance between the oxide semiconductor layer and a conductive layer in contact with the oxide semiconductor layer is suppressed. Therefore, the contact resistance between the oxide semiconductor layer and the conductive layer becomes favorable and a transistor having a high field effect mobility can be manufactured.

Abstract: A thin film transistor (TFT) may include a channel layer, a source electrode, a drain electrode, a protective layer, a gate electrode, and/or a gate insulating layer. The channel layer may include an oxide semiconductor material. The source electrode and the drain electrode may face each other on the channel layer. The protective layer may be under the source electrode and the drain electrode and/or may cover the channel layer. The gate electrode may be configured to apply an electric field to the channel layer. The gate insulating layer may be interposed between the gate electrode and the channel layer.

Abstract: A method of manufacturing a semiconductor wafer of the present invention includes the steps of: obtaining a composite base by forming a base surface flattening layer having a surface RMS roughness of not more than 1.0 nm on a base; obtaining a composite substrate by attaching a semiconductor crystal layer to a side of the composite base where the base surface flattening layer is located; growing at least one semiconductor layer on the semiconductor crystal layer of the composite substrate; and obtaining the semiconductor wafer including the semiconductor crystal layer and the semiconductor layer by removing the base surface flattening layer by wet etching and thereby separating the semiconductor crystal layer from the base.

Abstract: An object is to provide a semiconductor device including a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics. An oxide semiconductor layer including SiOx is used in a channel formation region, and in order to reduce contact resistance with source and drain electrode layers formed using a metal material with low electric resistance, source and drain regions are provided between the source and drain electrode layers and the oxide semiconductor layer including SiOx. The source and drain regions are formed using an oxide semiconductor layer which does not include SiOx or an oxynitride film.

Abstract: Methods for fabricating a semiconductor substrate include forming a first substrate layer over a surface of a first semiconductor layer, and thermally spraying a second substrate layer on a side of the first substrate layer opposite the first semiconductor layer. At least one additional semiconductor layer is epitaxially grown over the first semiconductor layer on a side thereof opposite the first substrate layer. At least one of the first substrate layer and the second substrate layer may be formulated to exhibit a Coefficient of Thermal Expansion (CTE) closely matching a CTE of at least one of the first semiconductor layer and the at least one additional semiconductor layer. Semiconductor structures are fabricated using such methods.

Abstract: Substrates of GaN over silicon suitable for forming electronics devices such as heterostructure field effect transistors (HFETs), and methods of making the substrates, are disclosed. Voids in a crystalline Al2O3 film on a top surface of a silicon wafer are formed. The top surface of the silicon wafer is along the <111> silicon crystal orientation. A plurality of laminate layers is deposited over the voids and the Al2O3 film. Each laminate layer includes an AlN film and a GaN film. A transistor or other device may be formed in the top GaN film.

Abstract: A field-effect transistor includes a gate electrode, a source electrode, a drain electrode, a semiconductor active layer, and a dielectric layer. The semiconductor active layer is connected to the source electrode and the drain electrode. The dielectric layer includes denatured albumen and is positioned between the gate electrode and the semiconductor active layer.

Abstract: Transistors and methods of manufacturing the same. A transistor may be an oxide thin film transistor (TFT) with a self-aligned top gate structure. The transistor may include a gate insulating layer between a channel region and a gate electrode that extends from two sides of the gate electrode. The gate insulating layer may cover at least a portion of source and drain regions.

Abstract: An edge emitting solid state laser and method. The laser comprises at least one AlInGaN active layer on a bulk GaN substrate with a non-polar or semi-polar orientation. The edges of the laser comprise {1 1?2±6} facets. The laser has high gain, low threshold currents, capability for extended operation at high current densities, and can be manufactured with improved yield. The laser is useful for optical data storage, projection displays, and as a source for general illumination.

Abstract: Provided are an oxide semiconductor and an oxide thin film transistor including the oxide semiconductor. The oxide semiconductor may be formed of an indium (In)-zinc (Zn) oxide in which hafnium (Hf) is contained, wherein In, Zn, and Hf are contained in predetermined or given composition ratios.

Abstract: The invention relates to a printable precursor comprising an organometallic zinc complex which contains at least one ligand from the class of the oximates and is free from alkali metals and alkaline-earth metals, for electronic components and to a preparation process. The invention furthermore relates to corresponding printed electronic components, preferably field-effect transistors.

Abstract: A metal oxide semiconductor transistor includes a gate, a metal oxide active layer, a gate insulating layer, a source, and a drain. The metal oxide active layer has a first surface and a second surface, and the first surface faces to the gate. The gate insulating layer is disposed between the gate and the metal oxide active layer. The source and the drain are respectively connected to the metal oxide active layer. The second surface defines a mobility enhancing region between the source and the drain. An oxygen content of the metal oxide active layer in the mobility enhancing region is less than an oxygen content of the metal oxide active layer in the region outside the mobility enhancing region. The metal oxide semiconductor transistor has high carrier mobility.

Abstract: An offset transistor and a non-offset transistor each including an oxide semiconductor are formed over one substrate. An oxide semiconductor layer, a gate insulator, and first layer wirings which serve as gate wirings are formed. After that, the offset transistor is covered with a resist and impurities are mixed into the oxide semiconductor layer, so that an n-type oxide semiconductor region is formed. Then, second layer wirings are formed. Through the above steps, the offset transistor and the non-offset transistor (e.g., aligned transistor) can be formed.

Abstract: The present invention provides a method for forming a multilayer substrate having a gallium nitride layer, wherein a mesh layer having a plurality of openings is formed on a substrate, and a buffer layer, three aluminum gallium nitride layers with different aluminum concentrations and a gallium nitride layer are formed in sequence on the substrate in the openings. The three aluminum gallium nitride layers with different aluminum concentrations are capable of releasing stress, decreasing cracks on the surface of the gallium nitride layer and controlling interior defects, such that the present invention provides a gallium nitride layer with larger area, greater thickness, no cracks and high quality for facilitating the formation of high performance electronic components in comparison with the prior art. The present invention further provides a multilayer substrate having a gallium nitride layer.

Abstract: The present invention relates to a method for producing an electronic component, in particular a field-effect transistor (FET), comprising at least one substrate, at least one dielectric, and at least one semiconducting metal oxide, wherein the dielectric or a precursor compound thereof based on organically modified silicon oxide compounds, in particular based on silsequioxanes and/or siloxanes, can be processed out of solution, and is thermally treated at a low temperature from room temperature to 350° C., and the semiconductive metal oxide, in particular ZnO or a precursor compound thereof, can also be processed from solution at a low temperature from room temperature to 350° C.

Abstract: There is provided a method for manufacturing a flexible semiconductor device. The method of the present invention comprises the steps of: (A) providing a metal foil; (B) forming an insulating layer on the metal foil, the insulating layer having a portion serving as a gate insulating film; (C) forming a supporting substrate on the insulating layer; (D) etching away a part of the metal foil to form a source electrode and a drain electrode therefrom; (E) forming a semiconductor layer in a clearance portion located between the source electrode and the drain electrode by making use of the source and drain electrodes as a bank member; and (F) forming a resin film layer over the insulating layer such that the resin film layer covers the semiconductor layer, the source electrode and the drain electrode. In the step (F), a part of the resin film layer interfits with the clearance portion located between the source and drain electrodes.

Abstract: The present invention provides semiconductor-on-diamond devices, and methods for the formation thereof. In one aspect, a mold is provided which has an interface surface configured to inversely match a configuration intended for the device surface of a diamond layer. An adynamic diamond layer is then deposited upon the diamond interface surface of the mold, and a substrate is joined to the growth surface of the adynamic diamond layer. At least a portion of the mold can then be removed to expose the device surface of the diamond which has received a shape which inversely corresponds to the configuration of the mold's diamond interface surface. The mold can be formed of a suitable semiconductor material which is thinned to produce a final device. Optionally, a semiconductor material can be coupled to the diamond layer subsequent to removal of the mold.

Abstract: Disclosed are a method for fabricating a quantum dot. The method includes the steps of (a) preparing a compound semiconductor layer including a quantum well structure formed by sequentially stacking a first barrier layer, a well layer and a second barrier layer; (b) forming a dielectric thin film pattern including a first dielectric thin film having a thermal expansion coefficient higher than a thermal expansion coefficient of the second barrier layer and a second dielectric thin film having a thermal expansion coefficient lower than the thermal expansion coefficient of the second barrier layer on the second barrier layer; and (c) heat-treating the compound semiconductor layer formed thereon with the dielectric thin film pattern to cause an intermixing between elements of the well layer and elements of the barrier layers at a region of the compound semiconductor layer under the second dielectric thin film.

Abstract: A thin film transistor using an oxide semiconductor as an active layer, and its method of manufacture. The thin film transistor includes: a substrate; an active layer formed of an oxide semiconductor; a gate insulating layer formed of a dielectric on the active layer, the dielectric having an etching selectivity of 20 to 100:1 with respect to the oxide semiconductor; a gate electrode formed on the gate insulating layer; an insulating layer formed on the substrate including the gate electrode and having contact holes to expose the active layer; and source and drain electrodes connected to the active layer through the contact holes. Since the source and drain electrodes are not overlapped with the gate electrode, parasitic capacitance between the source and drain electrodes and the gate electrode is minimized. Since the gate insulating layer is formed of dielectric having a high etching selectivity with respect to oxide semiconductor, the active layer is not deteriorated.

Abstract: A transistor including an oxide semiconductor with favorable electric characteristics and a manufacturing method thereof are provided. A semiconductor device includes a transistor. The transistor includes an oxide semiconductor film over a base insulating film, a gate electrode overlapping with the oxide semiconductor film with a gate insulating film interposed therebetween, and a pair of electrodes in contact with the oxide semiconductor film and serving as a source electrode and a drain electrode. The base insulating film includes a first oxide insulating film partly in contact with the oxide semiconductor film and a second oxide insulating film in the periphery of the first oxide insulating film. An end portion of the oxide semiconductor film which crosses the channel width direction of the transistor is located over the second oxide insulating film.

Abstract: It is an object to provide a memory device where an area occupied by a memory cell is small, and moreover, a memory device where an area occupied by a memory cell is small and a data holding period is long. A memory device includes a bit line, a capacitor, a first insulating layer provided over the bit line and including a groove portion, a semiconductor layer, a second insulating layer in contact with the semiconductor layer, and a word line in contact with the second insulating layer. Part of the semiconductor layer is electrically connected to the bit line in a bottom portion of the groove portion, and another part of the semiconductor layer is electrically connected to one electrode of the capacitor in a top surface of the first insulating layer.

Abstract: Provided is an oxide semiconductor film which has more stable electric characteristics and essentially consists of indium zinc oxide. In addition, provided is a highly reliable semiconductor device which has stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film essentially consisting of indium zinc oxide has a hexagonal crystal structure in which the a-b plane is substantially parallel to a surface of the oxide semiconductor film and a rhombohedral crystal structure in which the a-b plane is substantially parallel to the surface of the oxide semiconductor film.

Abstract: A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used. In a transistor using an oxide semiconductor film for an active layer, a microvoid is provided in a source region and a drain region adjacent to a channel region. By providing a microvoid in the source region and the drain region formed in an oxide semiconductor film, hydrogen contained in the channel region of an oxide semiconductor film can be captured in the microvoid.

Abstract: A semiconductor device includes an oxide semiconductor film including a pair of first regions, a pair of second regions, and a third region; a pair of electrodes in contact with the oxide semiconductor film; a gate insulating film over the oxide semiconductor film; and a gate electrode provided between the pair of electrodes with the gate insulating film interposed therebetween. The pair of first regions overlap with the pair of electrodes, the third region overlaps with the gate electrode, and the pair of second regions are formed between the pair of first regions and the third region. The pair of second regions and the third region each contain nitrogen, phosphorus, or arsenic. The pair of second regions have a higher element concentration than the third region.

Abstract: A method of manufacturing a semiconductor wafer of the present invention includes the steps of: obtaining a composite base by forming a base surface flattening layer having a surface RMS roughness of not more than 1.0 nm on a base; obtaining a composite substrate by attaching a semiconductor crystal layer to a side of the composite base where the base surface flattening layer is located; growing at least one semiconductor layer on the semiconductor crystal layer of the composite substrate; and obtaining the semiconductor wafer including the semiconductor crystal layer and the semiconductor layer by removing the base surface flattening layer by wet etching and thereby separating the semiconductor crystal layer from the base.

Abstract: A diode is described with a III-N material structure, an electrically conductive channel in the III-N material structure, two terminals, wherein a first terminal is an anode adjacent to the III-N material structure and a second terminal is a cathode in ohmic contact with the electrically conductive channel, and a dielectric layer over at least a portion of the anode. The anode comprises a first metal layer adjacent to the III-N material structure, a second metal layer, and an intermediary electrically conductive structure between the first metal layer and the second metal layer. The intermediary electrically conductive structure reduces a shift in an on-voltage or reduces a shift in reverse bias current of the diode resulting from the inclusion of the dielectric layer. The diode can be a high voltage device and can have low reverse bias currents.

Abstract: The present invention relates to a cell-based transparent sensor capable of the real-time optical observation of cell behavior, to a method for manufacturing same, and to a multi-detection sensor chip using same. More particularly, the present invention relates to a cell-based transparent sensor capable of the real-time optical observation of cell behavior, to a method for manufacturing same, and to a multi-detection sensor chip using same, wherein the sensor can sense the ionic concentration of an electrolyte in accordance with the variation in the metabolic activity of cells using an ion-selective field effect transistor (ISFET) sensor and an electrochemical sensor, and the sensor is made of a transparent material which enables real-time observations of optical phenomenon for measurement of cell behavior.

Abstract: A conductive film to be a gate electrode, a first insulating film to be a gate insulating film, a semiconductor film in which a channel region is formed, and a second insulating film to be a channel protective film are successively formed. With the use of a resist mask formed by performing light exposure with the use of a photomask which is a multi-tone mask and development, i) in a region without the resist mask, the second insulating film, the semiconductor film, the first insulating film, and the conductive film are successively etched, ii) the resist mask is made to recede by ashing or the like and only the region of the resist mask with small thickness is removed, so that part of the second insulating film is exposed, and iii) the exposed part of the second insulating film is etched, so that a pair of opening portions is formed.

Abstract: A semiconductor device according to an exemplary embodiment comprises a substrate, a middle layer comprising a first semiconductor layer disposed on the substrate and comprising AlxGa1-xN (0?x?1) doped with a first dopant and a second semiconductor layer disposed on the first semiconductor layer and comprising undoped gallium nitride (GaN) and a drive unit disposed on the second semiconductor layer.

Abstract: A p-type group II-VI semiconductor may include a group IV element as a dopant. The group II-IV semiconductor may be Zn1-a-b-cMgaCdbBecO1-p-qSpSeq, wherein a=0˜1, b=0˜1, c=0˜1, p=0˜1 and q=0˜1.

Abstract: The present invention provides semiconductor-on-diamond devices, and methods for the formation thereof. In one aspect, a mold is provided which has an interface surface configured to inversely match a configuration intended for the device surface of a diamond layer. An adynamic diamond layer is then deposited upon the diamond interface surface of the mold, and a substrate is joined to the growth surface of the adynamic diamond layer. At least a portion of the mold can then be removed to expose the device surface of the diamond which has received a shape which inversely corresponds to the configuration of the mold's diamond interface surface. The mold can be formed of a suitable semiconductor material which is thinned to produce a final device. Optionally, a semiconductor material can be coupled to the diamond layer subsequent to removal of the mold.