Abstract: In a thin-film transistor substrate including a substrate, a thin-film transistor semiconductor layer, a source/drain electrode, and a transparent pixel electrode, the source/drain electrode includes a thin film of an aluminum alloy containing 0.1 to 6 atomic percent of nickel as an alloy element, and the aluminum alloy thin film is directly connected to the thin-film transistor semiconductor layer.

Abstract: A system performs a method including contact printing one of a wetting agent and a non-wetting agent on a semiconductor and inkjet printing an electrically conductive material proximate said one of the wetting agent and the non-wetting agent.

Abstract: A TFT array substrate includes: a gate electrode connected to a gate line; a source electrode connected to a data line crossing the gate line to define a pixel region; a drain electrode which is opposite to the source electrode with a channel in between; a semiconductor layer defining the channel between the source electrode and the drain electrode; a pixel electrode in the pixel region and connected to the drain electrode; a channel passivation layer on the channel of the semiconductor layer; a gate pad extending from the gate line, where a semiconductor pattern and a transparent conductive pattern are formed; a data pad connected to the data line, where the transparent conductive pattern is formed; and a gate insulating layer formed under the semiconductor layer, the gate line and the gate pad, and the data line and the data pad.

Abstract: Source and drain extension regions and source side halo region and drain side halo region are formed in a top semiconductor layer aligned with a gate stack on an SOI substrate. A deep source region and a deep drain region are formed asymmetrically in the top semiconductor layer by an angled ion implantation. The deep source region is offset away from one of the outer edges of the at least spacer to expose the source extension region on the surface of the semiconductor substrate. A source metal semiconductor alloy is formed by reacting a metal layer with portions of the deep source region, the source extension region, and the source side halo region. The source metal semiconductor alloy abuts the remaining portion of the source side halo region, providing a body contact tied to the deep source region to the partially depleted SOI MOSFET.

Abstract: In a light emitting device using a light emitting element, the invention provides a sealing structure capable of preventing ingress of moisture from the outside and obtaining adequate reliability. The light emitting device has a light emitting element comprising a light emitting layer formed between a first electrode and a second electrode and a pixel portion comprising the light emitting element. The entire surface of the pixel portion is covered with the second electrode. An impermeable insulating film is formed in contact with the first electrode of the light emitting element. The edge of the first electrode and the impermeable insulating film are covered with a partition wall. An opening is formed along the circumference of the pixel portion in the partition wall. The opening passes through the partition wall in the thickness direction, and the side wall and the bottom face thereof are covered with the second electrode.

Abstract: A thin film transistor including: an active layer on a substrate, the active layer having at least two unit channels; and source and drain electrodes on the active layer, wherein an interval D between each of the channels is larger than a unit channel width W.

Abstract: A gate wire including a gate line and a gate electrode is formed on a substrate and a gate insulating layer is formed on the substrate. A semiconductor pattern and an etching assistant pattern are formed on the gate insulating layer and a source/drain conductor pattern and an etching assistant layer are formed on the semiconductor pattern and the etching assistant pattern. A data wire including a data line and source and drain electrodes separated from each other is formed by removing the etching assistant layer and partly removing the source/drain conductor pattern. A pixel electrode connected to the drain electrodes is formed.

Abstract: The present invention provides a TFT array panel and a manufacturing method of the same, which has signal lines including a lower layer of an Al containing metal and an upper layer of a molybdenum alloy (Mo-alloy) comprising molybdenum (Mo) and at least one of niobium (Nb), vanadium (V), and titanium (Ti). Accordingly, undercut, overhang, and mouse bites which may arise in an etching process, are prevented, and TFT array panels that have signal lines having low resistivity and good contact characteristics are provided.

Abstract: A slit forming process with respect to a coated film, includes: forming a step pattern having an end part on a substrate; coating a liquid material for forming a coated film on the substrate in the manner of covering at least the end part of the step pattern; and forming the coated film by drying the coated liquid material, together with forming a slit at a position corresponding to the end part of the step pattern.

Abstract: A thin film transistor including: an active layer on a substrate, the active layer having at least two unit channels; and source and drain electrodes on the active layer, wherein an interval D between each of the channels is larger than a unit channel width W.

Abstract: A liquid crystal display device includes a substrate, a gate electrode disposed on the substrate, a gate pad disposed on the substrate, an insulating film disposed on the gate electrode and the gate pad, an active layer disposed on the insulating film above the gate electrode, an ohmic contact layer disposed on portions of the active layer, a source electrode and a drain electrode disposed on the ohmic contact layer, a passivation layer disposed on the source and drain electrodes, a pixel electrode disposed on the passivation layer and contacting the drain electrode, and a transparent electrode disposed on the passivation layer and contacts the gate pad, wherein the gate electrode and the gate pad both include a first layer formed of a first metal and a second layer formed of an alloy of the first metal and a second metal disposed at an upper surface of the first layer.

Abstract: An exemplary photomask (150) has a slit. The slit has at least one turning region (D1) and at least one other regions, and the slit at the at least one turning region has a narrower width than the slit at the at least one other regions. An exemplary method for manufacturing a thin film transistor (TFT) using the photomask is also provided.

Abstract: A Schottky junction is formed at the connection between an SOI layer and a contact (namely, under an element isolation insulating film) without forming a P+ region with a high impurity concentration thereat. The surface of a body contact is provide with a barrier metal. A silicide is formed between the body contact and the SOI layer as a result of the reaction of the barrier metal and the SOI layer.

Abstract: A process is disclosed for in-situ fabricating a semiconductor component imbedded in a substrate. A substrate is ablated with a first laser beam to form a void therein. A first conductive element is formed in the void of the substrate with a second laser beam. A semiconductor material is deposited upon the first conductive element with a third laser beam operating in the presence of a depositing atmosphere. A second conductive element is formed on the first semiconductor material with a fourth laser beam. The process may be used for fabricating a Schottky barrier diode or a junction field effect transistor and the like.

Abstract: A flexible electronic device excellent in heat liberation characteristics and toughness and a production method for actualizing thereof in low cost and with satisfactory reproducibility are provided. A protection film is adhered onto the surface of a substrate on which surface a thin film device is formed. Successively, the substrate is soaked in an etching solution to be etched from the back surface thereof so as for the residual thickness of the substrate to fall within the range larger than 0 ?m and not larger than 200 ?m. Then, a flexible film is adhered onto the etched surface of the substrate, and thereafter the protection film is peeled to produce a flexible electronic device.

Abstract: In accordance with the invention, there are various methods of making an integrated circuit comprising a bipolar transistor. According to an embodiment of the invention, the bipolar transistor can comprise a substrate, a collector comprising a plurality of alternating doped regions, wherein the plurality of alternating doped regions alternate in a lateral direction from a net first conductivity to a net second conductivity, and a collector contact in electrical contact with the collector. The bipolar transistor can also comprise a heavily doped buried layer below the collector, a base in electrical contact with a base contact, wherein the base is doped to a net second conductivity type and wherein the base spans a portion of the plurality of alternating doped regions, and an emitter disposed within the base, the emitter doped to a net first conductivity, wherein a portion of the alternating doped region under the emitter is doped to a concentration of less than about 3×1012 cm?2.

Abstract: A flexible electronic device excellent in heat liberation characteristics and toughness and a production method for actualizing thereof in low cost and with satisfactory reproducibility are provided. A protection film is adhered onto the surface of a substrate on which surface a thin film device is formed. Successively, the substrate is soaked in an etching solution to be etched from the back surface thereof so as for the residual thickness of the substrate to fall within the range larger than 0 ?m and not larger than 200 ?m. Then, a flexible film is adhered onto the etched surface of the substrate, and thereafter the protection film is peeled to produce a flexible electronic device.

Abstract: There is disclosed a method of fabricating TFTs having reduced interconnect resistance by having improved contacts to source/drain regions. A silicide layer is formed in intimate contact with the source/drain regions. The remaining metallization layer is selectively etched to form a contact pad or conductive interconnects.

Abstract: There is provided a semiconductor device having TFTs whose thresholds can be controlled. There is provided a semiconductor device including a plurality of TFTs having a back gate electrode, a first gate insulation film, a semiconductor active layer a second gate insulation film and a gate electrode, which are formed on a substrate, wherein an arbitrary voltage is applied to the back gate electrode.

Abstract: The present invention provides a method of forming a TFT and a reflective electrode having recesses or projections with reduced manufacturing cost and a reduced number of manufacturing steps, and provides a liquid crystal display device to which the method is applied. A photosensitive film 8 is formed on a metal film 7. Then, remaining portions 81, 82 and 83 are formed from the photosensitive film 8. Then, the metal film 7 is etched by using the remaining portions 81, 82 and 83 as masks. And then, a photosensitive film 9 and a reflective electrode film 10 are formed without removing the remaining portions 81, 82 and 83.

Abstract: A thin film transistor array including a substrate, a plurality of scan lines, a plurality of data lines, a plurality of thin film transistors, an etch barrier layer and a plurality of pixel electrodes is provided. The scan lines and the data lines are disposed over the substrate to define a plurality of pixel areas. Each thin film transistor is disposed in one of the pixel areas and driven by the corresponding scan line and data line. The etch barrier layer including a plurality openings is disposed over the scan line or a common line. Each pixel electrode electrically connected to the corresponding thin film transistor is disposed in one of the pixel areas, wherein a portion of each pixel electrode is coupled to the corresponding scan line through one of the openings to form a storage capacitor. Furthermore, a fabricating method of the thin film array is also provided.

Abstract: A thin film transistor device reduced substantially in resistance between the source and the drain by incorporating a silicide film, which is fabricated by a process comprising forming a gate insulator film and a gate contact on a silicon substrate, anodically oxidizing the gate contact, covering an exposed surface of the silicon semiconductor with a metal, and irradiating an intense light such as a laser beam to the metal film either from the upper side or from an insulator substrate side to allow the metal coating to react with silicon to obtain a silicide film. The metal silicide layer may be obtained otherwise by tightly adhering a metal coating to the exposed source and drain regions using an insulator formed into an approximately triangular shape, preferably 1 ?m or less in width, and allowing the metal to react with silicon. A high performance TFT can be realized.