Abstract: A tunable MEMS device and a method of manufacturing a tunable MEMS device are disclosed. In accordance with an embodiment of the present invention, a semiconductor device comprises a substrate, a moveable electrode and a counter electrode. The moveable electrode or the counter electrode comprises a first region and a second region, wherein the first region is isolated from the second region, wherein the first region is configured to be tuned, wherein the second region is configured to provide a sensing signal or control a system, and wherein the moveable electrode and the counter electrode are mechanically connected to the substrate.

Abstract: A package for electronic component comprises a rectangular package body having a flat cut surface to be abutted on a flat mounting surface of a mounting substrate, a first side surface intersecting with the flat cut surface, and a first notch part formed at a boundary between the flat cut surface and the first side surface, an electronic component installed in the package body, and a first pad electrically connected to the electronic component and formed on an inner wall surface of the first notch part.

Abstract: A method is described for manufacturing a micromechanical component. The method includes providing a first substrate, forming a first connecting structure on the first substrate, and forming a microstructure on the first substrate after forming the first connecting structure. The microstructure has at least one movable functional element. The method further includes providing a second substrate having a second connecting structure, and joining the first and second substrates by carrying out a bonding process, the first and second connecting structures being joined to form a common connecting structure, and a sealed cavity being formed in the region of the microstructure. The method provides that the first connecting structure takes the form of a buried connecting structure extending up to an upper surface of the first substrate. Also described is a related micromechanical component.

Abstract: A field effect transistor includes two channel connection regions, a control region with at least two control sections, an active region that is formed as a projection of a mono crystalline substrate disposed between the channel connection regions and between two control region sections, and insulating regions that are electrically insulating and are disposed between the control region sections and the active region. The projection is isolated from the substrate at a base by an insulating material that is electrically insulating. The insulating material ends laterally at the projection in the mono crystalline substrate.

Abstract: A hermetic microelectromechanical system (MEMS) package includes a CMOS MEMS chip and a second substrate. The CMOS MEMS Chip has a first substrate, a structural dielectric layer, a CMOS circuit and a MEMS structure. The structural dielectric layer is disposed on a first side of the first structural substrate. The structural dielectric layer has an interconnect structure for electrical interconnection and also has a protection structure layer. The first structural substrate has at least a hole. The hole is under the protection structure layer to form at least a chamber. The chamber is exposed to the environment in the second side of the first structural substrate. The chamber also comprises a MEMS structure. The second substrate is adhered to a second side of the first substrate over the chamber to form a hermetic space and the MEMS structure is within the space.

Abstract: A dual-suspension system for MEMS-based devices includes a proof mass, an upper spring system, and a lower spring system. The proof mass is formed from a handle wafer, a first layer of silicon coupled to one side of the handle wafer, and a second layer of silicon coupled to the other side of the handle wafer. The upper spring system is formed from the first layer of silicon and the lower spring system is formed from the second layer of silicon. The upper and lower spring systems comprise one or more springs extending from the proof mass. The springs may be spaced at even intervals along the perimeter of the proof mass, may be symmetric or out of phase with each other, may comprise different geometries, and may be curved in shape. The upper and lower spring systems are coupled to a support structure that surrounds the proof mass.

Abstract: A method for manufacturing a micromechanical component is proposed. In this context, at least one trench structure having a depth less than the substrate thickness is to be produced in a substrate. In addition, an insulating layer and a filler layer are produced or applied on a first side of the substrate. The filler layer comprises a filler material that substantially fills up the trench structure. A planar first side of the substrate is produced by way of a subsequent planarization within a plane of the filler layer or of the insulating layer or of the substrate. A further planarization of the second side of the substrate is then accomplished. A micromechanical component that is manufactured in accordance with the method is also described.

Abstract: An integrated circuit structure includes a substrate having a top surface; a first conductive layer over and contacting the top surface of the substrate; a dielectric layer over and contacting the first conductive layer, wherein the dielectric layer includes an opening exposing a portion of the first conductive layer; and a proof-mass in the opening and including a second conductive layer at a bottom of the proof-mass. The second conductive layer is spaced apart from the portion of the first conductive layer by an air space. Springs anchor the proof-mass to portions of the dielectric layer encircling the opening. The springs are configured to allow the proof-mass to make three-dimensional movements.

Abstract: A phase change memory device is provided. The phase change memory device comprises a substrate. An electrode layer is on the substrate. A phase change memory structure is on the electrode layer and electrically connected to the electrode layer, wherein the phase change memory structure comprises a cup-shaped heating electrode on the electrode layer. An insulating layer is on the cup-shaped heating electrode along a first direction covering a portion of the cup-shaped heating electrode. An electrode structure is on the cup-shaped heating electrode along a second direction covering a portion of the insulating layer and the cup-shaped heating electrode. A pair of double spacers is on a pair of sidewalls of the electrode structure covering a portion of the cup-shaped heating electrode, wherein the double spacer comprises a phase change material spacer and an insulating material spacer on a sidewall of the phase change material spacer.

Abstract: A phase-change memory device in which a phase-change material layer has a multilayered structure with different compositions and a method of fabricating the same are provided. The phase-change memory device includes a first electrode layer formed on a substrate, a heater electrode layer formed on the first electrode layer, an insulating layer formed on the heater electrode layer and having a pore partially exposing the heater electrode layer, a phase-change material layer formed to fill the pore and partially contacting the heater electrode layer, and a second electrode layer formed on the phase-change material layer.

Abstract: A package is made of a transparent substrate having an interferometric modulator and a back plate. A non-hermetic seal joins the back plate to the substrate to form a package, and a desiccant resides inside the package. A method of packaging an interferometric modulator includes providing a transparent substrate and manufacturing an interferometric modulator array on a backside of the substrate. A back plate includes a curved portion relative to the substrate. The curved portion is substantially throughout the back plate. The back plate is sealed to the backside of the substrate with a back seal in ambient conditions, thereby forming a package.

Abstract: A method for fabricating a dual-suspension system for MEMS-based devices includes: etching the geometry of an upper spring system, a lower spring system, and a proof mass into a substrate; applying a protective barrier to cover at least the exposed portions of the first layer of silicon; etching through portions of the protective barrier and handle wafer to define the shapes of the upper spring system, lower spring system, and proof mass; removing the remainder of the protective barrier; and removing the first layer of oxide from the areas in contact with the upper spring system and removing the second layer of oxide from the areas in contact with the lower spring system. Electrical contacts may be created on the substrate. A wafer may be bonded to the support structure on a side of the substrate. A MEMS-based device fabricated from the method is also provided.

Abstract: The present invention relates to a nonvolatile memory such as, for example a ROM or an EPROM, in which the information density of the memory is increased relative to a conventional nonvolatile memory that includes two logic state devices. Specifically, the nonvolatile memory of the present invention includes a SiN/TaN/SiN thin film resistor embedded within a material having a thermal conductivity of about 1 W/m-K or less; and a non-linear Si-containing device coupled to the resistor. Read and write circuits and operations are also provided in the present application.

Abstract: An HCCD includes a channel 21 that transfers electric charges in an X direction, a channel 25 that transfers the electric charges in a Z1 direction, a channel 23 that transfers the electric charges in a Z2 direction, and a channel 22 that connects the channels 23, 25 to the channel 21. The following relation is satisfied in impurity concentration of the channels: channel 21 channel 22 channel 23, 25. A fixed DC voltage is applied to branch electrodes 12a, 12b above the channel 22. The channel 22 has protrusion portions 19 that protrude inward from an outer circumference, which connects T1 and T2, and an outer circumference, which connects T3 and T4. The protrusion portions 19 causes charges below the transfer electrode 11b to move near the center of the channel 22 in a Y direction. Thereby, the travel distance of the charges in the channel 22 is reduced.

Abstract: A gate including a conductive buffer layer and a conductive layer is provided. The conductive buffer layer is disposed on a gate dielectric layer, and the average grain size of the conductive buffer layer is less than 100 nm. The conductive layer is disposed on the conductive buffer layer, and the average grain size of the conductive layer is greater than or equal to 100 nm. The disposition of the conductive buffer layer reduces the undesired effect caused by noise and dark current to the performance of the device.

Abstract: The present invention relates to a nonvolatile memory such as, for example a ROM or an EPROM, in which the information density of the memory is increased relative to a conventional nonvolatile memory that includes two logic state devices. Specifically, the nonvolatile memory of the present invention includes a SiN/TaN/SiN thin film resistor embedded within a material having a thermal conductivity of about 1 W/m-K or less; and a non-linear Si-containing device coupled to the resistor. Read and write circuits and operations are also provided in the present application.

Abstract: Disclosed is a semiconductor device comprising a semiconductor substrate, a gate electrode, a first insulating film formed between the semiconductor substrate and the gate electrode, and a second insulating film formed along a top surface or a side surface of the gate electrode and including a lower silicon nitride film containing nitrogen, silicon and hydrogen and an upper silicon nitride film formed on the lower silicon nitride film and containing nitrogen, silicon and hydrogen, and wherein a composition ratio N/Si of nitrogen (N) to silicon (Si) in the lower silicon nitride film is higher than that in the upper silicon nitride film.