Point Contact Diode (epo) Patents (Class 257/E29.333)
  • Patent number: 8866176
    Abstract: A structure of an EL display device which has an increased display area is provided. Further, a structure of an EL display device which has a high definition display is provided. An auxiliary electrode is formed over a first partition and side surfaces of the auxiliary electrode are covered with a second partition. A top surface of the auxiliary electrode is in contact with the conductive film which is one electrode of a light-emitting element and has a light-transmitting property, which enables a large-area display. Further, even the distance between the adjacent light-emitting elements is shortened, the auxiliary electrode can be provided between the adjacent light-emitting elements, which enables a high definition display.
    Type: Grant
    Filed: May 6, 2013
    Date of Patent: October 21, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiharu Hirakata, Shunpei Yamazaki, Hideaki Kuwabara
  • Patent number: 8860159
    Abstract: A spintronic electronic apparatus having a multilayer structure. The apparatus includes a substrate, having disposed in succession upon the substrate; a bottom interface layer; a pinned layer; a tunneling barrier; a free layer; and a top interface layer, wherein the apparatus operates as a non-resonant magnetic tunnel junction in a large amplitude, out-of-plane magnetization precession regime having weakly current dependent, large diode volt-watt sensitivity when external microwave signals that exceed a predetermined threshold current and have a frequency that is lower than a predetermined level excite the magnetization precession.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: October 14, 2014
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Thomas J. Meitzler, Elena N. Bankowski, Michael Nranian, Ilya N. Krivorotov, Andrei N. Slavin, Vasyl S. Tyberkevych
  • Patent number: 8853682
    Abstract: Self-aligning fabrication methods for forming memory access devices comprising a doped chalcogenide material. The methods may be used for forming three-dimensionally stacked cross point memory arrays. The method includes forming an insulating material over a first conductive electrode, patterning the insulating material to form vias that expose portions of the first conductive electrode, forming a memory access device within the vias of the insulating material and forming a memory element over the memory access device, wherein data stored in the memory element is accessible via the memory access device. The memory access device is formed of a doped chalcogenide material and formed using a self-aligned fabrication method.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: October 7, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Neil Greeley, Gurtej Sandhu, John Smythe, Bhaskar Srinivasan
  • Patent number: 8686411
    Abstract: Self-aligning fabrication methods for forming memory access devices comprising a doped chalcogenide material. The methods may be used for forming three-dimensionally stacked cross point memory arrays. The method includes forming an insulating material over a first conductive electrode, patterning the insulating material to form vias that expose portions of the first conductive electrode, forming a memory access device within the vias of the insulating material and forming a memory element over the memory access device, wherein data stored in the memory element is accessible via the memory access device. The memory access device is formed of a doped chalcogenide material and formed using a self-aligned fabrication method.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: April 1, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Neil Greeley, Bhaskar Srinivasan, Gurtej Sandhu, John Smythe
  • Patent number: 8212327
    Abstract: The present disclosure provides systems and methods for configuring and constructing a single photo detector or array of photo detectors with all fabrications circuitry on a single side of the device. Both the anode and the cathode contacts of the diode are placed on a single side, while a layer of laser treated semiconductor is placed on the opposite side for enhanced cost-effectiveness, photon detection, and fill factor.
    Type: Grant
    Filed: August 9, 2010
    Date of Patent: July 3, 2012
    Assignee: SiOnyx, Inc.
    Inventors: Neal T. Kurfiss, James E. Carey, Xia Li
  • Patent number: 8178942
    Abstract: An electrically alterable circuit (EAC), suitable for use in an integrated circuit, includes a first interconnect, a link element, and a second interconnect. A first set of interconnect vias provides an electrically conductive connection between the first interconnect and a first end of the link element; A second set of interconnect vias provides an electrically conductive connection between the second interconnect and a second end of the link element. The EAC further includes a third interconnect and a one or more fuse vias that provide an electrical connection between the third interconnect and the link element. A conductance of the one or more fuse vias is less than a conductance of the first set of interconnect vias, a conductance of the second set of interconnect vias, or both.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: May 15, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Mark E. Schlarmann