Schottky Diode (epo) Patents (Class 257/E29.338)
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Publication number: 20080308838Abstract: In an embodiment, a integrated semiconductor device includes a first Vertical Junction Field Effect Transistor (VJFET) having a source, and a gate disposed on each side of the first VJFET source, and a second VJFET transistor having a source, and a gate disposed on each side of the second VJFET source. At least one gate of the first VJFET is separated from at least one gate of the second VJFET by a channel. The integrated semiconductor device also includes a Junction Barrier Schottky (JBS) diode positioned between the first and second VJFETs. The JBS diode comprises a metal contact that forms a rectifying contact to the channel and a non-rectifying contact to at least one gate of the first and second VJFETs, and the metal contact is an anode of the JBS diode.Type: ApplicationFiled: June 13, 2007Publication date: December 18, 2008Inventors: Ty R. McNutt, Eric J. Stewart, Rowland C. Clarke, Ranbir Singh, Stephen Van Campen, Marc E. Sherwin
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Patent number: 7462860Abstract: An electrical device in which an interface layer is disposed between and in contact with a metal and a Si-based semiconductor, the interface layer being of a thickness effective to depin of the Fermi level of the semiconductor while still permitting current to flow between the metal and the semiconductor. The interface layer may include a layer of a passivating material (e.g., made from nitrogen, oxygen, oxynitride, arsenic, hydrogen and/or fluorine) and sometimes also includes a separation layer. In some cases, the interface layer may be a monolayer of a semiconductor passivating material. The interface layer thickness corresponds to a minimum specific contact resistance of less than or equal to 10 ?-?m2 or even less than or equal to 1 ?-?m2 for the electrical device.Type: GrantFiled: July 13, 2005Date of Patent: December 9, 2008Assignee: Acorn Technologies, Inc.Inventors: Daniel E. Grupp, Daniel J. Connelly
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Publication number: 20080296722Abstract: A junction barrier Schottky diode has an N-type well having surface and a first impurity concentration; a p-type anode region in the surface of the well, and having a second impurity concentration; and an N-type cathode region in the surface of the well and horizontally abutting the anode region, and having a third impurity concentration. A first N-type region vertically abuts the anode and cathode regions, and has a fourth impurity concentration. An ohmic contact is made to the anode and a Schottky contact is made to the cathode. The fourth impurity concentration is less than the first, second and third impurity concentrations.Type: ApplicationFiled: April 22, 2008Publication date: December 4, 2008Applicant: Intersil Americas Inc.Inventors: Dev Alok Girdhar, Michael David Church
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Publication number: 20080299751Abstract: In one embodiment, a Schottky diode is formed on a semiconductor substrate with other semiconductor devices and is also formed with a high breakdown voltage and a low forward resistance.Type: ApplicationFiled: June 1, 2007Publication date: December 4, 2008Inventors: Mohammed Tanvir Quddus, Shanghui L. Tu, Antonin Rozsypal
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Publication number: 20080251793Abstract: A junction barrier Schottky (JBS) rectifier device and a method of making the device are described. The device comprises an epitaxially grown first n-type drift layer and p-type regions forming p+-n junctions and self-planarizing epitaxially over-grown second n-type drift regions between and, optionally, on top of the p-type regions. The device may include an edge termination structure such as an exposed or buried P+ guard ring, a regrown or implanted junction termination extension (JTE) region, or a “deep” mesa etched down to the substrate. The Schottky contact to the second n-type drift region and the ohmic contact to the p-type region together serve as an anode. The cathode can be formed by ohmic contact to the n-type region on the backside of the wafer. The devices can be used in monolithic digital, analog, and microwave integrated circuits.Type: ApplicationFiled: June 26, 2008Publication date: October 16, 2008Applicant: SemiSouth Laboratories, Inc.Inventors: Michael S. MAZZOLA, Lin CHENG
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Patent number: 7436039Abstract: A gallium nitride based semiconductor Schottky diode fabricated from a n+ doped GaN layer having a thickness between one and six microns disposed on a sapphire substrate; an n? doped GaN layer having a thickness greater than one micron disposed on said n+ GaN layer patterned into a plurality of elongated fingers and a metal layer disposed on the n? doped GaN layer and forming a Schottky junction therewith. The layer thicknesses and the length and width of the elongated fingers are optimized to achieve a device with breakdown voltage of greater than 500 volts, current capacity in excess of one ampere, and a forward voltage of less than three volts.Type: GrantFiled: January 6, 2005Date of Patent: October 14, 2008Assignee: Velox Semiconductor CorporationInventors: TingGang Zhu, Bryan S. Shelton, Marek K. Pabisz, Mark Gottfried, Linlin Liu, Milan Pophristic, Michael Murphy, Richard A. Stall
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Publication number: 20080246096Abstract: A semiconductor device includes a substrate, a plurality of first columns having a first conductivity type, a plurality of second columns having a second conductivity type, a first electrode, and a second electrode. The first columns and the second columns are alternately arranged on the substrate to provide a super junction structure. The first electrode is disposed on the super junction structure, forms schottky junctions with the first columns, and forms ohmic junctions with the second columns. The second electrode is disposed on the substrate on an opposite side of the super junction structure. At least a part of the substrate and the super junction structure has lattice defects to provide a lifetime control region at which a lifetime of a minority carrier is controlled to be short.Type: ApplicationFiled: March 31, 2008Publication date: October 9, 2008Applicant: DENSO CORPORATIONInventors: Jun Sakakibara, Hitoshi Yamaguchi
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Patent number: 7432579Abstract: A MOS field-effect transistor includes a semiconductor substrate of a first-conductivity type, a semiconductor layer of the first-conductivity type, a source region of a second-conductivity type, a first drain region of the second-conductivity type, a resurf layer of the second-conductivity type provided in the surface of the semiconductor layer between the source region and the first drain region in contact with the first drain region, and having a lower impurity concentration than the first drain region, a gate insulation film, and a gate electrode provided on the gate insulation film between the source region and resurf layer. A Schottky barrier diode includes a second drain region of the second-conductivity type provided in the surface of the semiconductor layer separate from the first drain region in a direction away from the gate electrode, and a Schottky electrode provided on the semiconductor layer between the first and second drain regions.Type: GrantFiled: October 7, 2004Date of Patent: October 7, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Tomoko Matsudai, Kazutoshi Nakamura, Akio Nakagawa
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Publication number: 20080230804Abstract: A semiconductor device having an electrode with reduced electrical contact resistance even where either electrons or holes are majority carriers is disclosed. This device has an n-type diffusion layer and a p-type diffusion layer in a top surface of a semiconductor substrate. The device also has first and second metal wires patterned to overlie the n-type and p-type diffusion layers, respectively, with a dielectric layer interposed therebetween, a first contact electrode for electrical connection between the n-type diffusion layer and the first metal wire, and a second contact electrode for connection between the p-type diffusion layer and the second metal wire. The first contact electrode's portion in contact with the n-type diffusion layer and the second contact electrode's portion contacted with the p-type diffusion layer are each formed of a first conductor that contains a metal and a second conductor containing a rare earth metal.Type: ApplicationFiled: February 25, 2008Publication date: September 25, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yoshifumi Nishi, Takashi Yamauchi, Yoshinori Tsuchiya, Junji Koga
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Publication number: 20080211052Abstract: A method for fabricating a field effect transistor includes: forming an insulating film provided on a semiconductor layer, the insulating film having an opening via which a surface of the semiconductor layer is exposed and including silicon oxide; forming a Schottky electrode on the insulating film and in the opening, the Schottky electrode having an overhang portion and having a first contact layer that is provided in a region contacting the insulating film and contains oxygen, and a second contact layer that is provided on the first contact layer and contains a smaller content of oxygen than that of the first contact layer; and removing the insulating film by a solution including hydrofluoric acid.Type: ApplicationFiled: February 7, 2008Publication date: September 4, 2008Applicant: EUDYNA DEVICES INC.Inventors: Tadashi WATANABE, Hajime MATSUDA
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Patent number: 7408212Abstract: An electrically programmable, non-volatile resistive memory includes an array of memory cells, a plurality of bit lines, and a plurality of word lines. Each memory cell comprises a resistive element and a Schottky diode coupled in series and having first and second terminals. Each bit line couples to the first terminal of all memory cells in a respective column of the array. Each word line couples to the second terminal of all memory cells in a respective row of the array. The resistive element for each memory cell may be formed with a film of a perovskite material (e.g., Pr0.7Ca0.3MnO3). The Schottky diode for each memory cell may be formed by a thin film of amorphous silicon. The films for the resistive element and Schottky diode for each memory cell may be stacked in a compact island at the cross point between a bit line and a word line.Type: GrantFiled: February 11, 2004Date of Patent: August 5, 2008Assignee: Winbond Electronics CorporationInventors: Harry S. Luan, Jein-Chen Young, Arthur Wang, Kai-Cheng Chou, Kenlin Huang
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Publication number: 20080179703Abstract: The structure for millimeter-wave frequency applications, includes a Schottky barrier diode (SBD) with a cutoff frequency (FC) above 1.0 THz formed on a SiGe BiCMOS wafer. A method is also contemplated for forming a Schottky barrier diode on a SiGe BiCMOS wafer, including forming a structure which provides a cutoff frequency (Fc) above about 1.0 THz. In embodiments, the structure which provides a cutoff frequency (Fc) above about 1.0 THz may include an anode having an anode area which provides a cutoff frequency (FC) above about 1.0 THz, an n-epitaxial layer having a thickness which provides a cutoff frequency (FC) above about 1.0 THz, a p-type guardring at an energy and dosage which provides a cutoff frequency (FC) above about 1.0 THz, the p-type guardring having a dimension which provides a cutoff frequency (FC) above about 1.0 THz, and a well tailor with an n-type dopant which provides a cutoff frequency (FC) above about 1.0 THz.Type: ApplicationFiled: September 12, 2007Publication date: July 31, 2008Inventors: Jeffrey B. Johnson, Xuefeng Liu, Bradley A. Orner, Robert M. Rassel
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Publication number: 20080169475Abstract: A semiconductor device includes a first-conductivity-type SiC substrate, a first-conductivity-type SiC semiconductor layer formed on the substrate, whose impurity concentration is lower than that of the substrate, a first electrode formed on the semiconductor layer and forming a Schottky junction with the semiconductor layer, a barrier height of the Schottky junction being 1 eV or less, plural second-conductivity-type junction barriers formed to contact the first electrode and each having a depth d1 from an upper surface of the semiconductor layer, a width w, and a space s between adjacent ones of the junction barriers, a second-conductivity-type edge termination region formed outside the junction barriers to contact the first electrode and having a depth d2 from the upper surface of the semiconductor layer, and a second electrode formed on the second surface of the substrate, wherein following relations are satisfied d1/d2?1, s/d1?0.6, and s/(w+s)?0.33.Type: ApplicationFiled: July 12, 2007Publication date: July 17, 2008Inventors: Johji Nishio, Takuma Suzuki, Chiharu Ota, Takashi Shinohe
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Patent number: 7391056Abstract: Electron-hole production at a Schottky barrier has recently been observed experimentally as a result of chemical processes. This conversion of chemical energy to electronic energy may serve as a basic link between chemistry and electronics and offers the potential for generation of unique electronic signatures for chemical reactions and the creation of a new class of solid state chemical sensors. Detection of the following chemical species was established: hydrogen, deuterium, carbon monoxide, molecular oxygen. The detector (1b) consists of a Schottky diode between an Si layer and an ultrathin metal layer with zero force electrical contacts.Type: GrantFiled: September 28, 2005Date of Patent: June 24, 2008Assignee: Adrena, Inc.Inventors: Eric W. McFarland, Henry W. Weinberg, Hermann Nienhaus, Howard S. Bergh, Brian Gergen, Arunava Mujumdar
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Patent number: 7388271Abstract: A method of forming a rectifying diode. The method comprises providing a first semiconductor region of a first conductivity type and having a first dopant concentration and forming a second semiconductor region in the first semiconductor region. The second semiconductor region has the first conductivity type and having a second dopant concentration greater than the first dopant concentration. The method also comprises forming a conductive contact to the first semiconductor region and forming a conductive contact to the second semiconductor region. The rectifying diode comprises a current path, and the path comprises: (i) the conductive contact to the first semiconductor region; (ii) the first semiconductor region; (iii) the second semiconductor region; and (iv) the conductive contact to the second semiconductor region. The second semiconductor region does not extend to a layer buried relative to the first semiconductor region.Type: GrantFiled: July 1, 2005Date of Patent: June 17, 2008Assignee: Texas Instruments IncorporatedInventors: Vladimir Drobny, Derek Robinson
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Publication number: 20080135969Abstract: The semiconductor device includes a first conductive type semiconductor substrate; a Schottky electrode forming a Schottky interface between a surface of the semiconductor substrate and itself; a leakage suppression structure, formed in a surface region of the semiconductor substrate, for suppressing a leakage current by generating a depletion layer when a reverse bias voltage is applied between the Schottky electrode and the semiconductor substrate; and a highly doped layer formed in the surface region of the semiconductor substrate in a region between the surface and the leakage suppression structure, the highly doped layer being the first conductive type, exhibiting a higher impurity concentration than the semiconductor substrate, and forming the Schottky interface between the Schottky electrode and itself.Type: ApplicationFiled: April 10, 2006Publication date: June 12, 2008Applicant: ROHM CO., LTDInventor: Kenichi Yoshimochi
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Publication number: 20080135970Abstract: High voltage schottky diodes are provided including a first conductivity type semiconductor substrate and a second conductivity type well region defined by the substrate. A first conductive film is provided on a surface of the substrate including the well. A conductive electrode is provided on at least one side of the first conductive film above the substrate including the well. An insulating film is provided between the conductive electrode and the substrate. A cathode contact region is provided outside the conductive electrode remote from the first conductive film. The cathode contact region is doped with high concentration impurities having a second conductive type.Type: ApplicationFiled: November 29, 2007Publication date: June 12, 2008Inventors: Yong-don Kim, Sun-hyun Kim, Jung-soo Yoo, Ji-hoon Cho, Seung-teck Lee
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Patent number: 7385271Abstract: Electro-hole production at a Schottky barrier has recently been observed experimentally as a result of chemical processes. This conversion of chemical energy to electronic energy may serve as a basic link between chemistry and electronics and offers the potential for generation of unique electronic signatures for chemical reactions and the creation of a new class of solide state chemical sensors. Detection of the following chemical species was established: hydrogen, deuterium, carbon monoxide, molecular oxygen. The detector (1b) consists of a Schottky diode between an Si layer and an ultrathin metal layer with zero force electrical contacts.Type: GrantFiled: April 29, 2005Date of Patent: June 10, 2008Assignee: Adrena, Inc.Inventors: Eric W. McFarland, Henry W. Weinberg, Hermann Nienhaus, Howard S. Bergh, Brian Gergen, Arunava Mujumdar
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Publication number: 20080128850Abstract: A semiconductor device (20) comprising a trench MOS barrier Schottky diode having an integrated PN diode and a method for manufacturing same are described.Type: ApplicationFiled: September 13, 2005Publication date: June 5, 2008Inventors: Alfred Goerlach, Ning Qu
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Publication number: 20080116538Abstract: A multigate Schottky diode comprising an electrically conducting active semiconductor region; first and second electrically connected metallic contact arms on the active semiconductor region forming ohmic contacts therewith; the ohmic contacts being spaced apart on the active semiconductor region to define a gate receiving channel therebetween. a plurality of electrically connected metallic gate fingers, the metallic gate fingers being in contact with the active semiconductor region to form Schottky junctions, the Schottky junctions being spaced apart on the active semiconductor region and extending at least partially along the gate receiving channel.Type: ApplicationFiled: November 21, 2007Publication date: May 22, 2008Applicant: FILTRONIC COMPOUND SEMICONDUCTORS LIMITEDInventors: Ronald Arnold, Dennis Michael Brookbanks
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Publication number: 20080116539Abstract: A Schottky device and a semiconductor process of making the same are provided. The Schottky device comprises a substrate, a deep well, a Schottky contact, and an Ohmic contact. The substrate is doped with a first type of ions. The deep well is doped with a second type of ions, and formed in the substrate. The Schottky contact contacts a first electrode with the deep well. The Ohmic contact contacts a second electrode with a heavily doped region with the second type of ions in the deep well. Wherein the deep well has a geometry gap with a width formed under the Schottky contact, the first type of ions and the second type of ions are complementary, and the width of the gap adjusts the breakdown voltage.Type: ApplicationFiled: November 17, 2006Publication date: May 22, 2008Applicant: System General CorporationInventors: Chiu-Chih Chiang, Chih-Feng Huang, You-Kuo Wu, Long Shih Lin
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Patent number: 7375407Abstract: A Schottky barrier diode includes a first semiconductor layer and a second semiconductor layer successively formed above a substrate; and a high-resistance region formed in the first semiconductor layer and the second semiconductor layer and having higher resistance than the first semiconductor layer and the second semiconductor layer. A Schottky electrode and an ohmic electrode spaced from each other are formed on the second semiconductor layer in a portion surrounded with the high-resistance region.Type: GrantFiled: November 14, 2005Date of Patent: May 20, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Manabu Yanagihara, Yasuhiro Uemoto, Tsuyoshi Tanaka, Daisuke Ueda
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Publication number: 20080105902Abstract: In the rectifier, a barrier layer and a channel layer constitute a heterojunction portion, and a two-dimensional electron gas channel is generated in the vicinity of a boundary between the channel layer and the barrier layer. A Schottky gate electrode is connected to an anode ohmic electrode and extends from above the anode ohmic electrode over to the barrier layer and a recess formed in the barrier layer is covered with the Schottky gate electrode. The two-dimensional electron gas channel located just below the recess is depleted by the influence of the Schottky gate electrode in a state in which there is no application voltage. By virtue of the formation of the recess in the barrier layer, the threshold voltage at which electrons are generated in the two-dimensional electron gas channel located just below the gate electrode is lowered, and the rise voltage can be made lower than that of the conventional Schottky diode.Type: ApplicationFiled: October 24, 2007Publication date: May 8, 2008Inventor: John Twynam
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Publication number: 20080067623Abstract: A structure and method of fabricating lateral diodes. The diodes include Schottky diodes and PIN diodes. The method of fabrication includes forming one or more doped regions and more trenches in a silicon substrate and forming metal silicides on the sidewalls of the trenches. The fabrication of lateral diodes may be integrated with the fabrication of field effect, bipolar and SiGe bipolar transistors.Type: ApplicationFiled: November 26, 2007Publication date: March 20, 2008Inventors: Douglas Coolbaugh, Jeffrey Johnson, Xuefeng Liu, Bradley Orner, Robert Rassel, David Sheridan
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Patent number: 7323402Abstract: A fabrication process for a trench Schottky diode with differential oxide thickness within the trenches includes forming a first nitride layer on a substrate surface and subsequently forming a plurality of trenches in the substrate including, possibly, a termination trench. Following a sacrificial oxide layer formation and removal, sidewall and bottom surfaces of the trenches are oxidized. A second nitride layer is then applied to the substrate and etched such that the second nitride layer covers the oxide layer on the trench sidewalls but exposes the oxide layer on the trench bottom surfaces. The trench bottom surfaces are then re-oxidized and the remaining second nitride layer then removed from the sidewalls, resulting in an oxide layer of varying thickness being formed on the sidewall and bottom surfaces of each trench. The trenches are then filled with a P type polysilicon, the first nitride layer removed, and a Schottky barrier metal applied to the substrate surface.Type: GrantFiled: January 14, 2005Date of Patent: January 29, 2008Assignee: International Rectifier CorporationInventor: Davide Chiola
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Patent number: 7276771Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.Type: GrantFiled: June 23, 2006Date of Patent: October 2, 2007Assignee: Fuji Electric Co., Ltd.Inventors: Tatsuhiko Fujihira, Yasushi Miyasaka
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Publication number: 20070222018Abstract: A method for forming a component of TMBS type having its periphery formed of a trench with insulated walls filled with a conductor, including the steps of depositing on a semiconductor substrate a thick layer of a first insulating material and a thin layer of a second material; simultaneously digging a peripheral trench and the trenches of the component; isotropically etching the first material so that a cap overhanging a recess remains; forming a thin insulating layer; and filling the trenches and said recess with a conductive material.Type: ApplicationFiled: March 2, 2007Publication date: September 27, 2007Applicant: STMicroelectronics S.A.Inventor: Patrick Poveda
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Patent number: 7274083Abstract: A wide bandgap semiconductor device with surge current protection and a method of making the device are described. The device comprises a low doped n-type region formed by plasma etching through the first epitaxial layer grown on a heavily doped n-type substrate and a plurality of heavily doped p-type regions formed by plasma etching through the second epitaxial layer grown on the first epitaxial layer. Ohmic contacts are formed on p-type regions and on the backside of the n-type substrate. Schottky contacts are formed on the top surface of the n-type region. At normal operating conditions, the current in the device flows through the Schottky contacts. The device, however, is capable of withstanding extremely high current densities due to conductivity modulation caused by minority carrier injection from p-type regions.Type: GrantFiled: May 2, 2006Date of Patent: September 25, 2007Assignee: Semisouth Laboratories, Inc.Inventors: Igor Sankin, Joseph Neil Merrett
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Patent number: 7238976Abstract: A Schottky barrier rectifier, in accordance with embodiments of the present invention, includes a first conductive layer and a semiconductor. The semiconductor includes a first doped region, a second doped region and a plurality of third doped regions. The second doped region is disposed between the first doped region and the first conductive layer. The plurality of third doped regions are disposed in the second doped region. The first doped region of the semiconductor is heavily doped with a first type of dopant (e.g., phosphorous or arsenic). The second doped region is moderately doped with the first type of dopant. The plurality of third doped regions are moderately to heavily doped with a second type of dopant.Type: GrantFiled: June 15, 2004Date of Patent: July 3, 2007Assignee: QSpeed Semiconductor Inc.Inventors: Ho-Yuan Yu, Chong-Ming Lin
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Publication number: 20070138502Abstract: A vertical thyristor adapted to an HF control, including a cathode region in a P-type base well, a lightly-doped P-type layer next to the base well, a lightly-doped N-type region in the lightly-doped P-type layer, a Schottky contact on the lightly-doped N-type region connected to a control terminal, and a connection between the lightly-doped N-type region and the P-type base well.Type: ApplicationFiled: December 15, 2006Publication date: June 21, 2007Applicant: STMicroelectronics S.A.Inventors: Christophe Mauriac, Samuel Menard
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Publication number: 20070108547Abstract: A Schottky contact is disposed atop a surface of a semiconductor. A first Schottky contact metal layer is disposed atop a first portion of the semiconductor surface. A second Schottky contact metal is disposed atop a second portion of the surface layer and adjoins the first Schottky contact metal layer. The first Schottky contact metal layer has a lower work function than the second Schottky contact metal layer.Type: ApplicationFiled: October 27, 2006Publication date: May 17, 2007Applicant: Velox Semiconductor CorporationInventors: Ting Zhu, Marek Pabisz
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Publication number: 20070075392Abstract: A Schottky diode includes a Schottky barrier and a plurality of dopant regions disposed near the Schottky barrier as floating islands to function as PN junctions for preventing a leakage current generated from a reverse voltage. At least a trench opened in a semiconductor substrate with a Schottky barrier material disposed therein constitutes the Schottky barrier. The Schottky barrier material may also be disposed on sidewalls of the trench for constituting the Schottky barrier. The trench may be filled with the Schottky barrier material composed of Ti/TiN or a tungsten metal disposed therein for constituting the Schottky barrier. The trench is opened in a N-type semiconductor substrate and the dopant regions includes P-doped regions disposed under the trench constitute the floating islands. The P-doped floating islands may be formed as vertical arrays under the bottom of the trench.Type: ApplicationFiled: December 1, 2006Publication date: April 5, 2007Inventors: Ji Pan, Anup Bhalla
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Publication number: 20070045765Abstract: A semiconductor device including a substrate driven field-effect transistor with a lateral channel and a parallel-coupled Schottky diode, and a method of forming the same. In one embodiment, the substrate driven field-effect transistor of the semiconductor device includes a conductive substrate having a first contact covering a substantial portion of a bottom surface thereof, and a lateral channel above the conductive substrate. The substrate driven field-effect transistor also includes a second contact above the lateral channel and an interconnect that connects the lateral channel to the conductive substrate operable to provide a low resistance coupling between the first contact and the lateral channel. The semiconductor device also includes a Schottky diode parallel-coupled to the substrate driven field-effect transistor. A first and second terminal of the Schottky diode are couplable to the first and second contacts, respectively, of the substrate drive field-effect transistor.Type: ApplicationFiled: August 25, 2005Publication date: March 1, 2007Inventors: Berinder Brar, Wonill Ha
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Publication number: 20070029633Abstract: A Schottky diode includes a first nitride semiconductor layer formed on a substrate and a second nitride semiconductor layer selectively formed on the first nitride semiconductor layer and having a different conductivity type from that of the first nitride semiconductor layer. A Schottky electrode is selectively formed on the first nitride semiconductor layer to come into contact with the top surface of the second nitride semiconductor layer, and an ohmic electrode is formed thereon so as to be spaced apart from the Schottky electrode.Type: ApplicationFiled: July 31, 2006Publication date: February 8, 2007Inventors: Yutaka Hirose, Tsuyoshi Tanaka
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Patent number: 7173291Abstract: Between a terminal of an element to be protected and a GND terminal, a protecting element is connected, which includes a first n+ region, an insulating region and a second n+ region. The first n+ region is provided to have a columnar shape in a depth direction of a substrate, and the second n+ region is formed to have a plate shape and disposed so as to face a bottom of the first n+ region. Thus, it is possible to allow a very large static current to flow into a ground potential through a first current path and a second current path. Thus, electrostatic energy reaching an operation region of a HEMT can be significantly reduced while hardly increasing a parasitic capacity.Type: GrantFiled: October 25, 2005Date of Patent: February 6, 2007Assignee: Sanyo Electric Co., Ltd.Inventor: Tetsuro Asano
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Publication number: 20070007614Abstract: An SiC Schottky diode die or a Si Schottky diode die is mounted with its epitaxial anode surface connected to the best heat sink surface in the device package. This produces a substantial increase in the surge current capability of the device.Type: ApplicationFiled: July 5, 2006Publication date: January 11, 2007Inventors: Rossano Carta, Luigi Merlin, Diego Raffo
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Patent number: 7141861Abstract: A problem in related art according to which an increase in leak current cannot be avoided in order to obtain a low forward voltage VF as forward voltage VF and reverse leak current IR characteristics of a Schottky barrier diode are in a trade-off relationship is hereby solved by forming a Schottky barrier diode using a metal layer comprising a Schottky metal layer of Ti including a small amount of Al. Consequently, a low reverse leak current IR can be obtained without causing a large increase in the forward voltage VF of pure Ti such that power consumption can be reduced by suppressing forward power loss and decreasing reverse power loss.Type: GrantFiled: January 31, 2005Date of Patent: November 28, 2006Assignee: Sanyo Electric Co., Ltd.Inventor: Makoto Takayama
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Publication number: 20060163584Abstract: First and second synthetic diamond regions are doped with boron. The second synthetic diamond region is doped with boron to a greater degree than the first synthetic diamond region, and in physical contact with the first synthetic diamond region. In a further example embodiment, the first and second synthetic diamond regions form a diamond semiconductor, such as a Schottky diode when attached to at least one metallic lead.Type: ApplicationFiled: January 26, 2005Publication date: July 27, 2006Inventor: Robert Linares