Shape Of Potential Or Surface Barrier (epo) Patents (Class 257/E31.039)
  • Patent number: 11749706
    Abstract: A detection layer (416) for a radiation detector (400) includes a porous silicon membrane (418). The porous silicon membrane includes silicon (419) with a first side (430) and a second opposing side (432), a plurality of pores (420) extending entirely through the silicon from the first side to the second opposing side, each including shared walls (426), at least one protrusion of silicon (424) protruding out and extending from the first side a distance (504, 604, 704). The porous silicon membrane further includes a plurality of radiation sensitive quantum dots (422) in the pores and a quantum dot layer disposed on the first side and having a surface (434) and a thickness (506, 606, 706), wherein the thickness is greater than the distance.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: September 5, 2023
    Assignees: KONINKLIJKE PHILIPS N.V., WAYNE STATE UNIVERSITY
    Inventors: Marc Anthony Chappo, Stephanie Lee Brock
  • Patent number: 10921484
    Abstract: Disclosed is a system that performs motion analysis in a field of interest. The system may include at least one gateway disposable proximal to the field of interest. Further, the system may include a plurality of motion sensors. Further, a motion sensor may include a photodetector array, a processor and a wireless transmitter. Further, the wireless transmitter may be configured to transmit the digital information to at least one of a motion sensor of the plurality of motion sensors and the at least one gateway. Additionally, the system may include a plurality of video cameras disposable at a plurality of key locations in the field of interest. Further, at least one video camera may be further configured to transmit a part of a corresponding image sequence to at least one of the remote monitoring center through the at least one gateway.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: February 16, 2021
    Assignee: RELIANCE CORE CONSULTING
    Inventor: Jean-Pierre Leduc
  • Patent number: 9847438
    Abstract: A solar cell, having a front side which faces the sun during normal operation, and a back side opposite the front side can include a silicon substrate having doped regions and a polysilicon layer disposed over the doped regions. The solar cell can include a conductive filling formed between a first metal layer and doped regions and through or at least partially through the polysilicon layer, where the conductive filling electrically couples the first metal layer and the doped region. In an embodiment, a second metal layer is formed on the first metal layer, where the first metal layer and the conductive filling electrically couple the doped regions and the second metal layer. In some embodiments, the solar cell can be a front contact solar cell or a back contact solar cell.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: December 19, 2017
    Assignee: SunPower Corporation
    Inventor: Xi Zhu
  • Patent number: 9000492
    Abstract: In a back-illuminated solid-state image pickup device including a semiconductor substrate 4 having a light incident surface at a back surface side and a charge transfer electrode 2 disposed at a light detection surface at an opposite side of the semiconductor substrate 4 with respect to the light incident surface, the light detection surface has an uneven surface. By the light detection surface having the uneven surface, etaloning is suppressed because lights reflected by the uneven surface have scattered phase differences with respect to a phase of incident light and resulting interfering lights offset each other. A high quality image can thus be acquired by the back-illuminated solid-state image pickup device.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: April 7, 2015
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Hisanori Suzuki, Yasuhito Yoneta, Yasuhito Miyazaki, Masaharu Muramatsu, Koei Yamamoto
  • Patent number: 8946839
    Abstract: An absorber is disclosed. The disclosed absorber contains a base layer, and a plurality of pillars disposed above the base layer and composed of material configured to absorb an incident light and generate minority electrical carriers and majority electrical carrier, wherein the height of the pillars is predetermined to provide a common pyramidal outline shared by the pillars in the plurality of pillars.
    Type: Grant
    Filed: August 20, 2009
    Date of Patent: February 3, 2015
    Assignee: HRL Laboratories, LLC
    Inventors: Daniel Yap, Rajesh D. Rajavel, Sarabjit Mehta, James H. Schaffner
  • Patent number: 8829337
    Abstract: Novel structures of photovoltaic cells (also treated as solar cells) are provided. The cells are based on nanometer-scaled wires, tubes, and/or rods, which are made of electronic materials covering semiconductors, insulators or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications in space, commercial, residential, and industrial applications.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: September 9, 2014
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut Kumar Dutta
  • Patent number: 8791359
    Abstract: Novel structures of photovoltaic cells (also called as solar cells) are provided. The cells are based on nanoparticles or nanometer-scaled wires, tubes, and/or rods, which are made of electronic materials covering semiconductors, insulators, and may be metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications such as in space, commercial, residential and industrial applications.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: July 29, 2014
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut Kumar Dutta
  • Patent number: 8766393
    Abstract: A photodetector is formed from a body of semiconductor material substantially surrounded by dielectric surfaces. A passivation process is applied to at least one surface to reduce the rate of carrier generation and recombination on that surface. Photocurrent is read out from at least one electrical contact, which is formed on a doped region whose surface lies entirely on a passivated surface. Unwanted leakage current from un-passivated surfaces is reduced through one of the following methods: (a) The un-passivated surface is separated from the photo-collecting contact by at least two junctions; (b) The un-passivated surface is doped to a very high level, at least equal to the conduction band or valence band density of states of the semiconductor; (c) An accumulation or inversion layer is formed on the un-passivated surface by the application of an electric field.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: July 1, 2014
    Assignee: Infrared Newco, Inc.
    Inventors: Conor S. Rafferty, Clifford A. King
  • Patent number: 8659107
    Abstract: A radiation receiver has a semiconductor body including a first active region and a second active region, which are provided in each case for detecting radiation. The first active region and the second active region are spaced vertically from one another. A tunnel region is arranged between the first active region and the second active region. The tunnel region is connected electrically conductively with a land, which is provided between the first active region and the second active region for external electrical contacting of the semiconductor body. A method of producing a radiation receiver is additionally indicated.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: February 25, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Rainer Butendeich, Reiner Windisch
  • Patent number: 8642372
    Abstract: A method of manufacturing a solar cell includes forming jagged portions non-uniformly on a surface of a substrate, forming a first type semiconductor and a second type semiconductor in the substrate, forming a first electrode to contact the first type semiconductor, and forming a second electrode to contact the second type semiconductor. An etchant used in a wet etching process in manufacturing the solar cell includes about 0.5 wt % to 10 wt % of HF, about 30 wt % to 60 wt % of HNO3, and up to about 30 wt % of acetic acid based on total weight of the etchant.
    Type: Grant
    Filed: June 22, 2009
    Date of Patent: February 4, 2014
    Assignee: LG Electronics Inc.
    Inventors: Juhwa Cheong, Hyunjung Park, Junyong Ahn, Seongeun Lee, Jiweon Jeong
  • Patent number: 8629347
    Abstract: Novel structures of photovoltaic cells (also known as solar cells) are provided. The Cells are based on the nanometer-scaled wire, tubes, and/or rods, which are made of the electronics materials covering semiconductors, insulator or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells can have also high radiation tolerant capability. These cells will have enormous applications such as in space, in commercial, residential and industrial applications.
    Type: Grant
    Filed: September 30, 2012
    Date of Patent: January 14, 2014
    Assignee: Banpil Photonics, Inc.
    Inventors: Nobuhiko P. Kobayashi, Achyut K. Dutta
  • Patent number: 8629445
    Abstract: Provided are a semiconductor device with less leakage current is reduced, a semiconductor device with both of high field effect mobility and low leakage current, an electronic appliance with low power consumption, and a manufacturing method of a semiconductor device in which leakage current can be reduced without an increase in the number of masks. The side surface of a semiconductor layer formed of a semiconductor film having high carrier mobility is not in contact with any of a source electrode and a drain electrode. Further, such a transistor structure is formed without an increase in the number of photomasks and can be applied to an electronic appliance.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: January 14, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuhiro Tanaka, Ryo Tokumaru
  • Patent number: 8624108
    Abstract: Novel structures of photovoltaic cells (also treated as solar cells) are provided. The cells are based on nanometer-scaled wires, tubes, and/or rods, which are made of electronic materials covering semiconductors, insulators or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications in space, commercial, residential, and industrial applications.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: January 7, 2014
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut K. Dutta
  • Patent number: 8624107
    Abstract: Novel structures of photovoltaic cells (also known as solar cells) are provided. The Cells are based on the nanometer-scaled wire, tubes, and/or rods, which are made of the electronics materials covering semiconductors, insulator or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells can have also high radiation tolerant capability. These cells will have enormous applications such as in space, in commercial, residential and industrial applications.
    Type: Grant
    Filed: September 30, 2012
    Date of Patent: January 7, 2014
    Assignee: Banpil Photonics, Inc.
    Inventors: Nobuhiko P. Kobayashi, Achyut K. Dutta
  • Patent number: 8592934
    Abstract: On the front side of an n-type semiconductor substrate 5, p-type regions 7 are two-dimensionally arranged in an array. A high-concentration n-type region 9 and a p-type region 11 are disposed between the p-type regions 7 adjacent each other. The high-concentration n-type region 9 is formed by diffusing an n-type impurity from the front side of the substrate 5 so as to surround the p-type region 7 as seen from the front side. The p-type region 11 is formed by diffusing a p-type impurity from the front side of the substrate 5 so as to surround the p-type region 7 and high-concentration n-type region 9 as seen from the front side. Formed on the front side of the n-type semiconductor substrate 5 are an electrode 15 electrically connected to the p-type region 7 and an electrode 19 electrically connected to the high-concentration n-type region 9 and the p-type region 11.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: November 26, 2013
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Tatsumi Yamanaka
  • Patent number: 8378465
    Abstract: The present invention is a method and an apparatus for optical modulation, for example for use in optical communications links. In one embodiment, an apparatus for optical modulation includes a first silicon layer having one or more trenches formed therein, a dielectric layer lining the first silicon layer, and a second silicon layer disposed on the dielectric layer and filling the trenches.
    Type: Grant
    Filed: January 12, 2011
    Date of Patent: February 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Yurii A. Vlasov, Fengnian Xia
  • Publication number: 20130032197
    Abstract: Solar thin film modules are provided with reduced lateral dimensions of isolation trenches and contact trenches, which provide for a series connection of the individual solar cells. To this end lithography and etch techniques are applied to pattern the individual material layers, thereby reducing parasitic shunt leakages compared to conventional laser scribing techniques. In particular, there may be series connected solar cells formed on a flexible substrate material that are highly efficient in indoor applications.
    Type: Application
    Filed: July 24, 2012
    Publication date: February 7, 2013
    Applicant: STMicroelectronics S.r.I.
    Inventors: MARINA FOTI, NOEMI GRAZIANA SPARTA, SALVATORE LOMBARDO, SILVESTRA DIMARCO, SEBASTIANO RAVESI, COSIMO GERARDI
  • Publication number: 20120325305
    Abstract: A photovoltaic device and method include a photovoltaic stack having an N-doped layer, a P-doped layer and an intrinsic layer. A transparent electrode is formed on the photovoltaic stack and includes a carbon based layer and a high work function metal layer. The high work function metal layer is disposed at an interface between the carbon based layer and the P-doped layer such that the high work function metal layer forms a reduced barrier contact and is light transmissive.
    Type: Application
    Filed: June 21, 2011
    Publication date: December 27, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: BHUPESH CHANDRA, Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana, George S. Tulevski
  • Publication number: 20120329203
    Abstract: The present invention is to provide a method of creating a PIN silicon thin film comprising the steps of providing a molten P-type, Intrinsic and N-type semiconductor material. Next, it is performing a down draw process or a casting process of the molten P-type. Intrinsic and N-type semiconductor material. Then, it is selectively performing a dual-side rolling process to create a P-type, Intrinsic and N-type semiconductor ribbon. Subsequently, it is performing a step of joining the P-type, Intrinsic and N-type semiconductor ribbon to form a PIN semiconductor ribbon. Finally, it is performing a roll press process or a pressing process to the PIN semiconductor ribbon to create the PIN semiconductor thin film.
    Type: Application
    Filed: June 22, 2011
    Publication date: December 27, 2012
    Inventors: LIANG-TUNG CHANG, Tzu-Heng Chang
  • Publication number: 20120292675
    Abstract: A photovoltaic device includes lateral P-I-N light-sensitive diodes respectively formed in portions of a planar semiconductor material (e.g., polycrystalline or crystalline silicon) layer that is entirely disposed on an insulating material (e.g., SiO2) layer utilizing, e.g., STI or SOI techniques. Each light-sensitive diode includes parallel elongated doped regions respectively formed by P+ and N+ dopant extending entirely through the semiconductor layer material and separated by an intervening elongated intrinsic (native) region. The light-sensitive diodes are connected in series by patterned conductive (e.g., metal film) structures. Optional bypass diodes are formed next to each lateral P-I-N light-sensitive diodes. Optional trenches are defined between adjacent light-sensitive diodes.
    Type: Application
    Filed: May 18, 2011
    Publication date: November 22, 2012
    Applicant: TOWER SEMICONDUCTOR LTD.
    Inventors: YAKOV ROIZIN, EVGENY PIKHAY
  • Patent number: 8314327
    Abstract: Novel structures of photovoltaic cells (also treated as solar cells) are provided. The cells are based on nanometer-scaled wires, tubes, and/or rods, which are made of electronic materials covering semiconductors, insulators or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications in space, commercial, residential, and industrial applications.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: November 20, 2012
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut Kumar Dutta
  • Publication number: 20120285518
    Abstract: A solar cell having n-type and p-type interdigitated back contacts (IBCs), which cover the entire back surface of the absorber layer. The spatial separation of the IBCs is in a direction perpendicular to the back surface, thus providing borderless contacts having a zero-footprint separation. As the contacts are on the back, photons incident on the cell's front surface can be absorbed without any shadowing.
    Type: Application
    Filed: May 9, 2011
    Publication date: November 15, 2012
    Applicant: International Business Machines Corporation
    Inventors: Joel P. De Souza, Harold John Hovel, Daniel Inns, Jeehwan Kim, Christian Lavoie, Devendra K. Sadana, Katherine L. Saenger, Davood Shahrjerdi, Zhen Zhang
  • Patent number: 8309843
    Abstract: Novel structures of photovoltaic cells (also treated as solar cells) are provided. The Cells are based on the nanometer-scaled wire, tubes, and/or rods, which are made of the electronics materials covering semiconductors, insulator or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells can have also high radiation tolerant capability. These cells will have enormous applications such as in space, in commercial, residential and industrial applications.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: November 13, 2012
    Assignee: Banpil Photonics, Inc.
    Inventors: Nobuhiko P. Kobayashi, Achyut K. Dutta
  • Publication number: 20120252158
    Abstract: An improved method for manufacturing a lateral germanium detector is disclosed. A detector window is opened through an oxide layer to expose a doped single crystalline silicon layer situated on a substrate. Next, a single crystal germanium layer is grown within the detector window, and an amorphous germanium layer is grown on the oxide layer. The amorphous germanium layer is then polished to leave only a small portion around the single crystal germanium layer. A dielectric layer is deposited on the amorphous germanium layer and the single crystal germanium layer. Using resist masks and ion implants, multiple doped regions are formed on the single crystal germanium layer. After opening several oxide windows on the dielectric layer, a refractory metal layer is deposited on the doped regions to form multiple germanide layers.
    Type: Application
    Filed: October 27, 2008
    Publication date: October 4, 2012
    Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T. S. Pomerene, Vu A. Vu, Robert Kamocsai, Timothy J. Conway
  • Publication number: 20120211854
    Abstract: Pixel sensor cells, methods of fabricating pixel sensor cells, and design structures for a pixel sensor cell. The pixel sensor cell has a gate structure that includes a gate dielectric and a gate electrode on the gate dielectric. The gate electrode includes a layer with first and second sections that have a juxtaposed relationship on the gate dielectric. The second section of the gate electrode is comprised of a conductor, such as doped polysilicon or a metal. The first section of the gate electrode is comprised of a metal having a higher work function than the conductor comprising the second section so that the gate structure has an asymmetric threshold voltage.
    Type: Application
    Filed: February 17, 2011
    Publication date: August 23, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Brent A. Anderson, Andres Bryant, William F. Clark, JR., John J. Ellis-Monaghan, Edward J. Nowak
  • Publication number: 20120211071
    Abstract: A multijunction solar cell including an upper first solar subcell having a first band gap; a second solar subcell adjacent to the first solar subcell and having a second band gap smaller than the first band gap; a graded interlayer adjacent to the second solar subcell, the first graded interlayer having a third band gap greater than the second band gap; and a third solar subcell adjacent to the graded interlayer, the third subcell having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell. A lower fourth solar subcell is provided adjacent to the third subcell and lattice matched thereto, the lower fourth subcell having a fifth band gap smaller than the fourth band gap.
    Type: Application
    Filed: May 3, 2012
    Publication date: August 23, 2012
    Applicant: Emcore Solar Power, Inc.
    Inventors: Fred Newman, Benjamin Cho, Mark A. Stan, Paul Sharps
  • Publication number: 20120175584
    Abstract: Inorganic semiconducting materials such as silicon are used as a host matrix in which quantum dots reside to provide a radiation detector or energy converter. The quantum dot material may be disposed by incorporating materials sensitive to neutron detection such as boron-containing compounds, or the use of methods such as chemical vapor deposition or atomic layer deposition to insert the quantum dot material. Electrodes may be extended deep into the host matrix material to improve efficiency. Likewise, the host matrix may be machined to create pores in the matrix material. Further, amplification and signal-processing structures may be used in close proximity to the radiation-sensitive region of the device.
    Type: Application
    Filed: July 11, 2011
    Publication date: July 12, 2012
    Applicant: WEINBERG MEDICAL PHYSICS LLC
    Inventors: Irving N. WEINBERG, Pavel STEPANOV, Mario G. URDANETA
  • Patent number: 8217483
    Abstract: A semiconductor component that includes a photosensitive doped semiconductor layer, in which electrical charge carriers are released during absorption of electromagnetic radiation is disclosed. The photosensitive semiconductor layer has a structured interface and at least one layer which generates an electric field for separating the released charge carriers disposed downstream of the structured interface. The electric field extends over the structured interface. The photosensitive semiconductor component is distinguished by a high efficiency of the charge carrier separation, in particular, for generating an electric current.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: July 10, 2012
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der Angewandten Forschung E. V.
    Inventors: Kevin Fuechsel, Andreas Tuennermann, Ernst-Bernhard Kley
  • Publication number: 20120145880
    Abstract: An image sensor comprising a substrate and one or more of pixels thereon. The pixels have subpixels therein comprising nanowires sensitive to light of different color. The nanowires are functional to covert light of the colors they are sensitive to into electrical signals.
    Type: Application
    Filed: December 14, 2010
    Publication date: June 14, 2012
    Applicant: ZENA TECHNOLOGIES, INC.
    Inventor: Munib WOBER
  • Publication number: 20120145231
    Abstract: A photovoltaic (PV) device has at least one lower PV cell on a substrate, the cell having a metallic back contact, and a absorber, and a transparent conductor layer. An upper PV cell is adhered to the lower PV cell, electrically in series to form a stack. The upper PV cell has III-V absorber and junction layers, the cells are adhered by transparent conductive adhesive having filler of conductive nanostructures or low temperature solder. The upper PV cell has no substrate. An embodiment has at least one shape of patterned conductor making contact to both a top of the upper and a back contact of the lower cells to couple them together in series. In an embodiment, a shape of patterned conductor draws current from excess area of the lower cell to the upper cell, in an alternative embodiment shapes of patterned conductor couples I-III-VI cells not underlying upper cells in series strings, a string being in parallel with at least one stack.
    Type: Application
    Filed: December 13, 2010
    Publication date: June 14, 2012
    Inventors: Lawrence M. Woods, Joseph H. Armstrong
  • Publication number: 20120135561
    Abstract: An object is to obtain a high-efficiency photoelectric conversion device having a crystalline silicon i-layer in a photoelectric conversion layer. Disclosed is a fabrication method for a photoelectric conversion device that includes a step of forming, on a substrate, a photoelectric conversion layer having an i-layer formed mainly of crystalline silicon. The method includes the steps of determining an upper limit of an impurity concentration in the i-layer according to the Raman ratio of the i-layer; and forming the i-layer so as to have a value equal to or less than the determined upper limit of the impurity concentration. Alternatively, an upper limit of impurity-gas concentration in a film-formation atmosphere is determined according to the Raman ratio of the i-layer, and the i-layer is formed while controlling the impurity-gas concentration so as to have a value equal to or less than the determined upper limit.
    Type: Application
    Filed: May 7, 2010
    Publication date: May 31, 2012
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Hiroomi Miyahara, Saneyuki Goya, Satoshi Sakai, Tatsuyuki Nishimiya
  • Publication number: 20120100665
    Abstract: The present invention relates to a method for manufacturing silicon thin-film solar cells, including: providing a substrate; forming a first electrode on the substrate; forming a first doped semiconductor layer on the first electrode by chemical vapor deposition; forming an intrinsic layer on the first doped semiconductor layer by chemical vapor deposition, where the intrinsic layer includes a plurality of amorphous/nanocrystalline silicon layers, and the intrinsic layer has various energy bandgaps formed by varying average grain sizes of the amorphous/nanocrystalline silicon layers; forming a second doped semiconductor layer on the intrinsic layer by chemical vapor deposition, where one of the first doped semiconductor layer and the second doped semiconductor layer is a p-type amorphous silicon layer and the other is an n-type amorphous/nano-microcrystalline silicon layer; and forming a second electrode on the second doped semiconductor layer.
    Type: Application
    Filed: January 4, 2012
    Publication date: April 26, 2012
    Inventors: Tomi T. LI, Jenq-Yang CHANG, Sheng-Hui CHEN, Cheng-Chung LEE
  • Publication number: 20120097231
    Abstract: A solar cell includes: a substrate; a plurality of first nanostructures provided on the substrate and arranged; and a plurality of second nanostructures provided on the substrate and arranged separate from the plurality of first nanostructures wherein an average diameter of a cross section of one of the plurality of first nanostructures that is incised in a direction that is in parallel to a substrate surface of the substrate is greater than an average diameter of a cross section of one of the plurality of second nanostructures that is incised in a direction that is in parallel to a substrate surface of the substrate.
    Type: Application
    Filed: October 14, 2009
    Publication date: April 26, 2012
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jung-Ho Lee, Jin-Young Jung, Sang-Won Jee, Han-Don Um
  • Patent number: 8143687
    Abstract: A broadband radiation detector includes a first layer having a first type of electrical conductivity type. A second layer has a second type of electrical conductivity type and an energy bandgap responsive to radiation in a first spectral region. A third layer has the second type of electrical conductivity type and an energy bandgap responsive to radiation in a second spectral region comprising longer wavelengths than the wavelengths of the first spectral region. The broadband radiation detector further includes a plurality of internal regions. Each internal region may be disposed at least partially within the third layer and each internal region may include a refractive index that is different from a refractive index of the third layer. The plurality of internal regions may be arranged according to a regularly repeating pattern.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: March 27, 2012
    Assignee: Raytheon Company
    Inventors: Justin G. A. Wehner, Scott M. Johnson
  • Publication number: 20120037211
    Abstract: The present invention proposes a thin-film solar cell structure, a method for manufacturing the same and a thin-film solar cell array. The method for manufacturing thin-film solar cell structures comprises: forming at least two first trenches through a first surface into said semiconductor substrate, forming at least one second trench through a second surface into said semiconductor substrate, said second trench located between two neighboring said first trenches; forming a first structure on sidewalls of each of said first trenches; to forming a second structure on sidewalls of each of said second trench; and cutting or stretching said semiconductor substrate to form thin-film solar cell structures.
    Type: Application
    Filed: April 14, 2010
    Publication date: February 16, 2012
    Applicant: Sunovel (Shzhou) Technologies Limited
    Inventors: Huilong Zhu, Zhijiong Luo, Haizhou Yin
  • Publication number: 20120009727
    Abstract: Avalanche photodiodes and methods for forming them are disclosed. The breakdown voltage of an avalanche photodiode is controlled through the inclusion of a diffusion sink that is formed at the same time as the device region of the photodiode. The device region and diffusion sink are formed by diffusing a dopant into a semiconductor to form a p-n junction in the device region. The dopant is diffused through a first diffusion window to form the device region and a second diffusion window to form the diffusion sink. The depth of the p-n junction is based on an attribute of the second diffusion window.
    Type: Application
    Filed: September 20, 2011
    Publication date: January 12, 2012
    Applicant: PRINCETON LIGHTWAVE, INC.
    Inventor: Mark Allen Itzler
  • Publication number: 20110294253
    Abstract: An integrated circuit device for converting an incident optical signal into an electrical signal comprises a semiconductor substrate, a well region formed inside the semiconductor substrate, a dielectric layer formed over the well region, and a layer of polysilicon for receiving the incident optical signal, formed over the dielectric layer, including a p-type portion, an n-type portion and an undoped portion disposed between the p-type and n-type portions, wherein the well region is biased to control the layer of polysilicon for providing the electrical signal.
    Type: Application
    Filed: August 8, 2011
    Publication date: December 1, 2011
    Inventors: Yu-Da Shiu, Chyh-Yih Chang, Ming-Dou Ker, Che-Hao Chuang
  • Publication number: 20110215224
    Abstract: An apparatus includes a first photoelectric conversion element configured to convert light into a current by a photoelectric conversion, a first current amplification unit configured to amplify the current, a first current monitoring unit configured to monitor the amplified current amplified and output a monitor signal, and a first bias voltage setting unit configured to gain the monitor signal by a factor less than 1 and apply a reverse bias voltage to the first photoelectric conversion element according to the gained monitor signal.
    Type: Application
    Filed: March 3, 2011
    Publication date: September 8, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Hideo Kobayashi
  • Publication number: 20110174374
    Abstract: The invention relates to a heterojunction solar cell and a method for the production thereof. The heterojunction solar cell has an absorber layer made of silicon with a basic doping and at least one heterojunction layer of a doped semiconductor material whose band gap differs from that of the silicon of the absorber layer. The absorber layer has a doped layer at an interface directed toward the heterojunction layer, the doping concentration of said doped layer being greater than the basic doping concentration of the absorber layer. As a result of this doping profile, a field effect can be caused which prevents charge carrier pairs produced within the absorber layer from diffusing toward the interface between the absorber layer and the heterojunction layer and from recombining there.
    Type: Application
    Filed: June 30, 2009
    Publication date: July 21, 2011
    Applicant: Institut fur Solarenergieforschung GmbH
    Inventor: Nils-Peter Harder
  • Patent number: 7935966
    Abstract: A semiconductor device including, on at least one surface of a crystalline semiconductor substrate, at least one first amorphous semiconductor region doped with a first type of conductivity. The semiconductor substrate includes, on the same at least one surface, at least one second amorphous semiconductor region doped with a second type of conductivity, opposite the first type of conductivity. The first amorphous semiconductor region, insulated for the second amorphous semiconductor region by at least ore dielectric region in the contact with the semiconductor substrate, and the second amorphous semiconductor region form an interdigitated structure.
    Type: Grant
    Filed: January 18, 2006
    Date of Patent: May 3, 2011
    Assignee: Commissariat a l'Energie Atomique Et Aux Energies Alternatives
    Inventors: Pierre Jean Ribeyron, Claude Jaussaud, Pere Roca I. Cabarrocas, Jerome Damon-Lacoste
  • Patent number: 7880201
    Abstract: The present invention is a method and an apparatus for optical modulation, for example for use in optical communications links. In one embodiment, an apparatus for optical modulation includes a first silicon layer having one or more trenches formed therein, a dielectric layer lining the first silicon layer, and a second silicon layer disposed on the dielectric layer and filling the trenches.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: February 1, 2011
    Assignee: International Business Machines Corporation
    Inventors: Yurii A. Vlasov, Fengnian Xia
  • Patent number: 7736928
    Abstract: Embodiments of the invention contemplate the formation of a low cost solar cell using a novel electroplating apparatus and method to form a metal contact structure having metal lines formed using an electrochemical plating process. The apparatus and methods described herein remove the need to perform the often costly processing steps of performing a mask preparation and formation steps, such as screen printing, lithographic steps and inkjet printing steps, to form a contact structure. The resistance of interconnects formed in a solar cell device greatly affects the efficiency of the solar cell. It is thus desirable to form a solar cell device that has a low resistance connection that is reliable and cost effective. Therefore, one or more embodiments of the invention described herein are adapted to form a low cost and reliable interconnecting layer using an electrochemical plating process containing a common metal, such as copper.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: June 15, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Sergey Lopatin, John O. Dukovic, David Eaglesham, Nicolay Y. Kovarsky, Robert Bachrach, John Busch, Charles Gay
  • Publication number: 20100133639
    Abstract: A semiconductor component that includes a photosensitive doped semiconductor layer, in which electrical charge carriers are released during absorption of electromagnetic radiation is disclosed. The photosensitive semiconductor layer has a structured interface and at least one layer which generates an electric field for separating the released charge carriers disposed downstream of the structured interface. The electric field extends over the structured interface. The photosensitive semiconductor component is distinguished by a high efficiency of the charge carrier separation, in particular, for generating an electric current.
    Type: Application
    Filed: November 24, 2009
    Publication date: June 3, 2010
    Inventors: Kevin Fuechsel, Andreas Tuennermann, Ernst-Bernhard Kley
  • Publication number: 20100132779
    Abstract: A solar cell includes a first electrode on a substrate; a plurality of pillars on the first electrode; a semiconductor layer on the first electrode, wherein a surface area of the semiconductor layer is greater than a surface area of the first electrode; and a second electrode over the semiconductor layer.
    Type: Application
    Filed: May 29, 2008
    Publication date: June 3, 2010
    Applicant: JUSUNG ENGINEERING CO., LTD.
    Inventors: Jin Hong, Jae-Ho Kim, Yong-Woo Shin
  • Patent number: 7700400
    Abstract: The present invention can finely arrange p+-type diffusion layers and n+-type diffusion layers. A p+-type diffusion layer 2 and an n+-type diffusion layer 3 are simultaneously formed on a back surface 1a of a semiconductor substrate 1 in a state that the p+-type diffusion layer 2 and the n+-type diffusion layer 3 are arranged close to each other, and a back surface 1a side of the semiconductor substrate 1 on which outer end portions of the p+-type diffusion layers 2 and the n+-type diffusion layers 3 are brought into contact with each other is removed thus separating the p+-type diffusion layer 2 and the n+-type diffusion layer 3 from each other and hence, the p+-type diffusion layer 2 and the n+-type diffusion layer 3 can be separately arranged in a state that the p+-type diffusion layer 2 and the n+-type diffusion layer 3 are arranged close to each other.
    Type: Grant
    Filed: October 21, 2005
    Date of Patent: April 20, 2010
    Assignees: Naoetsu Electronics Co., Ltd., Shin-Etsu Chemical Co., Ltd.
    Inventors: Tsutomu Onishi, Takeshi Akatsuka, Shunichi Igarashi
  • Publication number: 20100051099
    Abstract: A method of manufacturing a solar cell includes forming jagged portions non-uniformly on a surface of a substrate, forming a first type semiconductor and a second type semiconductor in the substrate, forming a first electrode to contact the first type semiconductor, and forming a second electrode to contact the second type semiconductor. An etchant used in a wet etching process in manufacturing the solar cell includes about 0.5 wt % to 10 wt % of HF, about 30 wt % to 60 wt % of HNO3, and up to about 30 wt % of acetic acid based on total weight of the etchant.
    Type: Application
    Filed: June 22, 2009
    Publication date: March 4, 2010
    Inventors: Juhwa CHEONG, Hyunjung PARK, Junyong AHN, Seongeun LEE, Jiweon JEONG
  • Patent number: 7655965
    Abstract: A semiconductor light receiving device includes a plurality of photodiode units, each of which is configured to convert a received light into an electric signal; and a separating unit configured to electrically separates the plurality of photodiode units from each other. The impurity concentration of a surface portion of the separating unit is equal to or lower than a first concentration. The first concentration is a concentration at which the light receiving sensitivity of the separating unit to light is substantially equal to the light receiving sensitivity of each of the plurality of photodiode units of the light. A wavelength of the light is equal to or longer than that of blue-violet light.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: February 2, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Nobuyuki Nagashima
  • Publication number: 20090305456
    Abstract: A method of manufacturing a back junction solar cell comprises the steps of forming a first diffusion mask (9) on the back of a silicon substrate (1), printing a first etching paste (3a, 4a) on a part of the surface of the first diffusion mask (9), removing the portion of the first diffusion mask (9) where the first etching paste (3a, 4a) is printed by performing a first heating of the silicon substrate (1) to expose a part of the back of the silicon substrate (1), forming a first-conductivity-type impurity diffusion layer (6) on the exposed portion of the silicon substrate (1) by diffusing a first-conductivity-type impurity, removing the first diffusion mask (9), forming a second diffusion mask (9) on the back of the silicon substrate (1), printing a second etching paste (3b, 4b) on a part of the surface of the second diffusion mask (9), removing the portion of the second diffusion mask (9) where the second etching paste (3b, 4b) is printed by performing a second heating of the silicon substrate (1) to expos
    Type: Application
    Filed: July 19, 2006
    Publication date: December 10, 2009
    Inventor: Yasushi Funakoshi
  • Patent number: 7612392
    Abstract: Example embodiments relate to an image sensor and a fabrication method thereof. An image sensor may include a semiconductor substrate. A charge transfer structure may be formed on the semiconductor substrate. The charge transfer structure may include a gate insulating film that may be formed on a channel region in the semiconductor substrate between a photoelectric conversion region and charge detection region, and a transfer gate electrode that may be formed on the gate insulating film that may have a region doped with a first conductivity type impurity-doped region and a second conductivity type impurity-doped region which may be adjacent to each other.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: November 3, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Il Jung, Duk-Min Yi
  • Publication number: 20090166787
    Abstract: An image sensor includes a circuitry, a substrate, an electrical junction region, a high concentration first conduction type region, and a photodiode. The circuitry includes a transistor and is formed on and/or over the substrate. The electrical junction region is formed in one side of the transistor. The high concentration first conduction type region is formed on and/or over the electrical junction region. The photodiode is formed over the circuitry.
    Type: Application
    Filed: December 26, 2008
    Publication date: July 2, 2009
    Inventor: Ji-Young Park