Adapted To Control Current Flow Through Device (e.g., Photoresistor) (epo) Patents (Class 257/E31.052)
  • Patent number: 9893114
    Abstract: The method comprises forming a first silicon nitride film covering a pixel circuit section by thermal CVD; forming an opening in the first silicon nitride film by removing a first portion of the first silicon nitride film while remaining a second portion of the first silicon nitride film; forming a second silicon nitride film covering the opening by plasma CVD; forming an insulating film covering the first silicon nitride film and the second silicon nitride film and covering a peripheral transistor in the peripheral circuit section; and forming a contact plug passing through the insulating film and being in contact with the peripheral transistor.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: February 13, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Nobuyuki Endo
  • Patent number: 9758902
    Abstract: A 3C-SiC epitaxial layer is produced by a production method including: epitaxially growing a first 3C-SiC layer on a Si substrate; oxidizing the first 3C-SiC layer; removing an oxide film on a surface of the 3C-SiC layer; and epitaxially growing a second 3C-SiC layer on the 3C-SiC layer after the oxide film is removed.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: September 12, 2017
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Yukimune Watanabe, Noriyasu Kawana
  • Patent number: 9041112
    Abstract: In a semiconductor device, where, with respect to a parasitic resistor in a current mirror circuit, a compensation resistor for compensating the parasitic resistor is provided in the current mirror circuit, the current mirror circuit includes at least two thin film transistors. The thin film transistors each have an island-shaped semiconductor film having a channel formation region and source or drain regions, a gate insulating film, a gate electrode, and source or drain electrodes, and the compensation resistor compensates the parasitic resistor of any one of the gate electrode, the source electrode, and the drain electrode. In addition, each compensation resistor has a conductive layer containing the same material as the gate electrode, the source or drain electrodes, or the source or drain regions.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: May 26, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi Hirose
  • Patent number: 9035410
    Abstract: An avalanche photodiode detector is provided. The avalanche photodiode detector comprises an absorber region having an absorption layer for receiving incident photons and generating charged carriers; and a multiplier region having a multiplication layer; wherein the multiplier region is on a mesa structure separate from the absorber region and is coupled to the absorber region by a bridge for transferring charged carriers between the absorber region and multiplier region.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: May 19, 2015
    Assignee: THE BOEING COMPANY
    Inventors: Ping Yuan, Joseph C. Boisvert, Dmitri D. Krut, Rengarajan Sudharsanan
  • Patent number: 9013023
    Abstract: A photoelectric element includes a first electrode; and a second electrode positioned so as to face the first electrode; and a semiconductor disposed on a face of the first electrode, the face being positioned so as to face the second electrode; and a photosensitizer carried on the semiconductor; and a first charge-transport layer interposed between the first electrode and the second electrode; and a second charge-transport layer interposed between the first charge-transport layer and the second electrode. The first charge-transport layer and the second charge-transport layer contain different oxidation-reduction materials. The oxidation-reduction material in the first charge-transport layer has an oxidation-reduction potential higher than an oxidation-reduction potential of the oxidation-reduction material in the second charge-transport layer.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: April 21, 2015
    Assignees: Panasonic Corporation, Waseda University
    Inventors: Michio Suzuka, Takashi Sekiguchi, Naoki Hayashi, Hiroyuki Nishide, Kenichi Oyaizu, Fumiaki Kato
  • Patent number: 8860167
    Abstract: An image sensor may include a semiconductor substrate, a plurality of light receiving devices formed within the semiconductor substrate, and a plurality of device isolation films for isolating the light receiving devices from each other. When an arrangement direction of a pixel array may be formed by arranging the light receiving devices is a horizontal direction, the pixel array may be formed by alternately arranging a first type light receiving device and a second type light receiving device having different horizontal lengths.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: October 14, 2014
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Hoon Jang
  • Patent number: 8829634
    Abstract: The invention is an optoelectronic device comprising an active portion which converts light to electricity or converts electricity to light, the active portion having a front side for the transmittal of the light and a back side opposite from the front side, at least two electrical leads to the active portion to convey electricity to or from the active portion, an enclosure surrounding the active portion and through which the at least two electrical leads pass wherein the hermetically sealed enclosure comprises at the front side of the active portion a barrier material which allows for transmittal of light, one or more getter materials disposed so as to not impede the transmission of light to or from the active portion, and a contiguous gap pathway to the getter material which pathway is disposed between the active portion and the barrier material.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: September 9, 2014
    Assignee: Dow Global Technologies LLC
    Inventors: Jeffrey E. Bonekamp, Michelle L. Boven, Ryan S. Gaston
  • Publication number: 20140103480
    Abstract: A mask for partially blocking ultraviolet rays in TFT glass substrate manufacturing process is disclosed. The mask includes a panel pattern area for forming the panel patterns, and an additional pattern area for forming additional patterns in a rim of the panel pattern area. In addition, a TFT glass substrate and the manufacturing thereof are also disclosed. By arranging the additional patterns in the rim of the panel patterns, the microstructures in the rim of the panel patterns are substantially the same with that in the middle of the panel patterns.
    Type: Application
    Filed: October 19, 2012
    Publication date: April 17, 2014
    Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO
    Inventors: Pei Lin, Hua Zheng, Liangdong Wu, Shangpan Chen, Long Pan, Pan Gao, Mingwen Lin, Shyh-Feng Chen
  • Patent number: 8664739
    Abstract: In accordance with the invention, an improved image sensor includes an array of germanium photosensitive elements integrated with a silicon substrate and integrated with silicon readout circuits. The silicon transistors are formed first on a silicon substrate, using well known silicon wafer fabrication techniques. The germanium elements are subsequently formed overlying the silicon by epitaxial growth. The germanium elements are advantageously grown within surface openings of a dielectric cladding. Wafer fabrication techniques are applied to the elements to form isolated germanium photodiodes. Since temperatures needed for germanium processing are lower than those for silicon processing, the formation of the germanium devices need not affect the previously formed silicon devices. Insulating and metallic layers are then deposited and patterned to interconnect the silicon devices and to connect the germanium devices to the silicon circuits.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: March 4, 2014
    Assignee: Infrared Newco, Inc.
    Inventors: Clifford A. King, Conor S. Rafferty
  • Publication number: 20140042506
    Abstract: Transistors, methods of manufacturing thereof, and image sensor circuits are disclosed. In one embodiment, a transistor includes a buried channel disposed in a workpiece, a gate dielectric disposed over the buried channel, and a gate layer disposed over the gate dielectric. The gate layer comprises an I shape in a top view of the transistor.
    Type: Application
    Filed: August 8, 2012
    Publication date: February 13, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Fredrik Ramberg, Tse-Hua Lu, Tsun-Lai Hsu, Victor Chiang Liang, Chi-Feng Huang, Yu-Lin Wei, Shu Fang Fu
  • Patent number: 8603839
    Abstract: A metrology system for gauging and spatially mapping a semiconductor material on a substrate can be used in controlling deposition and thermal activation processes.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: December 10, 2013
    Assignee: First Solar, Inc.
    Inventors: Arnold Allenic, Stephan Paul George, II, Sreenivas Jayaraman, Oleh Karpenko, Chong Lim
  • Publication number: 20130298967
    Abstract: A tandem solar cell structure includes a substrate, a conductive layer, a bottom solar cell combination and a top solar cell, The bottom solar cell combination includes a plurality of solar cell units and is disposed on the substrate. A conductive layer is disposed between the top solar cell and the bottom solar cell combination. The top solar cell is connected to one of the solar cell units in series. A wide energy distribution of the solar radiation can be absorbed through the tandem solar cell structure. The electrical series connection of the top solar cell and the solar cell units of the bottom solar cell combination reduces current mismatch between the top and bottom cells and enhances the overall system open circuit voltage due to more units in the bottom cell combination. The efficiency of the tandem solar cell structure is therefore improved considerably.
    Type: Application
    Filed: August 22, 2012
    Publication date: November 14, 2013
    Applicant: GCSOL TECH CO., LTD.
    Inventors: Tien-Jung HUANG, Jui-yao CHIEN
  • Patent number: 8390089
    Abstract: Provided is a back side illuminated image sensor device. The image sensor device includes a substrate having a front side and a back side opposite the front side. The image sensor also includes a radiation-detection device that is formed in the substrate. The radiation-detection device is operable to detect a radiation wave that enters the substrate through the back side. The image sensor further includes a deep trench isolation feature that is disposed adjacent to the radiation-detection device. The image sensor device further includes a doped layer that at least partially surrounds the deep trench isolation feature in a conformal manner.
    Type: Grant
    Filed: July 27, 2010
    Date of Patent: March 5, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Szu-Ying Chen, Chun-Chieh Chuang, Jen-Cheng Liu, Dun-Nian Yaung
  • Publication number: 20130049159
    Abstract: According to an embodiment, a semiconductor device includes a semiconductor substrate and an amorphous semi-insulating layer on the semiconductor substrate.
    Type: Application
    Filed: August 31, 2011
    Publication date: February 28, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventor: Gerhard Schmidt
  • Publication number: 20130037900
    Abstract: A solid-state imaging element includes a pixel having a photoelectric conversion section and a side pinning layer. The photoelectric conversion section is formed in a semiconductor substrate. The side pinning layer is formed on a side of the photoelectric conversion section. The side pinning layer is formed by performing ion implantation in a state of a trench being open, the trench being formed in a part on a side of a region in which the photoelectric conversion section is formed.
    Type: Application
    Filed: August 1, 2012
    Publication date: February 14, 2013
    Applicant: SONY CORPORATION
    Inventor: Takashi Abe
  • Publication number: 20130032918
    Abstract: An image sensor may include a semiconductor substrate, a plurality of light receiving devices formed within the semiconductor substrate, and a plurality of device isolation films for isolating the light receiving devices from each other. When an arrangement direction of a pixel array may be formed by arranging the light receiving devices is a horizontal direction, the pixel array may be formed by alternately arranging a first type light receiving device and a second type light receiving device having different horizontal lengths.
    Type: Application
    Filed: July 12, 2012
    Publication date: February 7, 2013
    Applicant: Dongbu HiTek Co., Ltd.
    Inventor: Hoon JANG
  • Patent number: 8368122
    Abstract: A multiple-junction photoelectric device includes a substrate with a first conducting layer thereon, at least two elementary photoelectric devices of p-i-n or p-n configuration, with a second conducting layer thereon, and at least one intermediate layer between two adjacent elementary photoelectric devices. The intermediate layer has, on the incoming light side, opposite top and bottom faces, the top and bottom faces having respectively a surface morphology including inclined elementary surfaces so ?90bottom is smaller than ?90top by at least 3°, preferably 6°, more preferably 10°, and even more preferably 15°; where ?90top is the angle for which 90% of the elementary surfaces of the top face of the intermediate layer have an inclination equal to or less than this angle, and ?90bottom is the angle for which 90% of the elementary surfaces of the bottom face of the intermediate layer have an inclination equal to or less than this angle.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: February 5, 2013
    Assignee: Universite de Neuchatel
    Inventors: Didier Domine, Peter Cuony, Julien Bailat
  • Patent number: 8338212
    Abstract: A method of forming a mask for lithography includes the step of forming the mask by using reverse data in which positions of at least part of output terminals are reversed, when forming the mask for lithography used for manufacturing a back-illuminated solid-state imaging device which takes incident light from the side of a surface opposite to the side of a surface on which wiring of a device region in which photoelectric conversion elements are formed is formed.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: December 25, 2012
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Publication number: 20120298175
    Abstract: A solar panel module includes a transparent carrier and semi-conductor substrate portions that have a front surface and a rear surface. The front surface is arranged for capturing radiation energy. The semiconductor substrate portions are arranged adjacent to each other on the transparent carrier and are separated from each other by a groove. Each semiconductor substrate portion is attached with the front surface to the transparent carrier. Each groove includes a side wall of each of the adjacent semiconductor substrate portions. The front surface of each semiconductor substrate portion is provided with a doped layer of a first conductivity type. Each semiconductor substrate portion includes a first electric contact for minority charge carriers and a second electric contact for majority charge carriers in the semiconductor substrate portion. The first electric contact is arranged on at least the rear surface of the semiconductor substrate portion as a heterostructure of a first type.
    Type: Application
    Filed: January 5, 2011
    Publication date: November 29, 2012
    Applicant: STICHTING ENERGIEONDERZOEK CENTRUM NEDERLAND
    Inventors: Johannes Adrianus Maria Van Roosmalen, Paula Catharina Petronella Bronsveld
  • Patent number: 8299484
    Abstract: An optoelectronic semiconductor chip including a radiation passage area, where a contact metallization is applied to the radiation passage area, and a first reflective layer sequence is applied to that surface of the contact metallization which is remote from the radiation passage area, and an optoelectronic component that includes such a chip.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: October 30, 2012
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Stefan Grötsch, Norbert Linder
  • Publication number: 20120267737
    Abstract: A radiation detector includes a semiconductor substrate which contains front and rear major surfaces and at least one side surface, a guard ring and a plurality of anode electrode pixels located over the rear surface of the semiconductor substrate, where each anode electrode pixel is formed between adjacent pixel separation regions, a side insulating layer formed on the at least one side surface of the semiconductor substrate, a cathode electrode located over the front major surface of the semiconductor substrate, and an electrically conductive cathode extension formed over at least a portion of side insulating layer, where the cathode extension contacts an edge of the cathode electrode. Further embodiments include various methods of making such semiconductor radiation detector.
    Type: Application
    Filed: April 20, 2012
    Publication date: October 25, 2012
    Applicant: Redlen Technologies
    Inventors: Henry Chen, Salah Awadalla, Pramodha Marthandam
  • Patent number: 8293559
    Abstract: In a method of manufacturing a photoelectric conversion device having a pixel region and a peripheral circuit region, a semiconductor compound layer is formed by causing a surface of a diffusion layer or gate electrode of a MOS transistor in the peripheral circuit region to react with a high melting point metal, then an insulating layer is formed in the pixel region and the peripheral circuit region after the step of forming a semiconductor compound layer. A contact hole is formed in the insulating layer to expose a diffusion layer in the pixel region, and a contact hole is formed in the insulating layer to expose the semiconductor compound layer formed in the peripheral circuit region. These holes are formed at different timings. Prior to forming the hole which is formed later, a contact plug is formed in the contact hole which is formed earlier.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: October 23, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takehito Okabe, Hiroaki Naruse, Ryuichi Mishima, Kouhei Hashimoto
  • Publication number: 20120261730
    Abstract: An image sensor including a pixel array having a floating diffusion region of a pixel which is disposed in a substrate, the floating diffusion region to receive a charge from a photosensitive region. In an embodiment, a transfer gate disposed on the substrate, wherein a portion of the transfer gate forms a cavity extending through the transfer gate. In another embodiment, a cavity extending through a transfer gate exposes a floating diffusion region.
    Type: Application
    Filed: April 15, 2011
    Publication date: October 18, 2012
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Gang Chen, Hsin-Chih Tai, Duli Mao, Howard Rhodes
  • Publication number: 20120256319
    Abstract: A method of manufacturing a semiconductor device, includes: forming a first circuit substrate having a first interconnection; forming a second circuit substrate having a second interconnection; bonding the first circuit substrate to the top surface of the second circuit substrate so as to be stacked facing each other; and performing an etching process of simultaneously removing parts formed on the first interconnection and the second interconnection in a stacked body of the first circuit substrate and the second circuit substrate so as to form a first opening in the top surface of the first interconnection and to form a second opening in the top surface of the second interconnection. The forming of the first circuit substrate includes forming an etching stopper layer on the surface of the first interconnection out of a material having an etching rate lower than that of the first interconnection in the etching process.
    Type: Application
    Filed: April 4, 2012
    Publication date: October 11, 2012
    Applicant: SONY CORPORATION
    Inventor: Ikue Mitsuhashi
  • Publication number: 20120231573
    Abstract: A process and structure of a backside illumination (BSI) image sensor are disclosed. An n-type doped region is formed in a substrate, and a transfer gate is formed on top of the semiconductor substrate. A p-type doped region is formed in the n-type doped region either using the transfer gate as a mask or is non-self aligned formed.
    Type: Application
    Filed: May 23, 2012
    Publication date: September 13, 2012
    Applicant: HIMAX IMAGING, INC.
    Inventors: YANG WU, CHI-SHAO LIN
  • Publication number: 20120205523
    Abstract: A semiconductor photodetector may provide charge carrier avalanche multiplication at high field regions of a semiconductor material layer. A semiconductor current amplifier may provide current amplification by impact ionization near a high field region. A plurality of metal electrodes are formed on a surface of a semiconductor material layer and electrically biased to produce a non-uniform high electric field in which the high electric field strength accelerates avalanche electron-hole pair generation, which is employed as an effective avalanche multiplication photodetection mechanism or as an avalanche impact ionization current amplification mechanism.
    Type: Application
    Filed: April 25, 2012
    Publication date: August 16, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Solomon Assefa, Yurii A. Vlasov, Fengnian Xia
  • Publication number: 20120133001
    Abstract: A method for forming a tileable detector array is presented.
    Type: Application
    Filed: November 30, 2010
    Publication date: May 31, 2012
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: John Eric Tkaczyk, Lowell Scott Smith, Charles Edward Baumgartner, Robert Gideon Wodnicki, Rayette Ann Fisher, Charles Gerard Woychik, Robert Stephen Lewandowski
  • Patent number: 8154099
    Abstract: In certain embodiments, a method includes forming a composite semiconductor structure for altering a rate of thermal expansion of a first substrate. The composite semiconductor structure is formed by atomically bonding a first surface of a thermal matching substrate to a first surface of the first substrate, and atomically bonding a second surface of the thermal matching substrate to a first surface of a balancing substrate. The thermal matching substrate is adapted to alter the rate of thermal expansion of the first substrate and the balancing substrate is adapted to substantially prevent warping of the composite semiconductor structure.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: April 10, 2012
    Assignee: Raytheon Company
    Inventors: Andreas Hampp, Tamara H. Wright, Heather D. Leifeste
  • Publication number: 20120038881
    Abstract: Solar cells attached to a contact lens are provided, as well as methods for making the solar cells and contact lenses. The solar cells have electrodes on only one side of the device, which facilitates attachment of the solar cell to a contact lens. In one embodiment, the solar cells are made using a “two sided” process. By using the two-sided process, solar cells of only a few microns in thickness can be fabricated. Such relatively thin solar cells can be incorporated into a contact lens without discomfort to the wearer. By providing an infinitely renewable power source on a contact lens, the solar cells enable the use of electronic components on the contact lens while eliminating the recharging or replacing issues that arise with batteries.
    Type: Application
    Filed: October 20, 2011
    Publication date: February 16, 2012
    Applicant: UNIVERSITY OF WASHINGTON
    Inventors: Babak Amirparviz, Andrew Lingley
  • Publication number: 20120001291
    Abstract: A method of manufacturing a semiconductor device includes steps of providing a substrate including a semiconductor portion, a non-porous semiconductor layer, and a porous semiconductor layer arranged between the semiconductor portion and the non-porous semiconductor layer, forming a porous oxide layer by oxidizing the porous semiconductor layer, forming a bonded substrate by bonding a supporting substrate to a surface, on a side of the non-porous semiconductor layer, of the substrate on which the porous oxide layer is formed, and separating the semiconductor portion from the bonded substrate by utilizing the porous oxide layer.
    Type: Application
    Filed: June 17, 2011
    Publication date: January 5, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Kazuo Kokumai
  • Publication number: 20110248373
    Abstract: A method of forming a mask for lithography includes the step of forming the mask by using reverse data in which positions of at least part of output terminals are reversed, when forming the mask for lithography used for manufacturing a back-illuminated solid-state imaging device which takes incident light from the side of a surface opposite to the side of a surface on which wiring of a device region in which photoelectric conversion elements are formed is formed.
    Type: Application
    Filed: June 24, 2011
    Publication date: October 13, 2011
    Applicant: SONY CORPORATION
    Inventor: Keiji Mabuchi
  • Publication number: 20110242386
    Abstract: A solid-state image pickup device includes: a plurality of unit pixels including at least a photoelectric converting section, a charge-to-voltage converting section, and one or more transfer means for transferring a charge in a predetermined path; a light shielding film for shielding a surface of the plurality of unit pixels excluding at least a light receiving section of the photoelectric converting section from light; and voltage controlling means for controlling a voltage applied to the light shielding film; wherein transfer of the charge by one of the transfer means is controlled by controlling the voltage applied to the light shielding film.
    Type: Application
    Filed: March 24, 2011
    Publication date: October 6, 2011
    Applicant: SONY CORPORATION
    Inventor: Takashi Machida
  • Publication number: 20110234830
    Abstract: Provided is a solid-state image pickup device including: a plurality of pixels, each of which includes a photoelectric conversion portion and a pixel transistor formed in a front surface side of a substrate, wherein a rear surface side of the substrate is set as a light receiving plane of the photoelectric conversion portion; and an element, which becomes a passive element or an active element, which is disposed in the front surface side of the substrate so as to be superimposed on the photoelectric conversion portion.
    Type: Application
    Filed: February 9, 2011
    Publication date: September 29, 2011
    Applicant: Sony Corporation
    Inventors: Yukihiro Kiyota, Keiji Mabuchi
  • Publication number: 20110223706
    Abstract: A photodetector is formed to have a germanium detector on a waveguide. The germanium detector has a first surface on the waveguide and a second surface that, when exposed to ambient conditions, forms germanium oxide. In a processing platform, an oxygen-free plasma is applied to the second surface. The oxygen-free plasma removes oxygen that is bonded to germanium at the second surface. A cap layer is formed on the second surface prior to removing the germanium detector from the processing platform.
    Type: Application
    Filed: March 10, 2010
    Publication date: September 15, 2011
    Inventors: JILL C. HILDRETH, Stanley M. Filipiak, Marc A. Rossow, Gregory S. Spencer, Bret T. Wilkerson
  • Publication number: 20110215226
    Abstract: Presented invention describes the approach for manufacturing of the pixels for solid state imaging devices possessing a photon detection efficiency superior to those currently available. Formation of a bipolar junction transistor (BJT) in close vicinity of the photodiode in such a way that accumulation area of the photodiode also represents its collector region allows for conversion of the photo carriers which cannot be accumulated in a regular 4T pixel, usually holes, into complimentary type carriers, usually electrons, that can be stored, read out and converted to electric signal. This transistor can be formed, for example, by creating a n+ region inside the surface p layer of the pinned photodiode. In the described structure the accumulation region is isolated from the surface and operation of the new pixel is otherwise similar to the 4T pixel operation. As a result, both main advantages of 4T pixel: low dark current and kTC noise cancellation are, therefore, preserved.
    Type: Application
    Filed: March 3, 2010
    Publication date: September 8, 2011
    Inventor: Dmitri Jerdev
  • Patent number: 7993951
    Abstract: In a method of manufacturing a photoelectric conversion device having a pixel region and a peripheral circuit region, a semiconductor compound layer is formed by causing a surface of a diffusion layer or gate electrode of a MOS transistor in the peripheral circuit region to react with a high melting point metal, then an insulating layer is formed in the pixel region and the peripheral circuit region after the step of forming a semiconductor compound layer. A contact hole is formed in the insulating layer to expose a diffusion layer in the pixel region, and a contact hole is formed in the insulating layer to expose the semiconductor compound layer formed in the peripheral circuit region. These holes are formed at different timings. Prior to forming the hole which is formed later, a contact plug is formed in the contact hole which is formed earlier.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: August 9, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takehito Okabe, Hiroaki Naruse, Ryuichi Mishima, Kouhei Hashimoto
  • Publication number: 20110180122
    Abstract: A photovoltaic device is provided. In one embodiment, a photovoltaic device includes a transparent conductive oxide (TCO) layer deposited over the substrate, and a plurality of electrical conductive paths disposed in electrical contact with the TCO layer, wherein the plurality of electrical conductive paths extend discontinuously across opposing sides of the substrate.
    Type: Application
    Filed: January 26, 2010
    Publication date: July 28, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: David Tanner, Hien-minh Huu Le, Tzay-fa Su, Dapeng Wang
  • Patent number: 7968365
    Abstract: A method for manufacturing a solid-state imaging device in which a charge generator that detects an electromagnetic wave and generates signal charges is formed on a semiconductor substrate and a negative-charge accumulated layer having negative fixed charges is formed above a detection plane of the charge generator, the method includes the steps of: forming an oxygen-feed film capable of feeding oxygen on the detection plane of the charge generator; forming a metal film that covers the oxygen-feed film on the detection plane of the charge generator; and performing heat treatment for the metal film in an inactive atmosphere to thereby form an oxide of the metal film between the metal film and the oxygen-feed film on the detection plane of the charge generator, the oxide being to serve as the negative-charge accumulated layer.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: June 28, 2011
    Assignee: Sony Corporation
    Inventors: Susumu Hiyama, Tomoyuki Hirano
  • Patent number: 7943976
    Abstract: A CMOS image sensor includes isolation regions and a photo diode region formed in a substrate, gate electrodes formed on the substrate, impurity injection regions formed in the substrate respectively positioned between the gate electrodes and the isolation regions, silicide regions formed on upper surfaces of the gate electrodes and the impurity injection regions, a first insulating layer formed on a surface of the photodiode region and sides of the gate electrodes, a second insulating layer formed on the first insulating layer, a third insulating layer formed on the second insulating layer, an interlayer insulating layer formed to cover the third insulating layer, and via plugs vertically passing through the interlayer insulating layer and connected to the silicide regions.
    Type: Grant
    Filed: October 15, 2009
    Date of Patent: May 17, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Byung-jun Park
  • Publication number: 20110089471
    Abstract: A demodulation pixel improves the charge transport speed and sensitivity by exploiting two effects of charge transport in silicon in order to achieve the before-mentioned optimization. The first one is a transport method based on the CCD gate principle. However, this is not limited to CCD technology, but can be realized also in CMOS technology. The charge transport in a surface or even a buried channel close to the surface is highly efficient in terms of speed, sensitivity and low trapping noise. In addition, by activating a majority carrier current flowing through the substrate, another drift field is generated below the depleted CCD channel. This drift field is located deeply in the substrate, acting as an efficient separator for deeply photo-generated electron-hole pairs. Thus, another large amount of minority carriers is transported to the diffusion nodes at high speed and detected.
    Type: Application
    Filed: August 16, 2010
    Publication date: April 21, 2011
    Applicant: MESA IMAGING AG
    Inventors: Bernhard Buettgen, Jonas Felber, Michael Lehmann, Thierry Oggier
  • Publication number: 20110049664
    Abstract: Provided is an epitaxial substrate for a back-illuminated image sensor and a manufacturing method thereof that is capable of suppressing metal contaminations and reducing occurrence of a white spot defect of the image sensor, by maintaining a sufficient gettering performance in a device process. The present invention includes forming a gettering sink immediately below a surface of a high-oxygen silicon substrate, forming a first epitaxial layer on the surface of the high-oxygen silicon substrate, and forming a second epitaxial layer on the first epitaxial layer, in which the step of forming the gettering sink includes forming an oxygen precipitate region by applying a long-time heat treatment at a temperature of 650-1150° C. to the high-oxygen silicon substrate.
    Type: Application
    Filed: August 31, 2010
    Publication date: March 3, 2011
    Applicant: SUMCO CORPORATION
    Inventor: Kazunari Kurita
  • Publication number: 20110042723
    Abstract: A solid-state imaging device includes a photoelectric conversion unit that includes a first region of a first conductivity type and a second region of a second conductivity type between which a pn junction is formed, the first region and the second region being formed in a signal-readout surface of a semiconductor substrate, the second region being located at a position deeper than the first region; and a transfer transistor configured to transfer signal charges accumulated in the photoelectric conversion unit to a readout drain through a channel region that lies under a surface of the first region and horizontally adjacent to the photoelectric conversion unit, the transfer transistor being formed in the signal-readout surface. The transfer transistor includes a transfer gate electrode that extends from above the channel region with a gate insulating film therebetween to above the first region so as to extend across a step.
    Type: Application
    Filed: August 11, 2010
    Publication date: February 24, 2011
    Applicant: SONY CORPORATION
    Inventor: Keiji Mabuchi
  • Publication number: 20110042772
    Abstract: In certain embodiments, a method includes forming a composite semiconductor structure for altering a rate of thermal expansion of a first substrate. The composite semiconductor structure is formed by atomically bonding a first surface of a thermal matching substrate to a first surface of the first substrate, and atomically bonding a second surface of the thermal matching substrate to a first surface of a balancing substrate. The thermal matching substrate is adapted to alter the rate of thermal expansion of the first substrate and the balancing substrate is adapted to substantially prevent warping of the composite semiconductor structure.
    Type: Application
    Filed: August 19, 2009
    Publication date: February 24, 2011
    Applicant: Raytheon Company
    Inventors: Andreas Hampp, Tamara H. Wright, Heather D. Leifeste
  • Publication number: 20110037133
    Abstract: A semiconductor photodetector structure is provided. The structure includes a substrate, a photodetecting element and a semiconductor layer disposed on the photodetecting element. The substrate includes a first semiconductor material and includes a deep trench. The surface of the deep trench includes a first type dopant. The photodetecting element is disposed in the deep trench. The photodetecting element includes a second semiconductor material. The semiconductor layer includes a second type dopant.
    Type: Application
    Filed: August 17, 2009
    Publication date: February 17, 2011
    Inventors: Tzung-I Su, Bang-Chiang Lan, Chao-An Su, Hui-Min Wu, Ming-I Wang, Chien-Hsin Huang, Tzung-Han Tan, Min Chen, Meng-Jia Lin, Wen-Yu Su
  • Publication number: 20110024604
    Abstract: The present invention provides radiation detectors with high detection sensitivity. The radiation detectors according to the present invention each include an Al2O3 substrate, a CaxCoO2 (where 0.15<x<0.55) thin film that is layered on the Al2O3 substrate and that has CoO2 planes that are aligned inclined to the surface of the Al2O3 substrate, a first electrode disposed on the CaxCoO2 thin film, and a second electrode disposed on the CaxCoO2 thin film in a position opposed to the first electrode in the direction in which the CoO2 planes are aligned inclined. The surface of the Al2O3 substrate is an n plane or an S plane.
    Type: Application
    Filed: December 2, 2009
    Publication date: February 3, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Kohei Takahashi, Tsutomu Kanno, Akihrio Sakai, Hideaki Adachi
  • Publication number: 20110024608
    Abstract: A semiconductor photodetector may provide charge carrier avalanche multiplication at high field regions of a semiconductor material layer. A semiconductor current amplifier may provide current amplification by impact ionization near a high field region. A plurality of metal electrodes are formed on a surface of a semiconductor material layer and electrically biased to produce a non-uniform high electric field in which the high electric field strength accelerates avalanche electron-hole pair generation, which is employed as an effective avalanche multiplication photodetection mechanism or as an avalanche impact ionization current amplification mechanism.
    Type: Application
    Filed: July 31, 2009
    Publication date: February 3, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Solomon Assefa, Yurii A. Vlasov, Fengnian Xia
  • Publication number: 20110003426
    Abstract: A photoelectric conversion device includes a photoelectric conversion region having a plurality of photoelectric conversion elements and a first MOS transistor configured to read a signal in response to an electric charge of each photoelectric conversion element; and a peripheral circuit region having a second MOS transistor configured to drive the first MOS transistor and/or amplify the signal read from the photoelectric conversion region, the photoelectric conversion region and the peripheral circuit region being located on the same semiconductor substrate, wherein an impurity concentration in a drain of the first MOS transistor is lower than an impurity concentration in a drain of the second MOS transistor.
    Type: Application
    Filed: September 14, 2010
    Publication date: January 6, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Takanori Watanabe, Tetsuya Itano, Hidekazu Takahashi, Shunsuke Takimoto, Kotaro Abukawa, Hiroaki Naruse, Shigeru Nishimura, Masatsugu Itahashi
  • Publication number: 20100330723
    Abstract: In a method of manufacturing a photoelectric conversion device having a pixel region and a peripheral circuit region, a semiconductor compound layer is formed by causing a surface of a diffusion layer or gate electrode of a MOS transistor in the peripheral circuit region to react with a high melting point metal, then an insulating layer is formed in the pixel region and the peripheral circuit region after the step of forming a semiconductor compound layer. A contact hole is formed in the insulating layer to expose a diffusion layer in the pixel region, and a contact hole is formed in the insulating layer to expose the semiconductor compound layer formed in the peripheral circuit region. These holes are formed at different timings. Prior to forming the hole which is formed later, a contact plug is formed in the contact hole which is formed earlier.
    Type: Application
    Filed: June 3, 2010
    Publication date: December 30, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Takehito Okabe, Hiroaki Naruse, Ryuichi Mishima, Kouhei Hashimoto
  • Publication number: 20100319760
    Abstract: This invention relates to an electronic semiconductive component comprising at least one layer (2,3) of a p-type or n-type material, wherein the layer of a said p- or n-type material is constituted by a metal hydride having a chosen dopant. The invention also relates to methods for producing the component.
    Type: Application
    Filed: February 9, 2009
    Publication date: December 23, 2010
    Inventors: Alexander G. Ulyashin, Smagul Karazhanov, Arve Holt
  • Patent number: 7855089
    Abstract: A method for manufacture of application specific solar cells includes providing and processing custom design information to determine at least a cell size and a cell shape. The method includes providing a transparent substrate having a back surface region, a front surface region, and one or more grid-line regions overlying the front side surface region. The one or more grid regions provide one or more unit cells having the cell size and the cell shape. The method further includes forming a layered structure including photovoltaic materials overlying the front surface region.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: December 21, 2010
    Assignee: Stion Corporation
    Inventors: Chester A. Farris, III, Albert S. Brown