Abstract: The invention proposes a process for producing electrical contact connections for at least one component which is integrated in a substrate material, the substrate material having a first surface region, and at least one terminal contact being arranged at least partially in the first surface region for each component, which is distinguished in particular by application of a covering to the first surface region and production of at least one contact passage which, in the substrate material, runs transversely with respect to the first surface region, in which process, in order to form at least one contact location in a second surface region which is to be provided, at least one electrical contact connection from the contact location to at least one of the terminal contacts is produced via the respective contact passages.

Abstract: A semiconductor device has an active layer, a first semiconductor layer of first conductive type, an overflow prevention layer disposed between the active layer and the first semiconductor layer, which is doped with impurities of first conductive type and which prevents overflow of electrons or holes, a second semiconductor layer of first conductive type disposed at least one of between the active layer and the overflow prevention layer and between the overflow prevention layer and the first semiconductor layer, and an impurity diffusion prevention layer disposed between the first semiconductor layer and the active layer, which has a band gap smaller than those of the overflow prevention layer, the first semiconductor layer and the second semiconductor layer and which prevents diffusion of impurities of first conductive type.

Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.

Abstract: A semiconductor device, particularly, a photoelectric conversion element having a semiconductor layer is demonstrated. The photoelectric conversion element of the present invention comprises, over a substrate, a photoelectric conversion layer and first and second electrodes which are electrically connected to the photoelectric conversion layer. The photoelectric conversion element further comprises a wiring board over which a third and fourth electrodes are provided. The characteristic point of the present invention is that a bonding layer, which readily forms an alloy with a conductive material, is formed over the first and second electrodes. This bonding layer improves the bonding strength between the first and third electrodes and the second and fourth electrode, which contributes to the prevention of the connection defect between the substrate and the wiring board and consequentially to high reliability of the photoelectric conversion element.

Abstract: Nanowire-based photodiodes are disclosed. The photodiodes include a first optical waveguide having a tapered first end, a second optical waveguide having a tapered second end, and at least one nanowire comprising at least one semiconductor material connecting the first and second ends in a bridging configuration. Methods of making the photodiodes are also disclosed.

Abstract: A photodetector including a photodiode formed in a semiconductor substrate and a waveguide element formed of a block of a high-index material extending above the photodiode in a thick layer of a dielectric superposed to the substrate, the thick layer being at least as a majority formed of silicon oxide and the block being formed of a polymer of the general formula R1R2R3SiOSiR1R2R3 where R1, R2, and R3 are any carbonaceous or metal substituents and where one of R1, R2, or R3 is a carbonaceous substituent having at least four carbon atoms and/or at least one oxygen atom.

Abstract: Diodes having p-type and n-type regions in contact, having at least one of either the p-type region or n-type region including a conjugated organic material doped with an immobile dopant, conjugated organic materials for incorporation into such diodes, and methods of manufacturing such diodes and materials are provided.

Abstract: A CCD solid state imaging module comprises a CCD area sensor, a substrate bias voltage setting device formed on said CCD area sensor for outputting a voltage, and a substrate bias voltage outputting device formed on a chip other than said CCD area sensor for outputting a substrate bias voltage of said CCD area sensor by selecting one voltage level from a plurality of voltages based on the voltage output by said substrate bias voltage setting device. A solid state imaging module suitable for a CCD area sensor having multiple driving modes can be provided.

Abstract: Embodiments relate to a complementary metal oxide semiconductor (CMOS) image sensor. According to embodiments, the CMOS image sensor may include a semiconductor substrate, an interlayer insulating layer, a color filter layer, an overcoat layer, and a plurality of microlenses. The semiconductor substrate may include a plurality of photodiodes and transistors with a constant interval. The color filter layer may be formed on the interlayer insulating layer, and respective color filters of the color filter layer correspond to respective photodiodes. The overcoat layer may have rounded trenches at a portion corresponding to each photodiode and may be formed on a surface of the semiconductor substrate. Each of the plurality of microlenses may have a convex lens shape and is formed inside the trench.

Abstract: A crystalline composition is provided. The crystalline composition may include gallium and nitrogen; and the crystalline composition may have an infrared absorption peak at about 3175 cm?1, with an absorbance per unit thickness of greater than about 0.01 cm?1.

Abstract: A complementary metal oxide semiconductor (CMOS) device and a method for fabricating the same are provided. The CMOS image sensor includes: a first conductive type substrate including a trench; a channel stop layer formed by using a first conductive type epitaxial layer over an inner surface of the trench; a device isolation layer formed on the channel stop layer to fill the trench; a second conductive type photodiode formed in a portion of the substrate in one side of the channel stop layer; and a transfer gate structure formed on the substrate adjacent to the photodiode to transfer photo-electrons generated from the photodiode.

Abstract: An apparatus comprising at least one multilayer wafer which includes a device layer adjacent to a barrier layer, and the device layer includes at least two photoconductive regions separated by an etched channel extending through the device layer. In some instances the apparatus may be an accelerometer having two photodiodes formed on a silicon-on-insulator (SOI) wafer with the photodiodes defined by one or more etched channels extending through the device layer of the SOI wafer. Also disclosed are methods for forming such an apparatus.

Abstract: A photoelectric conversion device according to the present invention has a plurality of photoreceiving portions provided in a substrate, an interlayer film overlying the photoreceiving portion, a large refractive index region which is provided so as to correspond to the photoreceiving portion and has a higher refractive index than the interlayer film, and a layer which is provided in between the photoreceiving portion and the large refractive index region, and has a lower etching rate than the interlayer film, wherein the layer of the lower etching rate is formed so as to cover at least the whole surface of the photoreceiving portion. In addition, the layer of the lower etching rate has a refractive index in between the refractive indices of the large refractive index region and the substrate. Such a configuration can provide the photoelectric conversion device which inhibits the lowering of the sensitivity and the variation of the sensitivity among picture elements.

Abstract: A photodiode and method of forming a photodiode has a substrate. An absorption layer is formed on the substrate to absorb lightwaves of a desired frequency range. A multiplication structure is formed on the absorption layer. The multiplication layer uses a low dark current avalanching material. The absorption layer and the multiplication layer are formed into at least one mesa having in an inverted “T” configuration to reduce junction area between the absorption layer and the multiplication layer. A dielectric layer is formed over the at least one mesa. At least one contact is formed on the dielectric layer and coupled to the at least one mesa.

Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. Wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Abstract: CMOS and CCD imaging devices comprising different in-pixel capacitors and peripheral capacitors and methods of formation are disclosed. The capacitors used in periphery circuits have different requirements from the capacitors used in the pixel itself. Dual stack capacitors comprising two dielectric layers may be provided to achieve low leakage and high capacitance. A single masking step may be provided such that one region has a dual dielectric capacitor and a second region has a single dielectric capacitor. A different dielectric may also be provided in one region compared to another region wherein the inter-electrode insulator comprises a single dielectric in both regions.

Abstract: A method for photo-detecting and an apparatus for the same are provided. The apparatus for photo-detecting includes a first P-N diode and a second P-N diode. The first P-N diode, has a first P-N junction which has a first thickness, by which a first electrical signal is generated when irradiated by light, and the second P-N diode has a second P-N junction which has a second thickness, by which a second electrical signal is generated when irradiated by light. The second thickness is larger than the first thickness and an operation of the first electrical signal and the second electrical signal is proceeded for obtaining a third electrical signal.

Abstract: A method of manufacturing of a photodiode is provided. The photodiode is formed on a substrate of a first conductive type. First, an isolation structure is formed in the substrate to define a photosensitive area in the substrate. Thereafter, trenches are formed in the substrate. Next, a doped layer of a second conductive type is formed on the substrate. The doped layer covers at least the inner wall of the trenches and a top portion of the substrate. The method of fabricating the photodiode can reduce overall processing time and cost and improve production efficiency.

Abstract: Image sensors and methods of fabricating the same are provided. The image sensor includes a blocking pattern disposed on photodiodes. The blocking pattern is formed of insulation material having a metal diffusion coefficient which is lower than a silicon oxide diffusion coefficient. Therefore, dark defects of the image sensor are reduced. In addition, the image sensor includes a color-ratio control layer. The color ratio control layer controls color ratios between the sensitivities to blue, green and red. As a result, color distinction of the picture that is embodied by the image sensor can be improved.

Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. Wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Abstract: A forward light monitoring photodiode having a high reflection film with low dark current for detecting forward light emitted from a laser diode and power of the laser diode in spite of the change of temperatures or yearly degradation. The high reflection film is made by depositing an SiON layer upon an InP window layer or an InP substrate by a plasma CVD method. Al2O3/Si reciprocal layers or Al2O3/TiO2 reciprocal layers are produced upon the SiON layer. The high reflection film reflects 80%-90% of a 45 degree inclination incidence beam and allows 20%-10% of the incidence beam to pass the film and arrive at the InP window or substrate.

Abstract: A solid-state imaging device includes: a plurality of light-receiving parts arranged in an array in a substrate and performing photoelectric conversion on incident light; and a plurality of color separators each provided for adjacent four of the light-receiving parts arranged in two rows and two columns. In each of the color separators, absorption color filters and transmission color filters are combined.

Abstract: A photodiode for detection of preferably infrared radiation wherein photons are absorbed in one region and detected in another. In one example embodiment, an absorbing P region is abutted with an N region of lower doping such that the depletion region is substantially (preferably completely) confined to the N region. The N region is also chosen with a larger bandgap than the P region, with compositional grading of a region of the N region near the P region. This compositional grading mitigates the barrier between the respective bandgaps. Under reverse bias, the barrier is substantially reduced or disappears, allowing charge carriers to move from the absorbing P region into the N region (and beyond) where they are detected. The N region bandgap is chosen to be large enough that the dark current is limited by thermal generation from the field-free p-type absorbing volume, and also large enough to eliminate tunnel currents in the wide gap region of the diode.

Abstract: A process for manufacturing encapsulated optical sensors, including the steps of: forming a plurality of mutually spaced optical sensors in a wafer of semiconductor material; bonding a plate of transparent material to the wafer so as to seal the optical sensors; and dividing the wafer into a plurality of dies, each comprising an optical sensor and a respective portion of the plate.

Abstract: An avalanche photodiode includes at least one crystal layer having a larger band-gap than that of an absorption layer formed by a composition or material different from that of the absorption layer formed on a junction interface between a compound semiconductor absorbing an optical signal and an Si multiplication layer, and the crystal layer may be intentionally doped with n or p type impurities to cancel electrical influences of the impurities containing oxides present on the junction interface of compound semiconductor and surface of Si.

Abstract: An image sensor including a pixel assembly, each pixel including a photodiode and an access transistor connected to a read circuit, the photodiode and the access transistor being formed in and above a first semiconductor substrate, all or part of the read circuit being formed in a second semiconductor substrate, the second substrate being placed above the first substrate and separated therefrom by an intermediary insulating layer covering the access transistor, the photodiode receiving incident photons on its lower surface side opposite to the intermediary insulating layer.

Abstract: A device manufacturing method, including: a first process for providing the plural elements on the original substrate via a separation layer in a condition where terminal sections are exposed to a surface on an opposite side to the separation layer; a second process for adhering the surface where the terminal sections of the elements to be transferred on the original substrate are exposed, via conductive adhesive, to a surface of the final substrate on a side where conductive sections for conducting with the terminal sections of the elements are provided; a third process for producing exfoliation in the separation layer between the original substrate and the final substrate; and a fourth process for separating the original substrate from which the transfer of elements has been completed, from the final substrate.

Abstract: An apparatus comprising at least one multilayer wafer includes a device layer adjacent to a barrier layer, and the device layer includes at least two photoconductive regions separated by an etched channel extending through the device layer. In some instances the apparatus may be an accelerometer having two photodiodes formed on a silicon-on-insulator (SOI) wafer with the photodiodes defined by one or more etched channels extending through the device layer of the SOI wafer. Also disclosed are methods for forming such an apparatus.

Abstract: There is a demand of a solid-state imaging device capable of being driven at a high speed and in which the shading of sensitivity and illuminance defect can be prevented from being caused. A solid-state imaging device (20) comprises a light-receiving sensor section disposed on the surface layer portion of a substrate (21) for performing a photoelectric conversion, a charge transfer section for transferring a signal charge read out from the light-receiving sensor section, a transfer electrode (27) (28) made of polysilicon formed on a substrate (21) at its position approximately above the charge transfer section through an insulating film (26), and an interconnection made of polysilicon and interconnected to the transfer electrode (27) (28). At least one of the polysilicon transfer electrode (27)(28) and the interconnection is formed on a polysilicon layer (27a) (28a) by selectively depositing a high-melting point metal having a resistance value lower than that of polysilicon.

Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.

Abstract: The invention provides a nitride semiconductor light-emitting device comprising gallium nitride semiconductor layers formed on a heterogeneous substrate, wherein light emissions having different light emission wavelengths or different colors are given out of the same active layer. Recesses 106 are formed by etching in the first electrically conductive (n) type semiconductor layer 102 formed on a substrate with a buffer layer interposed between them. Each recess is exposed in plane orientations different from that of the major C plane. For instance, the plane orientation of the A plane is exposed. An active layer is grown and joined on the plane of this plane orientation, on the bottom of the recess and the C-plane upper surface of a non-recess portion. The second electrically conductive (p) type semiconductor layer is formed on the inner surface of the recess.

Abstract: A semiconductor structure, having a doped well region being formed in a substrate layer and a transistor having a terminal provided within said doped well region. The semiconductor structure also includes an oxide layer formed over the substrate layer, the doped well region, a poly silicon region, and the terminal of the transistor. The oxide layer including a step region being located where a height of the oxide layer transitions from a height associated with the doped well region to a height associated with the terminal of the transistor.

Abstract: Provided are a semiconductor light-emitting device having nano-needles and a method of manufacturing the same. The provided semiconductor light-emitting device improves the extraction efficiency of photons, and includes a gallium nitride (GaN) group multi-layer and nano-needles grown on the GaN group multi-layer. The nano-needles improve the extraction efficiency of photons.

Abstract: A method for manufacturing optoelectronic devices is disclosed. A layered structure may be formed with a plurality of layers including a bottom electrode layer, a top electrode layer, and one or more active layers between the top and bottom electrode layers. The layered structure is divided into one or more separate device module sections by cutting through one or more of the layers of the layered structure. At least one of the layers is an unpatterned layer at the time of cutting. Each of the resulting device module sections generally includes a portion of the active layer disposed between portions of the top and bottom electrode layers. An edge of a device section may optionally be protected against undesired electrical contact between two or more of the bottom electrode, top electrode and active layer portions.