Light Source Controlled By Radiation-sensitive Semiconductor Device (e.g., Image Converter, Image Amplifier, Image Storage Device) (epo) Patents (Class 257/E31.097)
  • Patent number: 11830901
    Abstract: An optical system (400) including a microlens array (104), an image sensor (108) and a PCB (206). The microlens array (104) is bonded to the image sensor (108) with glue lines (804) or glue drops (802) dispensed around the non-active area (404) of the microlens array (104). The image sensor (108) may be bonded to the PCB (206) with a layer of adhesive material (502) applied only on a central region of the image sensor (108). Alternatively, the image sensor can rest onto a thermally conductive resin layer (109) placed over a stiffener (207), and the image sensor can be attached to the PCB (206) by one or more glue drops (111) or glue lines (113) arranged on at least one side of the image sensor (108) or by an adhesive layer (115) laterally surrounding the image sensor (108). The optical system (400) solves the problem of misalignment between the image sensor and the microlens array caused by changes in temperature.
    Type: Grant
    Filed: January 16, 2021
    Date of Patent: November 28, 2023
    Assignee: PHOTONIC SENSORS & ALGORITHMS, S.L.
    Inventors: Jorge Blasco, Ivan Virgilio Perino, Leticia CarriĆ³n, Javier Grandia, Francisco Alventosa
  • Patent number: 11769774
    Abstract: The present technology relates to a solid-state imaging device and an electronic device for increasing the degree of freedom regarding arrangement of transistors. Provided are a photoelectric conversion unit, a trench penetrating a semiconductor substrate in a depth direction and formed between the photoelectric conversion units respectively formed in adjacent pixels, and a PN junction region configured by a P-type region and an N-type region on a sidewall of the trench, in which a part of sides surrounding the photoelectric conversion unit includes a region where the P-type region is not formed or a region where the P-type region is thinly formed. The PN junction region is formed on at least one side of four sides surrounding the photoelectric conversion unit, and the P-type region is not formed on the remaining sides. The present technology can be applied to, for example, a back-illuminated-type CMOS image sensor.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: September 26, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Masashi Ohura
  • Patent number: 11677208
    Abstract: An optical amplification device includes a first Raman amplifier outputs a first excitation light to a transmission line in a same direction as a signal light, and a second Raman amplifier outputs a second excitation light to the transmission line in an opposite direction to the signal light. The first Raman amplifier includes a first detector detects a first power of a first transmitted light transmitted through a first optical filter. The second Raman amplifier includes a second detector detects second power of a second transmitted light transmitted through a second optical filter. The first Raman amplifier stops output of the first excitation light when the first power is higher than a threshold. The second Raman amplifier stops output of the second excitation light when the second power is reduced from power of the first excitation light transmitted through the second optical filter.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: June 13, 2023
    Assignee: FUJITSU LIMITED
    Inventor: Yusaku Yamamoto
  • Patent number: 9881955
    Abstract: A photodetector includes a first doped region disposed in a semiconductor material and a second doped region disposed in the semiconductor material. The second doped region is electrically coupled to the first doped region, and the second doped region is of an opposite majority charge carrier type as the first doped region. The photodetector also includes a quantum dot layer disposed in a trench in the semiconductor material, and the quantum dot layer is electrically coupled to the second doped region. A transfer gate is disposed to permit charge transfer from the second doped region to a floating diffusion.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: January 30, 2018
    Assignee: OmniVision Technologies, Inc.
    Inventors: Dajiang Yang, Gang Chen, Duli Mao, Dyson H. Tai
  • Patent number: 9000541
    Abstract: A photoelectric conversion device includes circuit portions disposed on a substrate, a first electrode electrically connected to one of the circuit portions, an optically transparent second electrode opposing the first electrode, and a photoelectric conversion portion disposed between the first electrode and the second electrode. The photoelectric conversion portion has a multilayer structure including a light absorption layer made of a p-type compound semiconductor film having a chalcopyrite structure, an amorphous oxide semiconductor layer, and a window layer made of an n-type semiconductor film.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: April 7, 2015
    Assignee: Seiko Epson Corporation
    Inventors: Yasunori Hattori, Tomotaka Matsumoto, Tsukasa Eguchi
  • Patent number: 8947566
    Abstract: The first face of the pad is situated between the front-side face of the second semiconductor substrate and a hypothetical plane including and being parallel to the front-side face, and a second face of the pad that is a face on the opposite side of the first face is situated between the first face and the front-side face of the second semiconductor substrate, and wherein the second face is connected to the wiring structure so that the pad is electrically connected to the circuit arranged in the front-side face of the second semiconductor substrate via the wiring structure.
    Type: Grant
    Filed: June 22, 2011
    Date of Patent: February 3, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masahiro Kobayashi, Mineo Shimotsusa
  • Patent number: 8946797
    Abstract: There is provided a solid-state imaging device including a sensor substrate having a sensor-side semiconductor layer including a pixel region in which a photoelectric conversion section is provided and a sensor-side wiring layer provided on an opposite surface side from a light receiving surface of the sensor-side semiconductor layer, a circuit substrate having a circuit-side semiconductor layer and a circuit-side wiring layer and provided on a side of the sensor-side wiring layer of the sensor substrate, a connection unit region in which a connection section is provided, the connection section having a first through electrode, a second through electrode, and a connection electrode connecting the first through electrode and the second through electrode, and an insulating layer having a step portion which has the connection electrode embedded therein and has a film thickness that gradually decreases from the connection unit region to the pixel region.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: February 3, 2015
    Assignee: Sony Corporation
    Inventors: Kyohei Mizuta, Osamu Oka, Kaoru Koike, Nobutoshi Fujii, Hideki Kobayashi, Hirotaka Yoshioka
  • Patent number: 8916917
    Abstract: According to one embodiment, a solid-state imaging device includes a first element formation region surrounded by an element isolation region in a semiconductor substrate having a first and a second surface, an upper element isolation layer on the first surface in the element formation region, a lower element isolation layer between the second surface and the upper element isolation layer, a first photodiode in the element formation region, a floating diffusion in the element formation region, and a first transistor disposed between the first photodiode and the floating diffusion. A side surface of the lower element isolation layer protrudes closer to the transistor than a side surface of the upper element isolation layer.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: December 23, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shogo Furuya, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Patent number: 8883526
    Abstract: An image pickup device, wherein a part of the carriers overflowing from the photoelectric conversion unit for a period of photoelectrically generating and accumulating the carriers may be flowed into the floating diffusion region, and a pixel signal generating unit generating a pixel signal according to the carriers stored in the photoelectric conversion unit and the carriers having overflowed into the floating diffusion region, is provided. The expansion of a dynamic range and the improvement of an image quality can be provided by controlling a ratio of the carriers flowing into the floating diffusion region to the carriers overflowing from such a photoelectric conversion unit at high accuracy.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: November 11, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akira Okita, Toru Koizumi, Isamu Ueno, Katsuhito Sakurai
  • Patent number: 8878267
    Abstract: A purpose of the present invention is to provide a preferable separation structure of wells when a photoelectric conversion unit and a part of a peripheral circuit unit or a pixel circuit are separately formed on separate substrates and electrically connected to each other. To this end, a solid-state imaging device includes a plurality of pixels including a photoelectric conversion unit and a amplification transistor configured to amplify a signal generated by the photoelectric conversion unit; a first substrate on which a plurality of the photoelectric conversion units are disposed; and a second substrate on which a plurality of the amplification transistors are disposed. A well of a first conductivity type provided with a source region and a drain region of the amplification transistor is separated from a well, which is disposed adjacent to the well in at least one direction, of the first conductivity type provided with the source region and the drain region of the amplification transistor.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: November 4, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Fumihiro Inui
  • Patent number: 8878265
    Abstract: According to one embodiment, a solid-state imaging device includes a first element formation region surrounded by an element isolation region in a semiconductor substrate having a first and a second surface, an upper element isolation layer on the first surface in the element formation region, a lower element isolation layer between the second surface and the upper element isolation layer, a first photodiode in the element formation region, a floating diffusion in the element formation region, and a first transistor disposed between the first photodiode and the floating diffusion. A side surface of the lower element isolation layer protrudes closer to the transistor than a side surface of the upper element isolation layer.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: November 4, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shogo Furuya, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Patent number: 8853852
    Abstract: A method for manufacturing the semiconductor apparatus includes an anchor process of forming a barrier metal film and carrying out physical etching making use of sputter gas. The anchor process is carried out at the same time on a wire connected to the lower portion of a first aperture serving as a penetration connection hole and a wire connected to the lower portion of a second aperture serving as a connection hole having an aspect ratio different from the aspect ratio of the penetration connection hole. The first and second apertures are apertures created on a semiconductor substrate obtained by bonding first and second semiconductor substrates to each other. The present technology can be applied to the semiconductor apparatus such as a solid-state imaging apparatus.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: October 7, 2014
    Assignee: Sony Corporation
    Inventor: Toshihiko Hayashi
  • Patent number: 8829528
    Abstract: A step for forming an island-shaped semiconductor layer of a semiconductor device used in a display device is omitted in order to manufacture the semiconductor device with high productivity and low cost. The semiconductor device is manufactured through four photolithography processes: four steps for forming a gate electrode, for forming a source electrode and a drain electrode, for forming a contact hole, and for forming a pixel electrode. In the step for forming the contact hole, a groove portion in which a semiconductor layer is removed is formed, whereby formation of a parasitic transistor is prevented. An oxide semiconductor is used as a material of the semiconductor layer in which a channel is formed, and an oxide semiconductor having a higher insulating property than the semiconductor layer is provided over the semiconductor layer.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: September 9, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 8823123
    Abstract: According to one embodiment, there is provided a solid-state image sensor including a photoelectric conversion layer, and a multilayer interference filter. The multilayer interference filter is arranged to conduct light of a particular color, of incident light, selectively to the photoelectric conversion layer. The multilayer interference filter has a laminate structure in which a first layer having a first refraction index and a second layer having a second refraction index are repeatedly laminated, and a third layer which is in contact with a lower surface of the laminate structure and has a third refraction index. A lowermost layer of the laminate structure is the second layer. The third refraction index is not equal to the first refraction index and is higher than the second refraction index.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: September 2, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Kokubun, Yusaku Konno
  • Patent number: 8754424
    Abstract: Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: June 17, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Scott D. Schellhammer, Vladimir Odnoblyudov, Jeremy S. Frei
  • Patent number: 8748946
    Abstract: An electrical component includes a semiconductor layer having a first conductivity type and a interconnect layer disposed adjacent to a frontside of the semiconductor layer. At least one bond pad is disposed in the interconnect layer and formed adjacent to the frontside of the semiconductor layer. An opening formed from the backside of the semiconductor layer and through the semiconductor layer exposes at least a portion of the bond pad. A first region having a second conductivity type extends from the backside of the semiconductor layer to the frontside of the semiconductor layer and surrounds the opening. The first region can abut a perimeter of the opening or alternatively, a second region having the first conductivity type can be disposed between the first region and a perimeter of the opening.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: June 10, 2014
    Assignee: Omnivision Technologies, Inc.
    Inventors: John P. McCarten, Cristian A. Tivarus
  • Patent number: 8736009
    Abstract: The image sensor includes a substrate, an insulating structure formed on a first surface of the substrate and including a first metal wiring layer exposed by a contact hole penetrating the substrate, a conductive spacer formed on sidewalls of the contact hole and electrically connected to the first metal wiring layer, and a pad formed on a second surface of the substrate and electrically connected to the first metal wiring layer.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 27, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung Jun Park, Yong Woo Lee, Chang Rok Moon
  • Patent number: 8669632
    Abstract: A solid-state imaging device and a method for manufacturing the same are provided. The solid-state imaging device includes a structure that provides a high sensitivity and high resolution without variations in spectral sensitivity and without halation of colors, and prevents light from penetrating into an adjacent pixel portion. A plurality of photodiodes are formed inside a semiconductor substrate. A wiring layer includes a laminated structure of an insulating film and a wire and is formed on the semiconductor substrate. A plurality of color filters are formed individually in a manner corresponding to the plurality of photodiodes above the wiring layer. A planarized film and a microlens are sequentially laminated on each of the color filters. In the solid-state imaging device, each of the color filters has an refraction index higher than that of the planarized film and has, in a Z-axis direction, an upper surface in a concave shape.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: March 11, 2014
    Assignee: Panasonic Corporation
    Inventors: Tetsuya Nakamura, Motonari Katsuno, Masayuki Takase, Masao Kataoka
  • Patent number: 8581307
    Abstract: An image sensor pixel includes a photosensitive element having a first doping type disposed in semiconductor material. A deep extension having the first doping type is disposed beneath and overlapping the photosensitive element in the semiconductor material. A floating diffusion is disposed in the semiconductor material. A transfer gate is disposed over a gate oxide that is disposed over the semiconductor material. The transfer gate is disposed between the photosensitive element and the floating diffusion. The photosensitive element and the deep extension are stacked in the semiconductor material in a ā€œUā€ shape extending from under the transfer gate.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: November 12, 2013
    Assignee: OmniVision Technologies, Inc.
    Inventors: Gang Chen, Duli Mao, Hsin-Chih Tai
  • Patent number: 8575531
    Abstract: The present invention provides a junction gate photo-diode (JGP) pixel that includes a JGP accumulating charge in response to impinging photons. The JGP is positioned on a substrate and includes a top n layer, a middle p layer and a bottom n layer forming a n-p-n junction, and a control terminal coupled to the top n layer. Also includes is a floating diffusion (FD) positioned on the substrate and coupled to a pixel output line through an amplifier. Also includes is a pinned barrier (PB) and a storage gate (SG) positioned on the substrate between the JGP and the FD. The PB temporarily blocks charge transfer between the JGP and the FD, and the SG stores the accumulated charge from the JGP, and transfers the stored charge to the FD for readout.
    Type: Grant
    Filed: August 16, 2011
    Date of Patent: November 5, 2013
    Assignee: Aptina Imaging Corporation
    Inventors: Jaroslav Hynecek, Hirofumi Komori
  • Patent number: 8569805
    Abstract: A floating diffusion (331) is created substantially at center of the light-receiving surface of an embedded photodiode (31), with a gate electrode of a transfer transistor (32) surrounding the floating diffusion. The concentration (or depth) of impurities in a p+-type semiconductor region, n-type semiconductor region or p-well region is changed in an inclined form so that a potential gradient being inclined downwards from the circumference to the center is created when an appropriate bias voltage is applied to the pn junction. The photocharges produced by incident light are rapidly moved along the potential gradient toward the center. Even in the case where the photocharge storage time is short, the photocharges can be efficiently collected since the maximum moving distance from the circumference of the photodiode (31) to the floating diffusion (331). Thus, the photocharges produced by the photodiode (31) are efficiently utilized, whereby the detection sensitivity is improved.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: October 29, 2013
    Assignees: Tohoku University, Shimadu Corporation
    Inventors: Shigetoshi Sugawa, Yasushi Kondo, Hideki Tominaga
  • Patent number: 8552516
    Abstract: According to one embodiment, a solid state image capture device includes a multilayered interconnect layer, a semiconductor substrate, a pillar diffusion layer and an insulating member. The multilayered interconnect layer includes an interconnect. The semiconductor substrate is provided on the multilayered interconnect layer and the semiconductor substrate has a through-trench. The pillar diffusion layer is formed in the semiconductor substrate around the through-trench. In addition, an insulating member is filled into the through-trench.
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: October 8, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Murakoshi, Tsubasa Harada
  • Patent number: 8547459
    Abstract: A solid-state imaging device, includes: plural unit pixels including a photoelectric conversion portion converting incident light into an electrical signal, and a waveguide having a quadratic curve surface at an inner surface and introducing the incident light to the photoelectric conversion portion.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: October 1, 2013
    Assignee: Sony Corporation
    Inventors: Yoshimichi Kumagai, Hiroaki Ishiwata
  • Patent number: 8519379
    Abstract: An embodiment relates to a device comprising a substrate, a nanowire and a doped epitaxial layer surrounding the nanowire, wherein the nanowire is configured to be both a channel to transmit wavelengths up to a selective wavelength and an active element to detect the wavelengths up to the selective wavelength transmitted through the nanowire. Another embodiment relates to a device comprising a substrate, a nanowire and one or more photogates surrounding the nanowire, wherein the nanowire is configured to be both a channel to transmit wavelengths up to a selective wavelength and an active element to detect the wavelengths up to the selective wavelength transmitted through the nanowire, and wherein the one or more photogates comprise an epitaxial layer.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: August 27, 2013
    Assignee: Zena Technologies, Inc.
    Inventors: Young-June Yu, Munib Wober
  • Patent number: 8471254
    Abstract: A laminate structure and method of manufacture, such as a processed silicon wafer with an overlying layer or cover, includes a first layer or substrate which has a generally-planar region and a peripheral contoured region with falloff from a planar region of the first layer, and a second layer which overlies the first layer and is spaced from the planar region of the first layer a uniform distance by a plurality of uniform spacers, and peripheral spacers located in the peripheral contoured region which extend from the first layer to the second layer to maintain the second layer in the same plane as it extends over the falloff of the peripheral contoured region of the first layer to increase the useable area of the laminate structure. Spherical, deformable and fixed dimension spacers are used.
    Type: Grant
    Filed: December 27, 2005
    Date of Patent: June 25, 2013
    Assignee: Hana Microdisplay Technologies, Inc.
    Inventor: Dean Eshleman
  • Patent number: 8450137
    Abstract: The present invention discloses a method for reducing the tilt of a transparent window during manufacturing of an image sensor. The method includes the following steps: providing a semimanufacture of the image sensor; carrying out a preheating process; carrying out an adhesive spreading process; carrying out a transparent window closing process; and carrying out a packaging process. By carrying out the preheating process, the environmental conditions can be stabilized during the adhesive spreading process and the transparent window closing process such that the transparent window can be kept highly flat after combining. By the implementation of the present invention, the chance of tilt and crack of the transparent window during manufacturing of the image sensor can be reduced, thereby achieving the goal for a better yield rate.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: May 28, 2013
    Assignee: Kingpak Technology Inc.
    Inventors: Chun-Hua Chuang, Yao-Nien Chuang, Tiao-Mu Hsu, Chien-Wei Chang, Chien-Hen Lin, Chen-Pin Peng, Chung-Hsien Hsin
  • Patent number: 8436370
    Abstract: Provided is an optical modulator having pixelization patterns. The optical modulator includes an optical-electric (O-E) conversion element converting input optical images to current signals using the photoelectric effect, and an electric-optical (E-O) conversion element that emits light using the current signals transferred from the O-E conversion element. Trenches are formed from at least a surface of the optical modulator to a predetermined depth in the optical modulator so as to block or reduce electrical interference between pixels when the electric signals are transferred from the O-E conversion element to the E-O conversion element.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: May 7, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-hwa Park, Yong-chul Cho, Soo-haeng Cho
  • Patent number: 8435823
    Abstract: According to one embodiment, a method of manufacturing a back-illuminated solid-state imaging device including forming a mask with apertures corresponding to a pixel pattern on the surface of a semiconductor layer, implanting second-conductivity-type impurity ions into the semiconductor layer from the front side of the layer to form second-conductivity-type photoelectric conversion parts and forming a part where no ion has been implanted into a pixel separation region, forming at the surface of the semiconductor layer a signal scanning circuit for reading light signals obtained at the photoelectric conversion parts after removing the mask, and removing the semiconductor substrate and a buried insulating layer from the semiconductor layer after causing a support substrate to adhere to the front side of the semiconductor layer.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: May 7, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hirofumi Yamashita
  • Patent number: 8431429
    Abstract: A method of fabricating a backside illuminated imaging sensor that includes a device layer, a metal stack, and an opening is disclosed. The device layer has an imaging array formed in a front side of the device layer, where the imaging array is adapted to receive light from a back side of the device layer. The metal stack is coupled to the front side of the device layer and includes at least one metal interconnect layer having a metal pad. The opening extends from the back side of the device layer to the metal pad to expose the metal pad for wire bonding. The method includes depositing a film on the back side of the device layer and within the opening, then etching the film to form a frame within the opening to structurally reinforce the metal pad.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: April 30, 2013
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hsin-Chih Tai, Howard E. Rhodes, Duli Mao, Vincent Venezia, Yin Qian
  • Patent number: 8426938
    Abstract: The image sensor includes a substrate, an insulating structure formed on a first surface of the substrate and including a first metal wiring layer exposed by a contact hole penetrating the substrate, a conductive spacer formed on sidewalls of the contact hole and electrically connected to the first metal wiring layer, and a pad formed on a second surface of the substrate and electrically connected to the first metal wiring layer.
    Type: Grant
    Filed: February 15, 2010
    Date of Patent: April 23, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung Jun Park, Yong Woo Lee, Chang Rok Moon
  • Publication number: 20130049016
    Abstract: Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.
    Type: Application
    Filed: August 29, 2011
    Publication date: February 28, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Scott D. Schellhammer, Vladimir Odnoblyudov, Jeremy S. Frei
  • Publication number: 20130049019
    Abstract: Exemplary embodiments of the described technology relate generally to display devices including dye-sensitized solar cells. The display device according to an exemplary embodiment includes a display element for displaying an image, and a dye-sensitized solar cell for converting light into electricity to offset the power consumption of the display element. The dye-sensitized solar cell includes a selective photo-absorption material for selectively absorbing light from at least one wavelength band.
    Type: Application
    Filed: November 29, 2011
    Publication date: February 28, 2013
    Inventor: Chang-Yun Moon
  • Patent number: 8350305
    Abstract: A solid-state imaging device is provided. The solid-state imaging device includes: pixels arrayed; a photoelectric conversion element in each of the pixels; a read transistor for reading electric charges photoelectrically-converted in the photoelectric conversion elements to a floating diffusion portion; a shallow trench element isolation region bordering the floating diffusion portion; and an impurity diffusion isolation region for element isolation regions other than the shallow trench element isolation region.
    Type: Grant
    Filed: January 4, 2008
    Date of Patent: January 8, 2013
    Assignee: Sony Corporation
    Inventors: Kazuichiro Itonaga, Yu Oya
  • Patent number: 8349638
    Abstract: To provide a solid-state imaging device able to improve light transmittance of a transparent insulation film in a light incident side of a substrate, suppress the dark current, and prevent a quantum efficiently loss, wherein a pixel circuit is formed in a first surface of the substrate and light is received from a second surface, and having: a light receiving unit formed in the substrate and for generating a signal charge corresponding to an amount of incidence light and storing it; a transparent first insulation film formed on the second surface; and a transparent second insulation film formed on the first insulation film and for retaining a charge having the same polarity as the signal charge in an interface of the first insulation film or in inside, thicknesses of the first and second insulation film being determined to obtain a transmittance higher than when using only the first insulation film.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: January 8, 2013
    Assignee: Sony Corporation
    Inventors: Hideo Kanbe, Takayuki Ezaki
  • Publication number: 20120322193
    Abstract: A solid-state imaging device includes: a photoelectric conversion portion that receives an incident light from a back surface side of a silicon layer to perform photoelectric conversion on the incident light; and a pixel transistor portion that outputs signal charges generated in the photoelectric conversion portion towards a front surface side of the silicon layer, wherein a gettering layer having internal stress is provided on the front surface side of the silicon layer at a position to overlap the photoelectric conversion portion on a plan view layout thereof.
    Type: Application
    Filed: August 15, 2012
    Publication date: December 20, 2012
    Applicant: SONY CORPORATION
    Inventor: Chiaki Sakai
  • Patent number: 8309433
    Abstract: A method of manufacturing an optical sensor includes the steps of providing a semiconductor wafer having a plurality of pixel areas; forming a grid-like rib enclosing each pixel area on the semiconductor wafer, the grid-like rib having a predetermined width and being formed from a fixing member; providing a light-transmissive substrate having a gap portion on a main surface thereof, the gap portion having at least one of a groove having a width smaller than the grid-like rib and a plurality of through-holes; fixing the semiconductor wafer and the light-transmissive substrate such that the grid-like rib and the gap portion face each other; and cutting the fixed semiconductor wafer and light-transmissive substrate into pieces such that each piece includes one pixel area.
    Type: Grant
    Filed: August 16, 2011
    Date of Patent: November 13, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yasuhiro Matsuki, Takanori Suzuki, Koji Tsuduki, Shin Hasegawa, Tadashi Kosaka, Akiya Nakayama
  • Publication number: 20120273653
    Abstract: The present invention relates to a junction gate photo-diode (JGP) pixel that includes a JGP for accumulating charge in response to impinging photons. The JGP is positioned on a substrate and includes a top n layer, a middle p layer and a bottom n layer forming a n-p-n junction, and a control terminal coupled to the top n layer. Also included is a floating diffusion (FD) positioned on the substrate and coupled to a pixel output line through an amplifier. Also included is a pinned barrier (PB) positioned on the substrate between the JGP and the FD, the PB temporarily blocks charge transfer between the JGP and the FD. The accumulated charge is transferred from the JGP to FD by applying a control voltage to the JGP control terminal.
    Type: Application
    Filed: August 16, 2011
    Publication date: November 1, 2012
    Applicant: APTINA IMAGING CORPORATION
    Inventors: Jaroslav HYNECEK, Hirofumi Komori, Xia Zhao
  • Publication number: 20120273654
    Abstract: The present invention provides a junction gate photo-diode (JGP) pixel that includes a JGP accumulating charge in response to impinging photons. The JGP is positioned on a substrate and includes a top n layer, a middle p layer and a bottom n layer forming a n-p-n junction, and a control terminal coupled to the top n layer. Also includes is a floating diffusion (FD) positioned on the substrate and coupled to a pixel output line through an amplifier. Also includes is a pinned barrier (PB) and a storage gate (SG) positioned on the substrate between the JGP and the FD. The PB temporarily blocks charge transfer between the JGP and the FD, and the SG stores the accumulated charge from the JGP, and transfers the stored charge to the FD for readout.
    Type: Application
    Filed: August 16, 2011
    Publication date: November 1, 2012
    Applicant: APTINA IMAGING CORPORATION
    Inventors: Jaroslav Hynecek, Hirofumi Komori
  • Patent number: 8299511
    Abstract: An image sensor pixel that includes a photoelectric conversion unit supported by a substrate and an insulator adjacent to the substrate. The pixel includes a cascaded light guide that is located within an opening of the insulator and extends above the insulator such that a portion of the cascaded light guide has an air interface. The air interface improves the internal reflection of the cascaded light guide. The cascaded light guide may include a self-aligned color filter having air-gaps between adjacent color filters. These characteristics of the light guide eliminate the need for a microlens. Additionally, an anti-reflection stack is interposed between the substrate and the light guide to reduce backward reflection from the image sensor. Two pixels of having different color filters may have a difference in the thickness of an anti-reflection film within the anti-reflection stack.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: October 30, 2012
    Assignee: CANDELA Microsystems (S) Pte. Ltd.
    Inventors: Hiok Nam Tay, Thanh-Trung Do
  • Patent number: 8293560
    Abstract: A method of manufacturing a photoelectric conversion device, comprises forming a first insulating film on a semiconductor substrate, forming a gate electrode by forming an electrically conductive layer on the first insulating film and patterning the electrically conductive layer, etching an exposed surface of the first insulating film, forming a charge accumulation region of a photoelectric converter by implanting impurity ions of a first conductivity type into the semiconductor substrate through a thinned portion of the first insulating film formed by the etching, removing the thinned portion, forming a second insulating film covering the semiconductor substrate and the gate electrode, and forming a surface region of the photoelectric converter by implanting impurity ions of a second conductivity type opposite to the first conductivity type into the semiconductor substrate through the second insulating film.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: October 23, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventor: Katsunori Hirota
  • Patent number: 8294185
    Abstract: A solid-state imaging device includes: a photoelectric conversion portion that receives an incident light from a back surface side of a silicon layer to perform photoelectric conversion on the incident light; and a pixel transistor portion that outputs signal charges generated in the photoelectric conversion portion towards a front surface side of the silicon layer, wherein a gettering layer having internal stress is provided on the front surface side of the silicon layer at a position to overlap the photoelectric conversion portion on a plan view layout thereof.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: October 23, 2012
    Assignee: Sony Corporation
    Inventor: Chiaki Sakai
  • Patent number: 8258506
    Abstract: Provided is a photoelectric conversion device comprising an electrically conductive film, a photoelectric conversion film, and a transparent electrically conductive film, wherein said photoelectric conversion film contains a crystallized fullerene or fullerene derivative, and said crystallized fullerene or fullerene derivative is oriented in the (111) direction perpendicularly to the film surface of said electrically conductive film.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: September 4, 2012
    Assignee: Fujifilm Corporation
    Inventor: Tetsuro Mitsui
  • Patent number: 8247852
    Abstract: A backside illuminated imaging sensor with reinforced pad structure includes a device layer, a metal stack, an opening and a frame. The device layer has an imaging array formed in a front side of the device layer and the imaging array is adapted to receive light from a back side of the device layer. The metal stack is coupled to the front side of the device layer where the metal stack includes at least one metal interconnect layer having a metal pad. The opening extends from the back side of the device layer to the metal pad to expose the metal pad for wire bonding. The frame is disposed within the opening to structurally reinforce the metal pad.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: August 21, 2012
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hsin-Chih Tai, Howard E. Rhodes, Duli Mao, Vincent Venezia, Yin Qian
  • Patent number: 8241936
    Abstract: An improved display substrate is provided to reduce surface defects on insulating layers of organic thin film transistors. Related methods of manufacture are also provided. In one example, a display substrate includes a base, a plurality of data lines, a plurality of gate lines, a pixel defined by the data lines and the gate lines, an organic thin film transistor, and a pixel electrode. The data lines are on the base and are oriented in a first direction. The gate lines are oriented in a second direction that crosses the first direction. The organic thin film transistor includes a source electrode electrically connected to one of the data lines, a gate electrode electrically connected to one of the gate lines, and an organic semiconductor layer. The pixel electrode is disposed in the pixel and electrically connected to the organic thin film transistor. The pixel electrode comprises a transparent oxynitride.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: August 14, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Hun Lee, Young-Min Kim, Bo-Sung Kim, Jun-Young Lee, Sung-Wook Kang
  • Publication number: 20120132930
    Abstract: Active or functional additives are embedded into surfaces of host materials for use as components in a variety of electronic or optoelectronic devices, including solar devices, smart windows, displays, and so forth. Resulting surface-embedded device components provide improved performance, as well as cost benefits arising from their compositions and manufacturing processes.
    Type: Application
    Filed: August 8, 2011
    Publication date: May 31, 2012
    Inventors: MICHAEL EUGENE YOUNG, ARJUN DANIEL SRINIVAS, MATTHEW R. ROBINSON, ALEXANDER CHOW MITTAL
  • Publication number: 20120094414
    Abstract: A method for fabricating a light-emitting integrated device, comprises overlying three layers, wherein each of the three layers emits light at a different wavelength, and wherein the overlying comprises one of: performing an atomic species implantation, performing a laser lift-off, performing an etch-back, or chemical-mechanical polishing (CMP).
    Type: Application
    Filed: October 13, 2010
    Publication date: April 19, 2012
    Applicant: NuPGA Corporation
    Inventors: Zvi Or-Bach, Deepak C. Sekar
  • Publication number: 20120086095
    Abstract: A photoelectric conversion device includes a semiconductor substrate, an insulating layer provided on the semiconductor substrate, an electrode provided on the insulating layer, a photoelectric conversion film provided on the electrode for converting received light to charges, a line connected between the electrode and the semiconductor substrate, a first planar electrode provided in the insulating layer and connected to the electrode, and a second planar electrode provided in the insulating layer between the first planar electrode and the semiconductor substrate.
    Type: Application
    Filed: April 5, 2010
    Publication date: April 12, 2012
    Applicant: ROHM CO., LTD.
    Inventors: Hiroshi Nishiyama, Takashi Esumi
  • Patent number: 8154098
    Abstract: A reverse image sensor module includes first and second semiconductor chips, and first and second insulation layers. The first semiconductor chip includes a first semiconductor chip body having a first surface and a second surface facing away from the first surface, photodiodes disposed on the first surface, and a wiring layer disposed on the second surface and having wiring lines electrically connected to the photodiodes and bonding pads electrically connected to the wiring lines. The second semiconductor chip includes a second semiconductor chip body having a third surface facing the wiring layer, and through-electrodes electrically connected to the bonding pads and passing through the second semiconductor chip body. The first insulation layer is disposed on the wiring layer, and the second insulation layer is disposed on the third surface of the second semiconductor chip body facing the first insulation layer and is joined to the first insulation layer.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: April 10, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventor: Seung Taek Yang
  • Patent number: 8143626
    Abstract: A method for manufacturing a CMOS image sensor includes: preparing a semiconductor substrate incorporating therein a p-type epitaxial layer by epitaxially growing up an upper portion of the semiconductor substrate; forming a pixel array in one predetermined location of the semiconductor substrate, the pixel array having a plurality of transistors and a photodiode therein, wherein each transistor employs a gate insulator with a thickness ranging from 40 ? to 90 ?; and forming a logic circuit in the other predetermined location of the semiconductor substrate, the logic circuit having at least one transistor, wherein the transistor employs a gate insulator with a thickness ranging from 5 ? to 40 ?.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: March 27, 2012
    Assignee: Intellectual Ventures II LLC
    Inventor: Ju-Il Lee
  • Patent number: 8138533
    Abstract: A semiconductor device includes a semiconductor substrate, a back side drawn electrode formed by embedding a first conductive material in a contact hole penetrating the semiconductor substrate through an insulating film formed to include a uniform thickness, used also as an alignment mark, and configured to draw out an electrode to the back side of the semiconductor substrate. The device further includes a pad provided on the back side of the semiconductor substrate, and connected to the back side drawn electrode.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: March 20, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidetoshi Koike, Yusuke Kohyama