Abstract: Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.

Abstract: The invention relates to novel organic semiconductor (OSC) formulations, to their use for the preparation of OSC layers or OSC patterns in organic electronic (OE) devices, especially organic photovoltaic (OPV) devices, perovskite-based solar cell (PSC) devices, organic photo-detectors (OPD), organic field effect transistors (OFET) and organic light emitting diodes (OLED), and to OE, OPV, PSC, OPD, OFET and OLED devices comprising an OSC layer or OSC pattern prepared from these OSC formulations.

Abstract: A glass part includes a substrate and a texture reinforcement layer disposed on at least one surface of the substrate. The texture reinforcement layer includes a plurality of reinforcement units. Cross sections of an outer surface of each reinforcement unit in at least a horizontal direction and a vertical direction are in a hyperbolic shape or a parabolic shape.

Abstract: A laminated structure assembly includes, between an upper transparent substrate and a lower transparent substrate, different combinations of a photovoltaic layer, a light-adjusting layer and a light-emitting layer that are stacked in sequence from top to bottom, and bonding layers are provided to bond adjacent layers. There is also provided a window assembly that includes the laminated structure assembly and a controller electrically connected to the laminated structure assembly. There is also provided a method for adjusting a window assembly, a computer device for control and a computer-readable medium. The laminated structure assembly provides a combination of a plurality of functions, thereby meets requirements of users.

Abstract: A back-contact cell with isolation grooves specifically disposed and a preparation method thereof. The back-contact cell includes: a silicon substrate having, on a back side, a polished region and a textured region disposed alternately along an X-axis direction of the back side, a first semiconductor layer disposed on the polished region, and a second semiconductor layer disposed on the textured region. The back-contact cell further includes a conductive film layer and a conductive mask layer sequentially disposed outwardly along a Z-axis direction of the back side. A conductive composite layer formed by the conductive mask layer and the conductive film layer is provided with isolation grooves disposed at intervals along the X-axis direction. The isolation groove is located above a contact interface between the first semiconductor layer and the second semiconductor layer in the Z-axis direction, and the isolation groove spans part of the polished region and part of the textured region in the X-axis direction.

Abstract: The present application relates to a solar cell and a method for manufacturing same, a photovoltaic module, and a photovoltaic system. The solar cell includes a substrate, a doped conducting layer, a first passivation layer, a passivating contact layer, and a second passivation layer. At least a first surface and a portion of a first side surface of the substrate include a textured structure. The doped conducting layer is disposed at least on the first surface and the first side surface to cover the textured structure. The first passivation layer is stacked on the doped conducting layer and covers the first surface and the first side surface to cover the doped conducting layer. The passivating contact layer is disposed on a second surface of the substrate. The second passivation layer is stacked on the passivating contact layer and covers the second surface to cover the passivating contact layer.

Abstract: A black-colored article which is not a photovoltaic device. The device includes a substantially transparent substrate; a substantially transparent textured layer provided upon a first surface of the substrate, the textured layer having a textured surface oriented away from the substrate; and an absorption layer including a silicon-germanium alloy, the absorption layer being situated upon the textured surface of the textured layer.

Abstract: A solar cell is disclosed. The solar cell incudes a substrate, a dielectric layer formed on a backside of the substrate, and a plurality of non-contiguous deposited emitter regions having a first polarity on the dielectric layer. The solar cell also includes at least one deposited emitter region having a second polarity on the dielectric layer, laterally disposed to the plurality of non-contiguous deposited emitter regions.

Abstract: Provided is a solder strip. A cross section of the solder strip includes a base portion and a reflective portion arranged above the base portion. The reflective portion includes a top edge, a first side edge and a second side edge. A first angle is formed between the first side edge and an extension line of the top edge. A second angle is formed between the second side edge and the extension line of the top edge. The first angle and the second angle are greater than 42.5°.

Abstract: The present disclosure relates to an image sensor. The image sensor includes a substrate and a photodetector in the substrate. The image sensor further includes an absorption enhancement structure. The absorption enhancement structure is defined by a substrate depression along a first side of the substrate. The substrate depression is defined by a first plurality of sidewalls that slope toward a first common point and by a second plurality of sidewalls that slope toward a second common point. The first plurality of sidewalls extend over the second plurality of sidewalls.

Abstract: Methods for depositing a silicon-germanium film on a substrate are described. The method comprises exposing a substrate to a silicon precursor and a germanium precursor to form a conformal silicon-germanium film. The substrate comprises at least one film stack and at least one feature, the film stack comprising alternating layers of silicon and silicon-germanium. The silicon-germanium film has a conformality greater than 50%.

Abstract: A bipolar solar cell includes a backside junction formed by a silicon substrate and a first doped layer of a first dopant type on the backside of the solar cell. A second doped layer of a second dopant type makes an electrical connection to the substrate from the front side of the solar cell. A first metal contact of a first electrical polarity electrically connects to the first doped layer on the backside of the solar cell, and a second metal contact of a second electrical polarity electrically connects to the second doped layer on the front side of the solar cell. An external electrical circuit may be electrically connected to the first and second metal contacts to be powered by the solar cell.

Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.

Abstract: A semiconductor device for infrared detection comprises a stack of a first semiconductor layer, a second semiconductor layer and an optical coupling layer. The first semiconductor layer has a first type of conductivity and the second semiconductor layer has a second type of conductivity. The optical coupling layer comprises an optical coupler and at least a first lateral absorber region. The optical coupler is configured to deflect incident light towards the first lateral absorber region. The first lateral absorber region comprises an absorber material with a bandgap Eg in the infrared, IR.

Abstract: Embodiments of the present disclosure relates to the field of solar cells, and in particular to a solar cell and a production method thereof, and a photovoltaic module. The solar cell includes: a P-type emitter formed on a first surface of an N-type substrate and including a first portion and a second portion, a top surface of the first portion includes first pyramid structures, and a top surface of the second portion includes second pyramid structures whose edges are straight. A transition surface is respectively formed on at least one edge of each first pyramid structure, and each of top surfaces of at least a part of the first pyramid structures includes a spherical or spherical-like substructure. A tunnel layer and a doped conductive layer sequentially formed over a second surface of the N-type substrate. The present disclosure can improve the photoelectric conversion performance of solar cells.

Abstract: Multi-dimensional photonic integrated circuits are provided, including a substrate having a first side and a second side, a multi-dimensional package having multi-dimensional planes, and one or more optical components connected to the first side and the second side of the substrate and on the multi-dimensional planes of the multi-dimensional package. The multi-dimensional planes include one or more horizontal sides and one or more vertical sides. One or more of the optical components are mounted on at least one of the horizontal sides of the multi-dimensional package and one or more of the optical components are mounted on at least one of the vertical sides of the multi-dimensional package. Hybrid systems of conventional multi-dimensional integrated circuits and multi-dimensional photonic integrated circuits also are provided.

Abstract: Disclosed is an interdigitated back contact photovoltaic device that includes a first patterned silicon layer situated on an intrinsic layer, and having the same type of doping as the one of the substrate. First charge collection portions are deposited on predetermined areas of the intrinsic layer, and include each an amorphous layer portion situated between the predetermined areas and the at least partially nano-crystalline layer portions. The amorphous layer portions have a larger width than the width of the nano-crystalline layer portions. On top if the first patterned silicon layer, a second nano-crystalline silicon layer is deposited that has a doping of a second type being the other of the p-type doping or the n-type doping with respect to the doping-type of the first patterned silicon layer.

Abstract: Discloses is a method of manufacturing a solar cell with an increased power generation area to increase the area used for actual power generation without increasing the size of the solar cell.

Abstract: A system includes a factory interface, an etching tool, and at least one measuring device. The factory interface is configured to carry a wafer. The etching tool is coupled to the factory interface and configured to process the wafer transferred from the factory interface. The at least one measuring device is equipped in the factory interface, the etching tool, or the combination thereof. The at least one measuring device is configured to perform real-time measurements of reflectance from the wafer that is carried in the factory interface or the etching tool.

Abstract: A back contact structure of a solar cell, includes: a silicon substrate, the silicon substrate including a back surface including a plurality of recesses disposed at intervals; a plurality of first conductive regions and a plurality of second conductive regions disposed alternately in the plurality of recesses, where each first conductive region includes a first dielectric layer and a first doped region which are disposed successively in the plurality of recesses, and each second conductive region includes a second doped region; a second dielectric layer disposed between the plurality of first conductive regions and the plurality of second conductive regions; and a conductive layer disposed on the plurality of first conductive regions and the plurality of second conductive regions.

Abstract: The present disclosure relates to electrodes comprising a polymer film and a substrate, wherein the polymer film has a thickness of about 5 nm to about 600 nm. The present disclosure also relates to electrochemical cells and batteries comprising the electrodes disclosed herein. The present disclosure also relates to methods of making the electrodes disclosed herein.

Abstract: The present disclosure relates to an image sensor. The image sensor includes a substrate and a photodetector in the substrate. The image sensor further includes an absorption enhancement structure. The absorption enhancement structure is defined by a substrate depression along a first side of the substrate. The substrate depression is defined by a first plurality of sidewalls that slope toward a first common point and by a second plurality of sidewalls that slope toward a second common point. The first plurality of sidewalls extend over the second plurality of sidewalls.

Abstract: One or more semiconductor structures and/or methods for forming support structures for semiconductor structures are provided. A first porosification layer is formed over a semiconductor substrate. A first epitaxial layer is formed over the first porosification layer. A second porosification layer is formed from a first portion of the first epitaxial layer and a support structure is formed from a second portion of the first epitaxial layer.

Abstract: A back contact structure includes: a silicon substrate including a back including a plurality of recesses disposed at intervals; a first dielectric layer disposed on the back surface of the silicon substrate, the first dielectric layer at least covering the plurality of recesses; a plurality of P-type doped regions and N-type doped regions disposed on the first dielectric layer and disposed alternately in the plurality of recesses; a second dielectric layer disposed between the plurality of P-type doped regions and the plurality of N-type doped regions; and a conductive layer disposed on the plurality of P-type doped regions and the plurality of N-type doped regions

Abstract: It discloses a texturing method for a diamond wire cut polycrystalline silicon slice, including the following steps: firstly, immersing the diamond wire cut polycrystalline silicon slice into a mixed aqueous solution of an alkali solution and an alkali reaction control agent, removing a damaged layer on a surface of the silicon slice, and then immersing the silicon slice into a hydrofluoric acid solution containing inorganic ions and organic molecules for reaction; secondly, pretreating the polycrystalline silicon surface by a mixed solution of hydrofluoric acid and hydrogen peroxide, adding a pore-forming regulator at the same time, and finally texturing the surface of the silicon slice by a mixed acid solution of hydrofluoric acid and nitric acid.

Abstract: Provided is a substrate holding member that includes a base body and a plurality of protrusions formed on a surface of the base body and that is capable of suppressing generation of particles due to peeling-off or cracking of protective layers of the protrusions. A substrate holding member includes a base body and a plurality of protrusions formed on a surface of the base body. Each of the protrusions includes a base portion and a protective layer, the base portion having a flat upper end surface and being made from a silicon carbide sintered compact, the protective layer being made of silicon carbide. The protective layer includes a region on at least a part of the base portion from an edge of the upper end surface to a lower end of the base portion, the region being exposed along an entire periphery. Preferably, the protective layer is formed so as to cover at least only a part of an upper portion of the base portion, the upper portion including the upper end surface.

Abstract: Dopant ink compositions and methods of fabricating solar cells there from are described. A dopant ink composition may include a cross-linkable matrix precursor, a bound dopant species, and a solvent. A method of fabricating a solar cell may include delivering a dopant ink composition to a region above a substrate. The dopant ink composition includes a cross-linkable matrix precursor, a bound dopant species, and a solvent. The method also includes baking the dopant ink composition to remove a substantial portion of the solvent of the dopant ink composition, curing the baked dopant ink composition to cross-link a substantial portion of the cross-linkable matrix precursor of the dopant ink composition, and driving dopants from the cured dopant ink composition toward the substrate.

Abstract: Embodiments generally relate to optoelectronic devices and more specifically, to textured layers in optoelectronic devices. In one embodiment, a method for providing a textured layer in an optoelectronic device includes depositing a first layer of a first material and depositing an island layer of a second material on the first layer. Depositing the island layer includes forming one or more islands of the second material to provide at least one textured surface of the island layer, where the textured surface is operative to cause scattering of light.

Abstract: A solar cell segment includes a substrate defining a rear side including a number of base doped regions and emitter doped regions. A dielectric layer and at least one metallizing layer are disposed on the rear side of the substrate. The at least one metallizing layer is structured in an interdigital comb-shaped contact deck arrangement and defines base contact decks for a number of base doped regions and emitter contact decks for a number of base doped regions. The at least one metallization layer is disposed between the rear side of the substrate and the dielectric layer. At least one first row of first contact openings is formed in the dielectric layer lying in a region of the base contact decks and at least one second row of second contact openings is formed in the dielectric layer lying in a region of the emitter contact decks.

Abstract: A method of manufacturing solar cells is disclosed. The method comprises depositing an etch-resistant dopant material on a silicon substrate, the etch-resistant dopant material comprising a dopant source, forming a cross-linked matrix in the etch-resistant dopant material using a non-thermal cure of the etch-resistant dopant material, and heating the silicon substrate and the etch-resistant dopant material to a temperature sufficient to cause the dopant source to diffuse into the silicon substrate.

Abstract: A light-emitting diode includes a substrate, the substrate including an upper surface, a bottom surface opposite to the upper surface, and a side surface; a first type semiconductor layer on the upper surface, wherein the first type semiconductor layer includes a first portion and a second portion, and the second portion includes an edge surrounding the first portion; a light-emitting layer on the first portion; and a second type semiconductor layer on the light-emitting layer, wherein the second portion includes a first surface and a second surface, and a first distance is between the first surface and the upper surface, and a second distance is between the second surface and the upper surface and is smaller than the first distance; wherein the first surface is rougher than the second surface, and the second surface is located at the edge.

Abstract: An object of the present invention is to provide a light emitting diode having a heterogeneous material structure and a method of manufacturing thereof, in which efficiency of extracting light to outside is improved by forming depressions and prominences configured of heterogeneous materials different from each other before or in the middle of forming a semiconductor material on a substrate in order to improve the light extraction efficiency.

Abstract: In a back-illuminated solid-state image pickup device including a semiconductor substrate 4 having a light incident surface at a back surface side and a charge transfer electrode 2 disposed at a light detection surface at an opposite side of the semiconductor substrate 4 with respect to the light incident surface, the light detection surface has an uneven surface. By the light detection surface having the uneven surface, etaloning is suppressed because lights reflected by the uneven surface have scattered phase differences with respect to a phase of incident light and resulting interfering lights offset each other. A high quality image can thus be acquired by the back-illuminated solid-state image pickup device.

Abstract: An infrared photo-detector with multiple discrete regions of a first absorber material. These regions may have geometric shapes with sloped sidewalls. The detector also may include a second absorber region comprising a second absorber material that absorbs light of a shorter wavelength than the light absorbed by the multiple discrete absorber regions of the first absorber material. The geometric shapes may extend only through the first absorber material. Alternatively, the geometric shapes may extend partially into the second absorber region. The detector has a metal reflector coupled to the multiple discrete absorber regions. The detector also has a substrate containing the discrete absorber regions and the second absorber region. The substrate can further include geometric shaped features etched into the substrate, with those features formed on the side of the substrate opposite the side containing the discrete absorber regions and the second absorber region.

Abstract: A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.

Abstract: Embodiments relate to buried structures for silicon devices which can alter light paths and thereby form light traps. Embodiments of the lights traps can couple more light to a photosensitive surface of the device, rather than reflecting the light or absorbing it more deeply within the device, which can increase efficiency, improve device timing and provide other advantages appreciated by those skilled in the art.

Abstract: A semiconductor light emitting device includes: a light emission structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; and a wavelength conversion layer formed on at least a portion of a light emission surface of the light emission structure, made of a light-transmissive material including phosphor particles, and having a void therein. A semiconductor light emitting device includes: a light emission structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; and a wavelength conversion layer formed on at least a portion of a light emission surface of the light emission structure, made of a light-transmissive material including phosphor particles or quantum dots, and having a void therein.

Abstract: The invention relates to a layered system for producing a solar cell on a metal substrate and to a method of producing the layered system.

Abstract: An article including a nanostructured functional coating disposed on a substrate is described. The functional coating is characterized by both anti-reflection properties and down-converting properties. Related optoelectronic devices are also described.

Abstract: The solar cell manufacturing apparatus includes: a load lock chamber configured to allow loading and unloading of a substrate by switching between atmospheric ambient and vacuum ambient; a processing chamber where the substrate for a solar cell is to be doped with impurity ions for pn junction formation in the vacuum ambient; and a conveyance chamber including a conveyance unit configured to convey the substrate between the load lock chamber and the processing chamber. The doping of impurity ions is performed by irradiation with the impurity ions from an ion gun, and the ion gun is provided with a grid plate, as its ion irradiation surface, facing the substrate conveyed to the processing chamber.

Abstract: An electroconductive element includes a substrate having a first wavy surface and a second wavy surface, and an electroconductive layer formed on the first wavy surface, wherein the electroconductive layer forms an electroconductive pattern, and the first wavy surface and the second wavy surface satisfy the following relationship: 0?(Am1/?m1)<(Am2/?m2)?1.8. Am1 is a mean amplitude of vibrations of the first wavy surface, Am2 is a mean amplitude of vibrations of the second wavy surface, ?m1 is a mean wavelength of the first wavy surface, and ?m2 is a mean wavelength of the second wavy surface.

Abstract: Prepared is an n? type semiconductor substrate 1 having a first principal surface 1a and a second principal surface 1b opposed to each other, and having a p+ type semiconductor region 3 formed on the first principal surface 1a side. At least a region opposed to the p+ type semiconductor region 3 in the second principal surface 1b of the n? type semiconductor substrate 1 is irradiated with a pulsed laser beam to form an irregular asperity 10. After formation of the irregular asperity 10, an accumulation layer 11 with an impurity concentration higher than that of the n? type semiconductor substrate 1 is formed on the second principal surface 1b side of the n type semiconductor substrate 1. After formation of the accumulation layer 11, the n? type semiconductor substrate 1 is subjected to a thermal treatment.

Abstract: A semiconductor wafer has integrated circuits formed thereon and a top passivation layer applied. The passivation layer is patterned and selectively etched to expose contact pads on each semiconductor die. The wafer is exposed to ionized gas causing the upper surface of passivation layer to roughen and to slightly roughen the upper surface of the contact pads. The wafer is cut to form a plurality of semiconductor dies each with a roughened passivation layer. The plurality of semiconductor dies are placed on an adhesive layer and a reconstituted wafer formed. Redistribution layers are formed to complete the semiconductor package having electrical contacts for establishing electrical connections external to the semiconductor package, after which the wafer is singulated to separate the dice.

Abstract: A cleaning method of a silicon substrate includes a first step of etching a surface of a silicon substrate by a metal-ion-containing mixed aqueous solution of an oxidizing agent and hydrofluoric acid and of forming a porous layer on the surface of the silicon substrate, a second step of etching a pore of the porous layer by mixed acid mainly containing hydrofluoric acid and nitric acid and of forming texture on the surface of the silicon substrate, a third step of etching the surface of the silicon substrate on which the texture is formed with an alkaline chemical solution, and a fourth step of treating the silicon substrate etched by the alkaline chemical solution by ozone-containing water, of generating an air bubble within the pore formed in the silicon substrate, and of removing metal and organic impurities from within the pore.

Abstract: Fabrication of a tandem photovoltaic device includes forming a bottom cell having an N-type layer, a P-type layer and a bottom intrinsic layer therebetween. A top cell is formed relative to the bottom cell. The top cell has an N-type layer, a P-type layer and a top intrinsic layer therebetween. The top intrinsic layer is formed of an undoped material deposited at a temperature that is different from the bottom intrinsic layer such that band gap energies for the top intrinsic layer and the bottom intrinsic layer are progressively lower for each cell.

Abstract: The present invention relates to cost effective production methods of high efficiency silicon based back-contacted back-junction solar panels and solar panels thereof having a multiplicity of alternating rectangular emitter- and base regions on the back-side of each cell, each with rectangular metallic electric finger conductor above and running in parallel with the corresponding emitter- and base region, a first insulation layer in-between the wafer and finger conductors, and a second insulation layer in between the finger conductors and cell interconnections.

Abstract: Embodiments of the invention generally relate to solar cell devices and methods for manufacturing such solar cell devices. In one embodiment, a method for forming a solar cell device includes depositing a conversion layer over a first surface of a substrate, depositing a first transparent conductive oxide layer over a second surface of the substrate that is opposite the first surface, depositing a first p-doped silicon layer over the first transparent conductive oxide layer, depositing a first intrinsic silicon layer over the first p-doped silicon layer, and depositing a first n-doped silicon layer over the first intrinsic silicon layer. The method further includes depositing a second transparent conductive oxide layer over the first n-doped silicon layer, and depositing an electrically conductive contact layer over the second transparent conductive oxide layer.

Abstract: Disclosed is a structure combining a solar cell and a light-emitting element. The structure includes a light-emitting device having a substrate and a light-emitting structure disposed on the first surface of the substrate. The substrate includes a plurality of cones formed on a second surface opposite to the first surface. The structure also includes a first conductive layer, disposed on the second surface, a power convention layer disposed on the first conductive layer, a second conductive layer disposed on the power conversion layer, and a patterned transparent layer disposed on the second conductive layer. The patterned transparent layer includes a surface consisting of a plurality of cones and disposed on a side opposite to the second conductive layer.

Abstract: A method (300) for etching a silicon surface (116) to reduce reflectivity. The method (300) includes electroless deposition of copper nanoparticles about 20 nanometers in size on the silicon surface (116), with a particle-to-particle spacing of 3 to 8 nanometers. The method (300) includes positioning (310) the substrate (112) with a silicon surface (116) into a vessel (122). The vessel (122) is filled (340) with a volume of an etching solution (124) so as to cover the silicon surface (116). The etching solution (124) includes an oxidant-etchant solution (146), e.g., an aqueous solution of hydrofluoric acid and hydrogen peroxide. The silicon surface (116) is etched (350) by agitating the etching solution (124) with, for example, ultrasonic agitation, and the etching may include heating (360) the etching solution (124) and directing light (365) onto the silicon surface (116). During the etching, copper nanoparticles enhance or drive the etching process.

Abstract: A structure comprising an array of semiconductor structures, an infill material between the semiconductor materials, and one or more light-trapping elements is described. Photoconverters and photoelectrochemical devices based on such structure also described.