Particular Crystalline Orientation Or Structure (epo) Patents (Class 257/E33.003)
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Patent number: 11735691Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height from an LED base and including a plurality of epitaxial layers including a first n-layer, a first active layer, and a first p-layer. A second flat region is provided, at a second height from the LED base and parallel to the first flat region, and includes at least a second n-layer. A sloped sidewall connecting the first flat region and the second flat region is provided and includes at least a third n-layer, the first n-layer being thicker than at least a portion of third n-layer. A p-contact is formed on the first p-layer and an n-contact formed on the second n-layer.Type: GrantFiled: November 4, 2021Date of Patent: August 22, 2023Assignee: Lumileds LLCInventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Patent number: 9012924Abstract: Provided is a spectrum detector capable of being miniaturized and which does not require complicated optical axis alignment. The spectrum detector of the present invention comprises: a substrate; a photodetector formed on the substrate and including a semiconductor having a plurality of convex portions; and a wavelength detection circuit for detecting a wavelength of light transmitted through the plurality of convex portions, from light incident on the photodetector. According to the present invention, a small-sized spectrum detector can be provided which can easily detect a peak wavelength distribution included in light of an unknown wavelength, without the use of optical equipment such as a grating or prism, thus dispensing with the need for the optical axis alignment of a complex optical system.Type: GrantFiled: August 17, 2009Date of Patent: April 21, 2015Assignees: Seoul Viosys Co., Ltd.Inventors: Shiro Sakai, Won Chul Seo, Dae Won Kim
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Patent number: 8957420Abstract: A thin film transistor (TFT) array substrate with few processing steps and simple structure is provided, wherein merely two patterned metal layers are required and a patterned planarization layer is adopted to separate the two patterned metal layers from each other and thereby reduce power loading. In addition, the patterned planarization layer has slots to form height differences so as to separate scan lines from common electrodes to further reduce the power loading.Type: GrantFiled: June 24, 2011Date of Patent: February 17, 2015Assignee: AU Optronics CorporationInventors: Ze-Yu Yen, Ke-Chih Chang, Kuo-Yu Huang, En-Yung Lin
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Patent number: 8957421Abstract: In a flat panel display (FPD) and a method of manufacturing the same, the FPD includes a substrate, a semiconductor layer formed on the substrate, a wiring line formed on the substrate so as to be separated from the semiconductor layer, an insulating layer formed on the semiconductor layer and the wiring line, a gate electrode formed on the insulating layer formed on the semiconductor layer and extended to a top of the wiring line, and a source electrode and a drain electrode coupled to a source region and a drain region, respectively, of the semiconductor layer. Capacitance is formed by the gate electrode and the wiring line.Type: GrantFiled: November 19, 2012Date of Patent: February 17, 2015Assignee: Samsung Display Co., Ltd.Inventor: Jong-Seok Kim
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Patent number: 8937325Abstract: According to one embodiment, a semiconductor device includes a first layer of n-type including a nitride semiconductor, a second layer of p-type including a nitride semiconductor, a light emitting unit, and a first stacked body. The light emitting unit is provided between the first and second layers. The first stacked body is provided between the first layer and the light emitting unit. The first stacked body includes a plurality of third layers including AlGaInN, and a plurality of fourth layers alternately stacked with the third layers and including GaInN. The first stacked body has a first surface facing the light emitting unit. The first stacked body has a depression provided in the first surface. A part of the light emitting unit is embedded in a part of the depression. A part of the second layer is disposed on the part of the light emitting unit.Type: GrantFiled: February 28, 2012Date of Patent: January 20, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Mitsuhiro Kushibe, Yasuo Ohba, Hiroshi Katsuno, Kei Kaneko, Shinji Yamada
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Patent number: 8907923Abstract: The present invention provides a photo sensor, a method of forming the photo sensor, and a related optical touch device. The photo sensor includes a first electrode, a second electrode, a first silicon-rich dielectric layer and a second silicon-rich dielectric layer. The first silicon-rich dielectric layer is disposed between the first electrode and the second electrode for sensing infrared rays, and the second silicon-rich dielectric layer is disposed between the first silicon-rich dielectric layer and the second electrode for sensing visible light beams. The multi-layer structure including the first silicon-rich dielectric layer and the second silicon-rich dielectric layer enables the single photo sensor to effectively detect both infrared rays and visible light beams. Moreover, the single photo sensor is easily integrated into an optical touch device to form optical touch panel integrated on glass.Type: GrantFiled: March 7, 2010Date of Patent: December 9, 2014Assignee: AU Optronics Corp.Inventors: An-Thung Cho, Chia-Tien Peng, Hung-Wei Tseng, Cheng-Chiu Pai, Yu-Hsuan Li, Chun-Hsiun Chen, Wei-Ming Huang
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Patent number: 8872309Abstract: Group-III nitride crystal composites made up of especially processed crystal slices, cut from III-nitride bulk crystal, whose major surfaces are of {1-10±2}, {11-2±2}, {20-2±1} or {22-4±1} orientation, disposed adjoining each other sideways with the major-surface side of each slice facing up, and III-nitride crystal epitaxially present on the major surfaces of the adjoining slices, with the III-nitride crystal containing, as principal impurities, either silicon atoms or oxygen atoms.Type: GrantFiled: March 3, 2014Date of Patent: October 28, 2014Assignee: Sumitomo Electronic Industries, Ltd.Inventors: Naho Mizuhara, Koji Uematsu, Michimasa Miyanaga, Keisuke Tanizaki, Hideaki Nakahata, Seiji Nakahata, Takuji Okahisa
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Patent number: 8872171Abstract: Homogeneity and stability of electric characteristics of a thin film transistor included in a circuit are critical for the performance of a display device including said circuit. An object of the invention is to provide an oxide semiconductor film with low hydrogen content and which is used in an inverted staggered thin film transistor having well defined electric characteristics. In order to achieve the object, a gate insulating film, an oxide semiconductor layer, and a channel protective film are successively formed with a sputtering method without being exposed to air. The oxide semiconductor layer is formed so as to limit hydrogen contamination, in an atmosphere including a proportion of oxygen. In addition, layers provided over and under a channel formation region of the oxide semiconductor layer are formed using compounds of silicon, oxygen and/or nitrogen.Type: GrantFiled: May 24, 2010Date of Patent: October 28, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kengo Akimoto
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Patent number: 8872165Abstract: A thin film transistor array substrate includes a thin film transistor including an activation layer, a gate electrode, source and drain electrodes, a first insulation layer between the activation layer and the gate electrode, and a second insulation layer between the gate electrode and the source and drain electrodes, a pixel electrode including a transparent conductive oxide, the pixel electrode being on a portion of the first insulation layer extending from the thin film transistor and being connected to one of the source and drain electrodes via an opening in the second insulation layer, a capacitor including a first electrode and a second electrode, the first electrode being on a same layer as the activation layer and including a transparent conductive oxide, and the second electrode being between the first and second insulation layers, and a third insulation layer covering the source and drain electrodes and exposing the pixel electrode.Type: GrantFiled: May 25, 2012Date of Patent: October 28, 2014Assignee: Samsung Display Co., Ltd.Inventors: Chun-Gi You, Joon-Hoo Choi
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Patent number: 8859312Abstract: A method of manufacturing an integrated circuit (IC) for driving a flexible display includes depositing a pattern of spatially non-repetitive features in a first layer on a flexible substrate, said pattern of spatially non-repetitive features not substantially regularly repeating in both of two orthogonal directions (x,y) in the plane of the substrate; depositing a pattern of spatially repetitive features in a second layer on said first layer; aligning said second layer and said first layer so as to allow electrical coupling between said non-repetitive features and said repetitive features, wherein distortion compensation is applied during deposition of said repetitive features to enable said alignment.Type: GrantFiled: October 1, 2007Date of Patent: October 14, 2014Assignee: Plastic Logic LimitedInventors: Carl Hayton, Paul A. Cain
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Patent number: 8860021Abstract: A structure including an oxide semiconductor layer which is provided over an insulating surface and includes a channel formation region and a pair of low-resistance regions between which the channel formation region is positioned, a gate insulating film covering a top surface and a side surface of the oxide semiconductor layer, a gate electrode covering a top surface and a side surface of the channel formation region with the gate insulating film positioned therebetween, and electrodes electrically connected to the low-resistance regions is employed. The electrodes are electrically connected to at least side surfaces of the low-resistance regions, so that contact resistance with the source electrode and the drain electrode is reduced.Type: GrantFiled: December 17, 2012Date of Patent: October 14, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Atsuo Isobe, Hiromichi Godo
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Patent number: 8860183Abstract: The present invention provides a method of manufacturing a semiconductor substrate that includes a substrate, a first semiconductor layer arranged on the substrate, a metallic material layer arranged on the first semiconductor layer, a second semiconductor layer arranged on the first semiconductor layer and the metallic material layer, and a cavity formed in the first semiconductor layer under the metallic material layer.Type: GrantFiled: June 9, 2010Date of Patent: October 14, 2014Assignee: Seoul Viosys Co., Ltd.Inventor: Shiro Sakai
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Patent number: 8835967Abstract: A nitride-based semiconductor light-emitting device of the present disclosure includes: a semiconductor multilayer structure which includes an active layer that is made of a nitride semiconductor, a principal surface of the nitride semiconductor being a semi-polar plane or a non-polar plane and which has recessed/elevated surfaces including at least either of recessed portions and elevated portions; an electrode covering a side of the semiconductor multilayer structure at which the recessed/elevated surfaces is provided, the electrode being configured to reflect at least part of light emitted from the active layer; and a birefringent substrate provided on a side of the semiconductor multilayer structure which is opposite to the recessed/elevated surfaces, the birefringent substrate being configured to transmit light emitted from the active layer and light reflected by the electrode.Type: GrantFiled: March 15, 2013Date of Patent: September 16, 2014Assignee: Panasonic CorporationInventors: Akira Inoue, Masaki Fujikane, Toshiya Yokogawa
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Patent number: 8823142Abstract: A GaN single crystal substrate has a main surface with an area of not less than 10 cm2, the main surface has a plane orientation inclined by not less than 65° and not more than 85° with respect to one of a (0001) plane and a (000-1) plane, and the substrate has at least one of a substantially uniform distribution of a carrier concentration in the main surface, a substantially uniform distribution of a dislocation density in the main surface, and a photoelasticity distortion value of not more than 5×10?5, the photoelasticity distortion value being measured by photoelasticity at an arbitrary point in the main surface when light is applied perpendicularly to the main surface at an ambient temperature of 25° C. Thus, the GaN single crystal substrate suitable for manufacture of a GaN-based semiconductor device having a small variation of characteristics can be obtained.Type: GrantFiled: November 8, 2013Date of Patent: September 2, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventors: Shinsuke Fujiwara, Koji Uematsu, Hideki Osada, Seiji Nakahata
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Patent number: 8815663Abstract: A method of manufacturing a TFT, including forming a buffer layer, an amorphous silicon layer, an insulating layer, and a first conductive layer on a substrate, forming a polycrystalline silicon layer by crystallizing the amorphous silicon layer, forming a semiconductor layer, a gate insulating layer, and a gate electrode that have a predetermined shape by simultaneously patterning the polycrystalline silicon layer, the insulating layer, and the first conductive layer, wherein the polycrystalline silicon layer is further etched to produce an undercut recessed a distance compared to sidewalls of the insulating layer and the first conductive layer, forming source and drain regions within the semiconductor layer by doping corresponding portions of the semiconductor layer, forming an interlayer insulating layer on the gate electrode, the interlayer insulating layer covering the gate insulating layer and forming source and drain electrodes that are electrically connected to source and drain regions respectively.Type: GrantFiled: December 7, 2011Date of Patent: August 26, 2014Assignee: Samsung Display Co., Ltd.Inventors: Byoung-Keon Park, Jong-Ryuk Park, Tak-Young Lee, Jin-Wook Seo, Ki-Yong Lee
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Patent number: 8772825Abstract: A stacked semiconductor device and an associated manufacturing method are disclosed. A first semiconductor unit having a first surface, which is defined as being not a polar plane, is provided. At least one pit is formed on the first surface, and the pit has a second surface that lies at an angle relative to the first surface. A polarization enhanced tunnel junction is formed on the second surface, and a second semiconductor unit is formed above the tunnel junction.Type: GrantFiled: September 14, 2012Date of Patent: July 8, 2014Assignee: Phostek, Inc.Inventors: Jinn Kong Sheu, Wei-Chih Lai
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Patent number: 8766281Abstract: A light emitting diode chip includes a substrate, an epitaxial layer, two inclined plane units, and two electrode units. The substrate has top and bottom surfaces. The epitaxial layer is disposed on the top surface of the substrate. Each of the inclined plane units is inclined downwardly and outwardly from the epitaxial layer toward the bottom surface of the substrate, and includes an inclined sidewall formed on the epitaxial layer, and a substrate inclined wall formed on the substrate. Each of the electrode units includes an electrode disposed on the epitaxial layer, and a conductive portion extending from the electrode to the substrate inclined wall along corresponding one of the inclined plane units.Type: GrantFiled: December 13, 2012Date of Patent: July 1, 2014Assignees: Lite-On Electronics (Guangzhou) Limited, Lite-On Technology Corp.Inventor: Chih-Chiang Kao
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Patent number: 8766237Abstract: A homo-material heterophased quantum well includes a first structural layer, a second structural layer and a third structural layer. The second structural layer is sandwiched between the first and third structural layers. The first structural layer, second structural layer and third structural layer are formed by growing atoms of a single material in a single growth direction. The energy gap of the second structural layer is smaller than that of the first and third structural layers.Type: GrantFiled: January 19, 2011Date of Patent: July 1, 2014Assignee: National Sun Yat-Sen UniversityInventors: I-Kai Lo, Yu-Chi Hsu, Chia-Ho Hsieh, Wen-Yuan Pang, Ming-Chi Chou
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Patent number: 8742447Abstract: Disclosed are a light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a light emitting structure including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; a substrate over the light emitting structure; a first reflective layer having a plurality of dielectric layers including a first dielectric layer having a first refractive index over the substrate, and a second dielectric layer having a second refractive index different from the first refractive index over the first dielectric layer; and a second reflective layer over the first reflective layer, the second reflective layer having a refractive index lower than the refractive index of each dielectric layer of the first reflective layer.Type: GrantFiled: February 3, 2011Date of Patent: June 3, 2014Assignee: LG Innotek Co., Ltd.Inventors: Sun Kyung Kim, Woon Kyung Choi
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Patent number: 8686455Abstract: A composite substrate for the formation of a light-emitting device, ensuring that a high-quality nitride-based light-emitting diode can be easily formed on its top surface and the obtained substrate-attached light-emitting diode functions as a light-emitting device capable of emitting light for an arbitrary color such as white, is provided.Type: GrantFiled: March 2, 2010Date of Patent: April 1, 2014Assignees: Ube Industries, Ltd., RikenInventors: Yasuyuki Ichizono, Hideki Hirayama
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Patent number: 8674399Abstract: A light-emitting element includes a ?-Ga2O3 substrate, a GaN-based semiconductor layer formed on the ?-Ga2O3 substrate, and a double-hetero light-emitting layer formed on the GaN-based semiconductor layer.Type: GrantFiled: June 22, 2011Date of Patent: March 18, 2014Assignee: Koha Co., Ltd.Inventors: Noboru Ichinose, Kiyoshi Shimamura, Kazuo Aoki, Encarnacion Antonia Garcia Villora
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Patent number: 8674368Abstract: An object is to provide a system-on-panel display device including a display portion and a peripheral circuit for controlling display on the display portion over one substrate, which can operate more accurately. The display device has a display portion provided with a pixel portion including a plurality of pixels and a peripheral circuit portion for controlling display on the display portion, which are provided over a substrate. Each of the display portion and the peripheral circuit portion includes a plurality of transistors. For semiconductor layers of the transistors, single crystal semiconductor materials are used.Type: GrantFiled: March 28, 2012Date of Patent: March 18, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kei Takahashi, Satoshi Murakami, Suguru Ozawa
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Patent number: 8652918Abstract: A structure method for producing same provides suppressed lattice defects when epitaxially forming nitride layers over non-c-plane oriented layers, such as a semi-polar oriented template layer or substrate. A patterned mask with “window” openings, or trenches formed in the substrate with appropriate vertical dimensions, such as the product of the window width times the cotangent of the angle between the surface normal and the c-axis direction, provides significant blocking of all diagonally running defects during growth. In addition, inclined posts of appropriate height and spacing provide a blocking barrier to vertically running defects is created. When used in conjunction with the aforementioned aspects of mask windows or trenches, the post structure provides significant blocking of both vertically and diagonally running defects during growth.Type: GrantFiled: May 17, 2012Date of Patent: February 18, 2014Assignee: Palo Alto Research Center IncorporatedInventor: Andre Strittmatter
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Patent number: 8648328Abstract: A method is provided for fabricating a light emitting diode (LED) using three-dimensional gallium nitride (GaN) pillar structures with planar surfaces. The method forms a plurality of GaN pillar structures, each with an n-doped GaN (n-GaN) pillar and planar sidewalls perpendicular to the c-plane, formed in either an m-plane or a-plane family. A multiple quantum well (MQW) layer is formed overlying the n-GaN pillar sidewalls, and a layer of p-doped GaN (p-GaN) is formed overlying the MQW layer. The plurality of GaN pillar structures are deposited on a first substrate, with the n-doped GaN pillar sidewalls aligned parallel to a top surface of the first substrate. A first end of each GaN pillar structure is connected to a first metal layer. The second end of each GaN pillar structure is etched to expose the n-GaN pillar second end and connected to a second metal layer.Type: GrantFiled: February 6, 2012Date of Patent: February 11, 2014Assignee: Sharp Laboratories of America, Inc.Inventors: Mark Albert Crowder, Changqing Zhan, Paul J. Schuele
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Patent number: 8648344Abstract: An organic light-emitting display device comprises: a lower substrate; an upper substrate facing the lower substrate; and a spacer formed in a sealed space between the lower substrate and the upper substrate and dividing the space into two or more sections; wherein air holes are formed in the spacer and allow air to flow between the sections of the space.Type: GrantFiled: August 12, 2011Date of Patent: February 11, 2014Assignee: Samsung Display Co., Ltd.Inventors: Kwang-Hae Kim, Sun Park, Chun-Gi You
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Publication number: 20140034948Abstract: An LED epitaxial structure includes the first layer thin film and the second layer thin film. The first layer thin film and the second layer thin film are polycrystalline aluminum nitride and single crystal aluminum nitride respectively, which have good thermal conductivity, insulation, mechanical intensity, and chemistry stability. Based on the substrate mentioned above, growing a single crystal gallium nitride on the second layer thin film as the third layer thin film allows the single crystal aluminum nitride and gallium nitride to have good lattice and thermal expansion match, resulting in the promotion of light emitting and thermal conduction efficiency.Type: ApplicationFiled: September 12, 2012Publication date: February 6, 2014Inventors: Yang-Kuo Kuo, Chia-Yi Hsiang, Hung-Tai Ku
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Patent number: 8643013Abstract: A flat panel display device having increased capacitance and a method of manufacturing the flat panel display device are provided. A flat panel display device includes: a plurality of pixel areas, each located at a crossing region of a gate line, a data line, and a common voltage line; a thin film transistor (TFT) located at a region where the gate line and the data line cross each other, the TFT including a gate electrode, a source electrode, and a drain electrode; and a storage capacitor located at a region where the common voltage line and the drain electrode cross each other, the storage capacitor including first, second, and a third storage electrodes.Type: GrantFiled: February 17, 2011Date of Patent: February 4, 2014Assignee: Samsung Display Co., Ltd.Inventors: Zhi-Feng Zhan, Seung-Gyu Tae, Deok-Hoi Kim
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Patent number: 8643044Abstract: According to one embodiment, a semiconductor light emitting device includes: a stacked structure body, first and second electrodes, and a pad layer. The body includes first semiconductor layer of a first conductivity type, a light emitting layer, and a second semiconductor layer of second conductivity type. The first semiconductor layer has first and second portions. The light emitting layer is provided on the second portion. The second semiconductor layer is provided on the light emitting layer. The first electrode is provided on the first portion. The second electrode is provided on the second semiconductor layer and is transmittable to light emitted from the light emitting layer. The pad layer is connected to the second electrode. A transmittance of the pad layer is lower than that of the second electrode. A sheet resistance of the second electrode increases continuously along a direction from the pad layer toward the first electrode.Type: GrantFiled: August 31, 2011Date of Patent: February 4, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Koichi Tachibana, Shigeya Kimura, Toshiki Hikosaka, Taisuke Sato, Toshiyuki Oka, Shinya Nunoue
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Publication number: 20140027717Abstract: Pixel control structure for use in a backplane for an electronic display, including a transistor that has a gate, a source, a drain, and an organic semiconductor element. The pixel control structure is formed by a first patterned conductive layer portion, a second patterned conductive layer portion, a dielectric layer portion, and an organic patterned semiconductive layer portion. The dielectric layer portion comprises an overlap region defined by overlap of the second conductive layer portion over the first conductive layer portion. The overlap region defines an overlap boundary, defined by an edge portion of the first patterned conductive layer portion and an edge portion of the second patterned conductive layer portion. The patterned semiconductive layer portion extends over the overlap region and away from the overlap region so as to extend from both first and second edge portions.Type: ApplicationFiled: July 27, 2012Publication date: January 30, 2014Applicant: Polymer Vision B.V.Inventors: Nick A.J.M. van Aerle, Erik Van Veenendaal, Pieter Van Lieshout, Christoph Wilhelm Sele, Joris P.V. Maas
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Patent number: 8629457Abstract: A silicon carbide substrate has a first layer facing a semiconductor layer and a second layer stacked on the first layer. Dislocation density of the second layer is higher than dislocation density of the first layer. Thus, quantum efficiency and power efficiency of a light-emitting device can both be high.Type: GrantFiled: January 13, 2011Date of Patent: January 14, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventors: Taro Nishiguchi, Makoto Sasaki, Shin Harada, Kyoko Okita, Hiroki Inoue, Shinsuke Fujiwara, Yasuo Namikawa
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Patent number: 8629446Abstract: Materials, methods, structures and device including the same can provide a semiconductor device such as an LED using an active region corresponding to a non-polar face or surface of III-V semiconductor crystalline material. In some embodiments, an active diode region contains more non-polar III-V material oriented to a non-polar plane than III-V material oriented to a polar plane. In other embodiments, a bottom region contains more non-polar m-plane or a-plane surface area GaN than polar c-plane surface area GaN facing an active region.Type: GrantFiled: April 1, 2010Date of Patent: January 14, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Anthony J. Lochtefeld
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Patent number: 8624292Abstract: A light emitting device includes a silicon substrate having a (100) upper surface. The (100) upper surface has a recess, the recess being defined in part by (111) surfaces of the silicon substrate. The light emitting device includes a GaN crystal structure over one of the (111) surfaces which has a non-polar plane and a first surface along the non-polar plane. Light emission layers over the first surface have at least one quantum well comprising GaN.Type: GrantFiled: June 8, 2011Date of Patent: January 7, 2014Assignee: SiPhoton Inc.Inventors: Shaoher X. Pan, Jay Chen, Justin A. Payne, Michael Heuken
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Patent number: 8624259Abstract: An organic light-emitting display device includes a substrate; a thin-film transistor on the substrate; a first insulating layer covering the thin-film transistor; a first electrode on the first insulating layer, and electrically connected to the thin-film transistor; a second insulating layer on the first insulating layer so as to cover the first electrode, and having an opening for exposing a part of the first electrode; a porous member in the second insulating layer; a second electrode on the second insulating layer, and facing the first electrode so as to correspond to the opening; and an organic emission layer between the first electrode and the second electrode so as to correspond to the opening. The organic light-emitting display device may prevent degradation of characteristics of an organic light-emitting device due to discharge of gas from an organic material.Type: GrantFiled: September 23, 2011Date of Patent: January 7, 2014Assignee: Samsung Display Co., Ltd.Inventors: Yeon-Hwa Lee, Won-Jong Kim, Ji-Young Choung, Joon-Gu Lee, Darby Choi, Young-Woo Song, Jong-Hyuk Lee
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Patent number: 8614454Abstract: A semiconductor light-emitting device which includes: a single-crystal substrate formed with a plurality of projection portions on a c-plane main surface; an intermediate layer which is formed to cover the main surface of the single-crystal substrate, in which a film thickness t2 on the projection portion is smaller than a film thickness t1 on the c-plane surface, in which the film thickness t2 on the projection portion is 60% or more of the film thickness t1 on the c-plane surface, and which includes AlN having a single-crystal phase on the c-plane surface and a polycrystalline phase on the projection portion; and a semiconductor layer which is formed on the intermediate layer and includes a group III nitride semiconductor.Type: GrantFiled: November 2, 2011Date of Patent: December 24, 2013Assignee: Toyoda Gosei Co., Ltd.Inventor: Yasunori Yokoyama
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Patent number: 8604501Abstract: An organic light emitting display device includes a substrate; a first electrode layer formed on the substrate; an emission structure layer formed on the first electrode layer; an electron injection layer (EIL) formed immediately on the emission structure layer and comprising a composite layer of LiF:Yb; and a second electrode layer formed on the EIL.Type: GrantFiled: August 5, 2011Date of Patent: December 10, 2013Assignee: Samsung Display Co., Ltd.Inventors: Jin-Young Yun, Seok-Gyu Yoon, Chang-Ho Lee, IL-Soo Oh, Hee-Joo Ko, Se-Jin Cho, Hyung-Jun Song, Sung-Chul Kim, Jong-Hyuk Lee
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Patent number: 8598582Abstract: An organic light emitting display device includes a substrate, a plurality of unit pixels on the substrate, each unit pixel including a first region that emits light and a second region that transmits external light, thin film transistors (TFTs) disposed in the first region of each unit pixel, first electrodes disposed in the first region of each unit pixel, each first electrode being electrically connected to one of the TFTs, a second electrode facing the first electrodes, and commonly disposed in the unit pixels, and an organic layer interposed between the first electrodes and the second electrode, and including an emissive layer. With respect to two adjacent pixels of the plurality of unit pixels, the first region and the second region in one unit pixel are symmetrical with the first region and the second region in another adjacent unit pixel, and the second regions are connected to each other.Type: GrantFiled: June 1, 2011Date of Patent: December 3, 2013Assignee: Samsung DisplayInventors: Jun-Ho Choi, Jin-Koo Chung, Seong-Min Kim
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Patent number: 8598685Abstract: A GaN single crystal substrate has a main surface with an area of not less than 10 cm2, the main surface has a plane orientation inclined by not less than 65° and not more than 85° with respect to one of a (0001) plane and a (000-1) plane, and the substrate has at least one of a substantially uniform distribution of a carrier concentration in the main surface, a substantially uniform distribution of a dislocation density in the main surface, and a photoelasticity distortion value of not more than 5×10?5, the photoelasticity distortion value being measured by photoelasticity at an arbitrary point in the main surface when light is applied perpendicularly to the main surface at an ambient temperature of 25° C. Thus, the GaN single crystal substrate suitable for manufacture of a GaN-based semiconductor device having a small variation of characteristics can be obtained.Type: GrantFiled: June 17, 2010Date of Patent: December 3, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventors: Shinsuke Fujiwara, Koji Uematsu, Hideki Osada, Seiji Nakahata
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Patent number: 8598599Abstract: The present invention provides a Group III nitride semiconductor light-emitting device whose main surface is a plane which provides an internal electric field of zero, and which exhibits improved emission performance. The light-emitting device includes a sapphire substrate which has, in a surface thereof, a plurality of dents which are arranged in a stripe pattern as viewed from above; an n-contact layer formed on the dented surface of the sapphire substrate; a light-emitting layer formed on the n-contact layer; an electron blocking layer formed on the light-emitting layer; a p-contact layer formed on the electron blocking layer; a p-electrode; and an n-electrode. The electron blocking layer has a thickness of 2 to 8 nm and is formed of Mg-doped AlGaN having an Al compositional proportion of 20 to 30%.Type: GrantFiled: March 25, 2011Date of Patent: December 3, 2013Assignee: Toyoda Gosei Co., Ltd.Inventors: Yoshiki Saito, Koji Okuno, Yasuhisa Ushida
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Publication number: 20130306969Abstract: A thin film transistor which may be included in a pixel circuit includes: a substrate; a semiconductor layer formed on the substrate and including a source region, a first drain region spaced apart from the source region by a first current path, and a second drain region spaced apart from the source region by a second current path having a length different from that of the first current path; a gate electrode insulated from the semiconductor layer by a gate insulating layer; a source electrode connected to the source region of the semiconductor layer; a first drain electrode connected to the first drain region of the semiconductor layer; and a second drain electrode connected to the second drain region of the semiconductor layer. Currents having different magnitudes may be simultaneously provided through the first current path and the second current path.Type: ApplicationFiled: August 14, 2012Publication date: November 21, 2013Applicant: SAMSUNG DISPLAY CO., LTD.Inventors: Jin-Woo Park, Dong-Hwan Kim
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Patent number: 8587022Abstract: A nitride-based semiconductor light-emitting device 31 includes: an n-type GaN substrate 1 which has an m-plane principal surface; a current diffusing layer 7 provided on the n-type GaN substrate 1; an n-type nitride semiconductor layer 2 provided on the current diffusing layer 7; an active layer 3 provided on the n-type nitride semiconductor layer 2; a p-type nitride semiconductor layer 4 provided on the active layer 3; a p-electrode 5 which is in contact with the p-type nitride semiconductor layer 4; and an n-electrode 6 which is in contact with the n-type GaN substrate 1 or the n-type nitride semiconductor layer 2. The donor impurity concentration of the n-type nitride semiconductor layer 2 is not more than 5×1018 cm?3, and the donor impurity concentration of the current diffusing layer 7 is ten or more times the donor impurity concentration of the n-type nitride semiconductor layer 2.Type: GrantFiled: December 27, 2010Date of Patent: November 19, 2013Assignee: Panasonic CorporationInventors: Akira Inoue, Junko Iwanaga, Ryou Kato, Masaki Fujikane, Toshiya Yokogawa
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Patent number: 8575471Abstract: Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a metal or metal alloy substrate having a crystalline surface with a known lattice parameter (a). The methods further include growing a crystalline semiconductor alloy layer on the crystalline substrate surface by coincident site lattice matched epitaxy. The semiconductor layer may be grown without any buffer layer between the alloy and the crystalline surface of the substrate. The semiconductor alloy may be prepared to have a lattice parameter (a?) that is related to the lattice parameter (a). The semiconductor alloy may further be prepared to have a selected band gap.Type: GrantFiled: August 31, 2009Date of Patent: November 5, 2013Assignee: Alliance for Sustainable Energy, LLCInventors: Andrew G. Norman, Aaron J. Ptak, William E. McMahon
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Patent number: 8558256Abstract: Provided are a light emitting diode (LED) using a Si nanowire as an emission device and a method of fabricating the same. The LED includes: a semiconductor substrate; first and second semiconductor protrusions disposed on the semiconductor substrate to face each other; a semiconductor nanowire suspended between the first and second semiconductor protrusions; and first and second electrodes disposed on the first and second protrusions, respectively.Type: GrantFiled: October 19, 2007Date of Patent: October 15, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Ki-ha Hong, Young-gu Jin, Jai-kwang Shin, Sung-Il Park, Jong-seob Kim
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Publication number: 20130256668Abstract: Provided is an array substrate including a base substrate, a thin film transistor having a semiconductor layer disposed on a first part of the base substrate. The semiconductor layer includes a source electrode and a drain electrode, a gate electrode disposed on the semiconductor layer and insulated from the semiconductor layer. A light-blocking layer disposed between the base substrate and the thin film transistor. The light-blocking layer comprises a first layer continuously disposed on and around the first part of the base substrate, and a second layer formed on the first part of the base substrate without extending outside of the first part, the second layer being disposed on the first layer.Type: ApplicationFiled: August 30, 2012Publication date: October 3, 2013Applicant: SAMSUNG DISPLAY CO., LTD.Inventors: Hwa Yeul OH, Osung SEO, Jeanho SONG, Hyoung Cheol LEE, Taekyung YIM
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Patent number: 8548021Abstract: Provided is a III-nitride semiconductor laser allowing for provision of a low threshold with use of a semipolar plane. A primary surface 13a of a semiconductor substrate 13 is inclined at an angle of inclination AOFF in the range of not less than 50 degrees and not more than 70 degrees toward the a-axis direction of GaN with respect to a reference plane perpendicular to a reference axis Cx along the c-axis direction of GaN. A first cladding layer 15, an active layer 17, and a second cladding layer 19 are provided on the primary surface 13a of the semiconductor substrate 13. The well layers 23a of the active layer 17 comprise InGaN. A polarization degree P in the LED mode of emission from the active layer of the semiconductor laser that reaches lasing is not less than ?1 and not more than 0.1.Type: GrantFiled: August 17, 2011Date of Patent: October 1, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventors: Kei Fujii, Masaki Ueno, Katsushi Akita, Takashi Kyono, Yusuke Yoshizumi, Takamichi Sumitomo, Yohei Enya
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Patent number: 8541869Abstract: A III-nitride edge-emitting laser diode is formed on a surface of a III-nitride substrate having a semipolar orientation, wherein the III-nitride substrate is cleaved by creating a cleavage line along a direction substantially perpendicular to a nonpolar orientation of the III-nitride substrate, and then applying force along the cleavage line to create one or more cleaved facets of the III-nitride substrate, wherein the cleaved facets have an m-plane or a-plane orientation.Type: GrantFiled: February 12, 2008Date of Patent: September 24, 2013Assignee: The Regents of the University of CaliforniaInventors: Shuji Nakamura, James S. Speck, Steven P. DenBaars, Anurag Tyagi
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Publication number: 20130240888Abstract: A method of fabricating a thin film transistor substrate includes: forming a polymer layer on a glass substrate; forming a passivation layer on the polymer layer; forming a thin film transistor array on the passivation layer; and separating the glass substrate from the polymer layer by irradiating a laser from a rear surface of the glass substrate.Type: ApplicationFiled: June 27, 2012Publication date: September 19, 2013Inventors: Yoon-Dong CHO, Jong-Hyun Park, Soo-Young Yoon, Mi-Jung Lee, Jae-kyung Choi
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Publication number: 20130234166Abstract: This disclosure discloses a method of making a light-emitting device. The method comprises: providing a light-emitting wafer having an orientation flat portion and comprises a substrate and a light-emitting stack formed on the substrate; forming a first line along a direction which is neither parallel nor perpendicular to the orientation flat portion; forming a second line intersecting with the first scribe line; and separating the light-emitting wafer along the first and second lines to form a plurality of light-emitting chips.Type: ApplicationFiled: March 8, 2012Publication date: September 12, 2013Inventors: Ting-Chia KO, De-Shan KUO
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Patent number: 8502246Abstract: A method for the fabrication of nonpolar indium gallium nitride (InGaN) films as well as nonpolar InGaN-containing device structures using metalorganic chemical vapor deposition (MOVCD). The method is used to fabricate nonpolar InGaN/GaN violet and near-ultraviolet light emitting diodes and laser diodes.Type: GrantFiled: February 12, 2009Date of Patent: August 6, 2013Assignees: The Regents of the University of California, The Japan Science and Technology AgencyInventors: Arpan Chakraborty, Benjamin A. Haskell, Stacia Keller, James S. Speck, Steven P. DenBaars, Shuji Nakamura, Umesh K. Mishra
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Patent number: 8501592Abstract: Freestanding III-nitride single-crystal substrates whose average dislocation density is not greater than 5×105 cm?2 and that are fracture resistant, and a method of manufacturing semiconductor devices utilizing such freestanding III-nitride single-crystal substrates are made available. The freestanding III-nitride single-crystal substrate includes one or more high-dislocation-density regions (20h), and a plurality of low-dislocation-density regions (20k) in which the dislocation density is lower than that of the high-dislocation-density regions (20h), wherein the average dislocation density is not greater than 5×105 cm?2. Herein, the ratio of the dislocation density of the high-dislocation-density region(s) (20h) to the average dislocation density is sufficiently large to check the propagation of cracks in the substrate. And the semiconductor device manufacturing method utilizes the freestanding III-nitride single crystal substrate (20p).Type: GrantFiled: January 14, 2011Date of Patent: August 6, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventors: Shinsuke Fujiwara, Seiji Nakahata
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Patent number: 8494017Abstract: An edge emitting solid state laser and method. The laser comprises at least one AlInGaN active layer on a bulk GaN substrate with a non-polar or semi-polar orientation. The edges of the laser comprise {1 1?2±6} facets. The laser has high gain, low threshold currents, capability for extended operation at high current densities, and can be manufactured with improved yield. The laser is useful for optical data storage, projection displays, and as a source for general illumination.Type: GrantFiled: September 7, 2012Date of Patent: July 23, 2013Assignee: Soraa, Inc.Inventors: Rajat Sharma, Eric M. Hall, Christiane Poblenz, Mark P. D'Evelyn