Comprising Amorphous Semiconductor (epo) Patents (Class 257/E33.004)
  • Patent number: 10807865
    Abstract: A method of making a nanocrystal includes slowly infusing a M-containing compound and a X donor into a mixture including a nanocrystal core, thereby forming an overcoating including M and X on the core.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: October 20, 2020
    Assignee: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
    Inventors: Ou Chen, Moungi G. Bawendi
  • Patent number: 10239752
    Abstract: Surface plasmon-based nanosensor, comprising: at least one first element of metal, preferably silver or gold, or of semiconductor, the first element being excitable to surface Plasmon resonance, in particular localized surface plasmon resonance, in the presence of electromagnetic radiation from a source, and at least one second element preferably near the first element that in the presence of the electromagnetic radiation is exciton-plasmon coupled to the first element and emits electromagnetic radiation representative of the exciton-plasmon coupling, and systems and methods for sensing photons and chemical or biological agents.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: March 26, 2019
    Assignee: KING SAUD UNIVERSITY
    Inventor: Talal Ghannam
  • Patent number: 10008631
    Abstract: A coated quantum dot is provided wherein the quantum dot is characterized by having a solid state photoluminescence external quantum efficiency at a temperature of 90° C. or above that is at least 95% of the solid state photoluminescence external quantum efficiency of the semiconductor nanocrystal at 25° C. Products including quantum dots described herein are also disclosed.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: June 26, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Craig Breen, Wenhao Liu
  • Patent number: 10000862
    Abstract: Quantum dots and methods of making quantum dots are provided.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: June 19, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Wenhao Liu, Craig Breen
  • Patent number: 9972747
    Abstract: A coated quantum dot is provided wherein the quantum dot is characterized by having a solid state photoluminescence external quantum efficiency at a temperature of 90° C. or above that is at least 95% of the solid state photoluminescence external quantum efficiency of the semiconductor nanocrystal at 25° C. Products including quantum dots described herein are also disclosed.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: May 15, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Craig Breen, Wenhao Liu
  • Patent number: 9887318
    Abstract: A quantum dot for emitting light under electrical stimulation has a center of a first composition and a surface of a second composition. The second composition is different than the first composition. An intermediate region extends between the center and surface and has a continuous composition gradient between the center and the surface. The quantum dot is synthesized in a one pot method by controlling the rate and extent of a reaction by controlling the following parameters: (i) type and quantity of reactant, (ii) reaction time, and (iii) reaction temperature.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: February 6, 2018
    Assignee: Nanophotonica
    Inventors: Alexandre Titov, Lei Qian, Ying Zheng, Jake Hyvonen, Yixing Yang
  • Patent number: 9790424
    Abstract: A nanocrystal capable of light emission includes a nanoparticle having photoluminescence having quantum yields of greater than 30%.
    Type: Grant
    Filed: April 8, 2015
    Date of Patent: October 17, 2017
    Assignee: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
    Inventors: Moungi G. Bawendi, Klavs F. Jensen, Bashir O. Dabbousi, Javier Rodriguez-Viejo, Frederic Victor Mikulec
  • Patent number: 9567520
    Abstract: A method of producing nanoparticles comprises effecting conversion of a nanoparticle precursor composition to the material of the nanoparticles. The precursor composition comprises a first precursor species containing a first ion to be incorporated into the growing nanoparticles and a separate second precursor species containing a second ion to be incorporated into the growing nanoparticles. The conversion is effected in the presence of a molecular cluster compound under conditions permitting seeding and growth of the nanoparticles.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: February 14, 2017
    Assignee: Nanoco Technologies Ltd.
    Inventors: Paul O'Brien, Nigel Pickett
  • Patent number: 9493351
    Abstract: Methods for the non-hot-injection synthesis of semiconductor nanocrystals are described. For example, a multi-podal cadmium selenide nanocrystal may be produced by a method including heating a degassed mixture comprising cadmium oxide, selenium, trioctylphosphine, and a carboxylic acid in a non-coordinating solvent from about room temperature to about 210° C., where the multi-podal cadmium selenide nanocrystal may be a tetrapodal cadmium selenide nanocrystal.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: November 15, 2016
    Assignee: East China University of Science and Technology
    Inventors: Xinhua Zhong, Wenjin Zhang
  • Patent number: 9488650
    Abstract: The disclosure relates to the detection of analytes (e.g., biological pathogens such as bacteria or viruses) using a conductive polymer label. The disclosed detection system utilizing the conductive polymer label generally involves the formation of an analyte conjugate between the target analyte and a conductive polymer moiety conjugated to the target analyte. The conductive polymer portion of the analyte conjugate is electrically activated to form an electrically activated analyte conjugate having an increased electrical conductivity relative to the analyte conjugate as originally formed. The electrically activated analyte conjugate can then be detected by any suitable means, such as by conductimetric or electrochemical detection.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: November 8, 2016
    Assignee: BOARD OF TRUSTEES OF MICHIGAN STATE UNIVERSITY
    Inventors: Evangelyn C. Alocilja, Emma Setterington
  • Patent number: 9441156
    Abstract: A nanocrystal capable of light emission includes a nanoparticle having photoluminescence having quantum yields of greater than 30%.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: September 13, 2016
    Assignee: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
    Inventors: Moungi G. Bawendi, Klavs F. Jensen, Bashir O. Dabbousi, Javier Rodriguez-Viejo, Frederic Victor Mikulec
  • Patent number: 9406759
    Abstract: A doping method using a three-step synthesis to make high-quality doped nanocrystals is provided. The first step includes synthesizing starting host particles. The second step includes dopant growth on the starting host particles. The third step includes final shell growth. In one embodiment, this method can be used to form Mn-doped CdS/ZnS core/shell nanocrystals. The Mn dopant can be formed inside the CdS core, at the core/shell interface, and/or in the ZnS shell. The subject method allows precisely controlling the impurity radial position and doping level in the nanocrystals.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: August 2, 2016
    Assignee: University of Florida Research Foundation, Inc.
    Inventor: Y. Charles Cao
  • Patent number: 9029850
    Abstract: An organic light-emitting display apparatus includes a thin film transistor including an active layer, a gate electrode, source and drain electrodes, a first insulating layer between the active layer and the gate electrode, and a second insulating layer between the gate electrode and the source and drain electrodes, a third insulating layer covering the source and drain electrodes, the third insulating layer being an organic insulating layer, a pixel electrode including a semi-transparent metal layer and having an end located in a trench formed around the first insulating layer, a fourth insulating layer including an opening exposing a top surface of the pixel electrode, the fourth insulating layer being an organic insulating layer, an organic light-emitting layer on the pixel electrode, and a counter electrode on the organic light-emitting layer.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: May 12, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yul-Kyu Lee, Kyung-Hoon Park, Sun Park, Yeong-Ho Song, Ji-Hoon Song
  • Patent number: 9012273
    Abstract: A flat panel display device having increased capacitance and a method of manufacturing the flat panel display device are provided. A flat panel display device includes: a plurality of pixel areas, each located at a crossing region of a gate line, a data line, and a common voltage line; a thin film transistor (TFT) located at a region where the gate line and the data line cross each other, the TFT including a gate electrode, a source electrode, and a drain electrode; and a storage capacitor located at a region where the common voltage line and the drain electrode cross each other, the storage capacitor including first, second, and a third storage electrodes.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: April 21, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Zhi-Feng Zhan, Seung-Gyu Tae, Deok-Hoi Kim
  • Patent number: 8987719
    Abstract: An organic light emitting diode (OLED) display includes: a substrate; an organic light emitting element formed on the substrate; a first thin film transistor connected to the organic light emitting element and including an amorphous silicon channel region; and at least one other thin film transistor connected to the first thin film transistor and including a polysilicon channel region.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: March 24, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventor: Sung-Hoon Moon
  • Patent number: 8987723
    Abstract: A display device including: a substrate; a first semiconductor layer disposed on the substrate; a second semiconductor layer disposed on the substrate and adjacent to the first semiconductor layer; a first insulation layer disposed on both the first semiconductor layer and the second semiconductor layer, the first insulation layer including a first opening forming a space between the first semiconductor layer and the second semiconductor layer; and a second insulation layer disposed on the first insulation layer and that fills the first opening.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: March 24, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Jin-Wook Seo, Ki-Yong Lee, Yun-Mo Chung, Jong-Ryuk Park, Tak-Young Lee, Dong-Hyun Lee, Kil-Won Lee, Byung-Soo So, Yong-Duck Son, Seung-Kyu Park, Jae-Wan Jung, Min-Jae Jeong
  • Patent number: 8963247
    Abstract: Provided is a structure for improved electrical signal isolation between adjacent devices situated in a top semiconductor layer of the structure and a method for the structure's fabrication. The structure comprises a gate situated on the top semiconductor layer, the top semiconductor layer situated over a base oxide layer, and the base oxide layer situated over a handle wafer. The top surface of the handle wafer is amorphized by an inert implant of Xenon or Argon to reduce carrier mobility in the handle wafer and improve electrical signal isolation between the adjacent devices situated in the top semiconductor layer.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: February 24, 2015
    Assignee: Newport Fab, LLC
    Inventors: Paul D. Hurwitz, Robert L. Zwingman
  • Patent number: 8957421
    Abstract: In a flat panel display (FPD) and a method of manufacturing the same, the FPD includes a substrate, a semiconductor layer formed on the substrate, a wiring line formed on the substrate so as to be separated from the semiconductor layer, an insulating layer formed on the semiconductor layer and the wiring line, a gate electrode formed on the insulating layer formed on the semiconductor layer and extended to a top of the wiring line, and a source electrode and a drain electrode coupled to a source region and a drain region, respectively, of the semiconductor layer. Capacitance is formed by the gate electrode and the wiring line.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: February 17, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventor: Jong-Seok Kim
  • Patent number: 8953120
    Abstract: A display device having a light-emitting element and a see-through capability, with which a variety of display modes can be exhibited depending on a use application or situation. In such a display device having a see-through capability, between a first display portion having pixels including dual-emission type light-emitting elements and a second display portion having a light-scattering liquid crystal layer, a shutter-shaped light-blocking unit is provided so that a variety of display modes can be exhibited depending on use applications or situations by selecting modes of the first display portion, the second display portion, and the shutter-shaped light-blocking unit.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: February 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yoshiharu Hirakata
  • Patent number: 8907923
    Abstract: The present invention provides a photo sensor, a method of forming the photo sensor, and a related optical touch device. The photo sensor includes a first electrode, a second electrode, a first silicon-rich dielectric layer and a second silicon-rich dielectric layer. The first silicon-rich dielectric layer is disposed between the first electrode and the second electrode for sensing infrared rays, and the second silicon-rich dielectric layer is disposed between the first silicon-rich dielectric layer and the second electrode for sensing visible light beams. The multi-layer structure including the first silicon-rich dielectric layer and the second silicon-rich dielectric layer enables the single photo sensor to effectively detect both infrared rays and visible light beams. Moreover, the single photo sensor is easily integrated into an optical touch device to form optical touch panel integrated on glass.
    Type: Grant
    Filed: March 7, 2010
    Date of Patent: December 9, 2014
    Assignee: AU Optronics Corp.
    Inventors: An-Thung Cho, Chia-Tien Peng, Hung-Wei Tseng, Cheng-Chiu Pai, Yu-Hsuan Li, Chun-Hsiun Chen, Wei-Ming Huang
  • Patent number: 8860021
    Abstract: A structure including an oxide semiconductor layer which is provided over an insulating surface and includes a channel formation region and a pair of low-resistance regions between which the channel formation region is positioned, a gate insulating film covering a top surface and a side surface of the oxide semiconductor layer, a gate electrode covering a top surface and a side surface of the channel formation region with the gate insulating film positioned therebetween, and electrodes electrically connected to the low-resistance regions is employed. The electrodes are electrically connected to at least side surfaces of the low-resistance regions, so that contact resistance with the source electrode and the drain electrode is reduced.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: October 14, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsuo Isobe, Hiromichi Godo
  • Patent number: 8859312
    Abstract: A method of manufacturing an integrated circuit (IC) for driving a flexible display includes depositing a pattern of spatially non-repetitive features in a first layer on a flexible substrate, said pattern of spatially non-repetitive features not substantially regularly repeating in both of two orthogonal directions (x,y) in the plane of the substrate; depositing a pattern of spatially repetitive features in a second layer on said first layer; aligning said second layer and said first layer so as to allow electrical coupling between said non-repetitive features and said repetitive features, wherein distortion compensation is applied during deposition of said repetitive features to enable said alignment.
    Type: Grant
    Filed: October 1, 2007
    Date of Patent: October 14, 2014
    Assignee: Plastic Logic Limited
    Inventors: Carl Hayton, Paul A. Cain
  • Patent number: 8847230
    Abstract: A thin film transistor is provided that includes a gate electrode, a source electrode, and a drain electrode, an oxide semiconductor active layer formed over the gate electrode, a fixed charge storage layer formed over a portion of the oxide semiconductor active layer, and a fixed charge control electrode formed over the fixed charged storage layer.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: September 30, 2014
    Assignee: Sony Corporation
    Inventors: Yasuhiro Terai, Eri Fukumoto, Toshiaki Arai
  • Patent number: 8735882
    Abstract: A semiconductor device may include a composite represented by Formula 1 below as an active layer. x(Ga2O3).y(In2O3).z(ZnO)??Formula 1 wherein, about 0.75?x/z?about 3.15, and about 0.55?y/z? about 1.70. Switching characteristics of displays and driving characteristics of driving transistors may be improved by adjusting the amounts of a gallium (Ga) oxide and an indium (In) oxide mixed with a zinc (Zn) oxide and improving optical sensitivity.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: May 27, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-jung Kim, I-hun Song, Dong-hun Kang, Young-soo Park
  • Patent number: 8674371
    Abstract: The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first wiring layer and a second wiring layer which are over the gate insulating film and whose end portions overlap with the gate electrode; and an oxide semiconductor layer which is over the gate electrode and in contact with the gate insulating film and the end portions of the first wiring layer and the second wiring layer. The gate electrode of the non-linear element and a scan line or a signal line is included in a wiring, the first or second wiring layer of the non-linear element is directly connected to the wiring so as to apply the potential of the gate electrode.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: March 18, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Tomoya Futamura, Takahiro Kasahara
  • Patent number: 8669166
    Abstract: One illustrative method disclosed herein includes forming a plurality of die above a crystalline semiconducting substrate, irradiating and cooling an edge region of the substrate to form an amorphous region in the edge region of the substrate and, after forming the amorphous region, performing at least one process operation to reduce the thickness of the substrate.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: March 11, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Rahul Agarwal, Ramakanth Alapati, Jon Greenwood
  • Publication number: 20140027717
    Abstract: Pixel control structure for use in a backplane for an electronic display, including a transistor that has a gate, a source, a drain, and an organic semiconductor element. The pixel control structure is formed by a first patterned conductive layer portion, a second patterned conductive layer portion, a dielectric layer portion, and an organic patterned semiconductive layer portion. The dielectric layer portion comprises an overlap region defined by overlap of the second conductive layer portion over the first conductive layer portion. The overlap region defines an overlap boundary, defined by an edge portion of the first patterned conductive layer portion and an edge portion of the second patterned conductive layer portion. The patterned semiconductive layer portion extends over the overlap region and away from the overlap region so as to extend from both first and second edge portions.
    Type: Application
    Filed: July 27, 2012
    Publication date: January 30, 2014
    Applicant: Polymer Vision B.V.
    Inventors: Nick A.J.M. van Aerle, Erik Van Veenendaal, Pieter Van Lieshout, Christoph Wilhelm Sele, Joris P.V. Maas
  • Publication number: 20140001475
    Abstract: A manufacturing method of the array substrate includes the steps: A. A first mask manufacturing process is adopted to from scan lines and thin film transistor (TFT) gates on a surface of a substrate. B. A second mask manufacturing process is adopted to form scan lines and data lines of the array substrate, a source electrode and a drain electrode of TFT and a conducting channel positioned between the source electrode and the drain electrode. C. A photoresistor formed in the second mask manufacturing process is incinerated, and then, an a-Si film is paved on the surface of the array substrate. D. The photoresistor is stripped to form an undoped active layer. E. A third mask manufacturing process is adopted to form a transparent conducting layer on the surface of the drain electrode of the TFT. Only three mask manufacturing process in the present disclosure are needed to manufacture the entire array substrate.
    Type: Application
    Filed: July 12, 2012
    Publication date: January 2, 2014
    Inventor: Jun Wang
  • Patent number: 8604501
    Abstract: An organic light emitting display device includes a substrate; a first electrode layer formed on the substrate; an emission structure layer formed on the first electrode layer; an electron injection layer (EIL) formed immediately on the emission structure layer and comprising a composite layer of LiF:Yb; and a second electrode layer formed on the EIL.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: December 10, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jin-Young Yun, Seok-Gyu Yoon, Chang-Ho Lee, IL-Soo Oh, Hee-Joo Ko, Se-Jin Cho, Hyung-Jun Song, Sung-Chul Kim, Jong-Hyuk Lee
  • Patent number: 8598586
    Abstract: Disclosed is a thin film transistor including: a gate insulating layer covering a gate electrode; a microcrystalline semiconductor region over the gate insulating layer; a pair of amorphous semiconductor region over the microcrystalline semiconductor; a pair of impurity semiconductor layers over the amorphous semiconductor regions; and wirings over the impurity semiconductor layers. The microcrystalline semiconductor region has a surface having a projection and depression on the gate insulating layer side. The microcrystalline semiconductor region includes a first microcrystalline semiconductor region which is not covered with the amorphous regions and a second microcrystalline semiconductor region which is in contact with the amorphous semiconductor regions. A thickness d1 of the first microcrystalline semiconductor region is smaller than a thickness d2 of the second microcrystalline semiconductor region and d1 is greater than or equal to 30 nm.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: December 3, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshiyuki Isa, Atsushi Hirose
  • Patent number: 8598582
    Abstract: An organic light emitting display device includes a substrate, a plurality of unit pixels on the substrate, each unit pixel including a first region that emits light and a second region that transmits external light, thin film transistors (TFTs) disposed in the first region of each unit pixel, first electrodes disposed in the first region of each unit pixel, each first electrode being electrically connected to one of the TFTs, a second electrode facing the first electrodes, and commonly disposed in the unit pixels, and an organic layer interposed between the first electrodes and the second electrode, and including an emissive layer. With respect to two adjacent pixels of the plurality of unit pixels, the first region and the second region in one unit pixel are symmetrical with the first region and the second region in another adjacent unit pixel, and the second regions are connected to each other.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: December 3, 2013
    Assignee: Samsung Display
    Inventors: Jun-Ho Choi, Jin-Koo Chung, Seong-Min Kim
  • Publication number: 20130306969
    Abstract: A thin film transistor which may be included in a pixel circuit includes: a substrate; a semiconductor layer formed on the substrate and including a source region, a first drain region spaced apart from the source region by a first current path, and a second drain region spaced apart from the source region by a second current path having a length different from that of the first current path; a gate electrode insulated from the semiconductor layer by a gate insulating layer; a source electrode connected to the source region of the semiconductor layer; a first drain electrode connected to the first drain region of the semiconductor layer; and a second drain electrode connected to the second drain region of the semiconductor layer. Currents having different magnitudes may be simultaneously provided through the first current path and the second current path.
    Type: Application
    Filed: August 14, 2012
    Publication date: November 21, 2013
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jin-Woo Park, Dong-Hwan Kim
  • Patent number: 8569859
    Abstract: A display device including: a substrate; a first semiconductor layer disposed on the substrate; a second semiconductor layer disposed on the substrate and adjacent to the first semiconductor layer; a first insulation layer disposed on both the first semiconductor layer and the second semiconductor layer, the first insulation layer including a first opening forming a space between the first semiconductor layer and the second semiconductor layer; and a second insulation layer disposed on the first insulation layer and that fills the first opening.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: October 29, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Jin-Wook Seo, Ki-Yong Lee, Yun-Mo Chung, Jong-Ryuk Park, Tak-Young Lee, Dong-Hyun Lee, Kil-Won Lee, Byung-Soo So, Min-Jae Jeong, Yong-Duck Son, Seung-Kyu Park, Jae-Wan Jung
  • Patent number: 8563977
    Abstract: A transistor is constituted of a gate electrode 2, a gate insulation layer 3, a semiconductor layer 4 formed of an amorphous oxide, a source electrode 5, a drain electrode 6 and a protective layer 7. The protective layer 7 is provided on the semiconductor layer 4 in contact with the semiconductor layer 4, and the semiconductor layer 4 includes a first layer at least functioning as a channel layer and a second layer having higher resistance than the first layer. The first layer is provided on the gate electrode 2 side of the semiconductor layer 4 and the second layer is provided on the protective layer 7 side of the semiconductor layer 4.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: October 22, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mikio Shimada, Ryo Hayashi, Hideya Kumomi
  • Publication number: 20130240888
    Abstract: A method of fabricating a thin film transistor substrate includes: forming a polymer layer on a glass substrate; forming a passivation layer on the polymer layer; forming a thin film transistor array on the passivation layer; and separating the glass substrate from the polymer layer by irradiating a laser from a rear surface of the glass substrate.
    Type: Application
    Filed: June 27, 2012
    Publication date: September 19, 2013
    Inventors: Yoon-Dong CHO, Jong-Hyun Park, Soo-Young Yoon, Mi-Jung Lee, Jae-kyung Choi
  • Patent number: 8513662
    Abstract: Provided is a semiconductor device including a semiconductor element including at least a semiconductor as a component characterized by including: a mechanism for irradiating the semiconductor with light having a wavelength longer than an absorption edge wavelength of the semiconductor; and a dimming mechanism, provided in a part of an optical path through which the light passes, for adjusting at least one factor selected from an intensity, irradiation time and the wavelength of the light, wherein a threshold voltage of the semiconductor element is varied by the light adjusted by the dimming mechanism.
    Type: Grant
    Filed: May 11, 2009
    Date of Patent: August 20, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hisato Yabuta, Masato Ofuji, Yasuyoshi Takai, Takehiko Kawasaki, Norio Kaneko, Ryo Hayashi
  • Patent number: 8471257
    Abstract: The present invention provides a motherboard having panel substrates efficiently arranged thereon and a reduced wasted substrate region, a method for producing the motherboard, and a device substrate comprising the panel substrates formed on the motherboard. The motherboard of the present invention comprises a plurality of panel substrates, wherein the motherboard has a silicon thin film formed on a principal surface thereof, each of the panel substrates has a transistor forming region and a marginal region, the transistor forming region is formed by polycrystallizing the silicon thin film, the marginal region is provided on an outer edge of each of the panel substrates, and at least one of the panel substrates has the marginal region including a region with a silicon thin film which has a crystal profile different from a crystal profile of a silicon thin film in the transistor forming region.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: June 25, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yohsuke Fujikawa
  • Patent number: 8450129
    Abstract: A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: May 28, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hong-Kee Chin, Sang-Gab Kim, Woong-Kwon Kim, Yong-Mo Choi, Seung-Ha Choi, Shin-Il Choi, Ho-Jun Lee, Jung-Suk Bang, Yu-Gwang Jeong
  • Patent number: 8440482
    Abstract: A method for manufacturing a transflective liquid crystal display panel includes providing an array substrate having a plurality of pixel regions, each of the pixel regions includes a device region, a transmission region and a reflection region defined therein; forming a first metal layer on the array substrate; patterning the first metal layer to simultaneously form a gate electrode in the device region and a plurality of metal bumps in the reflection region; forming a first insulating layer having a rough surface and covering the gate electrode and the metal bumps on the array substrate; forming a patterned semiconductor layer on the gate electrode; forming a reflective layer covering the first insulating layer and having a rough surface in the reflection region; and sequentially forming a patterned second insulating layer and a transparent pixel electrode on the array substrate.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: May 14, 2013
    Assignee: HannStar Display Corp.
    Inventors: Sweehan J. H. Yang, Po-Sheng Shih, Chian-Chih Hsiao, Hsien-Tang Hu, Ting-Chung Liu
  • Patent number: 8421070
    Abstract: A semiconductor device may include a composite represented by Formula 1 below as an active layer. x(Ga2O3).y(In2O3).z(ZnO)??Formula 1 wherein, about 0.75?x/z?about 3.15, and about 0.55?y/z?about 1.70. Switching characteristics of displays and driving characteristics of driving transistors may be improved by adjusting the amounts of a gallium (Ga) oxide and an indium (In) oxide mixed with a zinc (Zn) oxide and improving optical sensitivity.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: April 16, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-jung Kim, I-hun Song, Dong-hun Kang, Young-soo Park
  • Publication number: 20130088468
    Abstract: A semiconductor device in which a decrease in the yield by electrostatic destruction can be prevented is provided. A scan line driver circuit for supplying a signal for selecting a plurality of pixels to a scan line includes a shift register for generating the signal. One conductive film functioning as respective gate electrodes of a plurality of transistors in the shift register is divided into a plurality of conductive films. The divided conductive films are electrically connected to each other by a conductive film which is formed in a layer different from the divided conductive films are formed. The plurality of transistors includes a transistor on an output side of the shift register.
    Type: Application
    Filed: October 1, 2012
    Publication date: April 11, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: SEMICONDUCTOR ENERGY LABORATORY CO.
  • Patent number: 8409891
    Abstract: A display device in which a plurality of gate wires and a plurality of drain wires that intersect the gate wires are provided, and thin film transistors connected to the gate wires and the drain wires are formed for respective pixel regions. At least one of the gate wires, the drain wires, and lead wires drawn from the gate wires or the drain wires is formed of a light-transmitting patterned conductive film. The light-transmitting patterned conductive film is formed of at least a first light-transmitting patterned conductive film, and a second light-transmitting patterned conductive film laminated on the first light-transmitting patterned conductive film. The second light-transmitting patterned conductive film is formed of a conductive film for coating only the surface of the first light-transmitting patterned conductive film including its side wall surface.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: April 2, 2013
    Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Takeshi Kuriyagawa, Jun Fujiyoshi
  • Publication number: 20130075736
    Abstract: A thin film transistor array panel includes: an substrate; a gate line and a gate pad portion disposed on the substrate; a gate insulating layer disposed on the gate line and the gate pad portion; a data line and a data pad portion disposed on the gate insulating layer; a gate assistance pad portion disposed at a position corresponding to the gate pad portion; a first insulating layer disposed on the data line and removed at the gate pad portion and the data pad portion; a first field generating electrode disposed on the first insulating layer; a second insulating layer disposed on the first field generating electrode and removed at the gate pad portion and the data pad portion; and a second field generating electrode disposed on the second insulating layer. The assistance gate pad portion and the gate insulating layer include a contact hole exposing the gate pad portion.
    Type: Application
    Filed: January 27, 2012
    Publication date: March 28, 2013
    Inventors: Jae-Sung KIM, Hoon KANG, Jin-Young CHOI
  • Publication number: 20130043477
    Abstract: An array substrate for a liquid crystal display device comprises: gate and data lines crossing each other on a substrate to define a pixel region; a common line spaced apart from and parallel with the gate line; a thin film transistor in the pixel region and connected to the gate and data lines; a passivation layer on the thin film transistor; and pixel and common electrodes alternately arranged to produce an in-plane electric field, wherein each of the pixel and common electrodes has a double-layered structure of which the lower layer is formed of reflective conductive material and the upper layer is formed of transparent conductive material.
    Type: Application
    Filed: August 16, 2012
    Publication date: February 21, 2013
    Inventors: Doo-Hee Jang, Young-Sup Jung, Jeong-Yun Lee, Ju-Ran Lee, Soo-Young Choi
  • Patent number: 8378350
    Abstract: Provided is a display device including first and second gate interconnections; a first pixel circuit disposed at one side of the first gate interconnection, the first pixel circuit including a first transistor, a gate electrode of the first transistor electrically connected to the first gate interconnection, a source electrode of the first transistor formed in a source layer, the source electrode including a first source electrode facing portion overlapping with the gate electrode; and a second pixel circuit disposed at the other side of the second gate interconnection, the second pixel circuit including a second transistor, a gate electrode of the second transistor electrically connected to the second gate interconnection, a source electrode of the second transistor formed in the source layer, the source electrode including a second source electrode facing portion overlapping with the gate electrode and stretched along the first source electrode facing portion.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: February 19, 2013
    Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Ryouhei Suzuki, Yasuyuki Yamada
  • Patent number: 8378344
    Abstract: It is an object to provide a light-emitting device in which plural kinds of circuits are formed over one substrate and plural kinds of thin film transistors corresponding to characteristics of the plural kinds of circuits are provided. An inverted coplanar thin film transistor in which an oxide semiconductor layer overlaps with a source electrode layer and a drain electrode layer is used for a pixel, and a channel-etched thin film transistor is used for a driver circuit. A color filter layer is provided between the pixel thin film transistor and a light-emitting element which is electrically connected to the pixel thin film transistor so as to overlap with the light-emitting element.
    Type: Grant
    Filed: August 26, 2010
    Date of Patent: February 19, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masayuki Sakakura, Yoshiaki Oikawa, Shunpei Yamazaki, Junichiro Sakata, Masashi Tsubuku, Kengo Akimoto, Miyuki Hosoba
  • Publication number: 20130037811
    Abstract: An array substrate for a transflective liquid crystal display device includes: a substrate; a gate line and a data line on the substrate, the gate line and the data line crossing each other to define a pixel region including a transmissive area and a reflective area surrounding the transmissive area; a thin film transistor having a gate insulating layer, the thin film transistor electrically connected to the gate line and the data line; a first passivation layer having a drain contact hole exposing a drain electrode of the thin film transistor and a through hole exposing the substrate in the transmissive area; a pixel electrode on the first passivation layer, the pixel electrode contacting the substrate in the transmissive area through the through hole; and a reflective plate on the pixel electrode, the reflective plate being electrically connected to the drain electrode through the drain contact hole and to the pixel electrode.
    Type: Application
    Filed: May 23, 2011
    Publication date: February 14, 2013
    Inventors: Jung Il LEE, Joong-Young Yang
  • Publication number: 20130032803
    Abstract: An OLED device includes an active layer on a substrate; a first insulating layer covering the active layer, and including a first opening and a first insulation island in the first opening, separated from an inner surface of the first opening; a gate electrode on the first insulating layer including gate bottom and top electrodes; a pixel electrode on the first insulation island on the same layer as the gate bottom electrode; source and drain electrodes insulated from the gate electrode and electrically connected to the active layer; a second insulating layer between the gate and the source and drain electrodes, and including a second opening exposing the pixel electrode; a light-reflecting portion in the openings, and surrounding the pixel electrode; an intermediate layer on the pixel electrode and including an organic emissive layer; and an opposite electrode facing the pixel electrode with the intermediate layer interposed between them.
    Type: Application
    Filed: December 27, 2011
    Publication date: February 7, 2013
    Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.
    Inventors: Sang-Ho Moon, Joon-Hoo Choi, Chun-Gi You, Kyu-Sik Cho, Jong-Hyun Park
  • Publication number: 20130026477
    Abstract: A flat panel display device includes a substrate having an emission area in which an image is displayed and a pad area that is outside of the emission area, a semiconductor layer on the substrate, and the semiconductor layer has crystallization areas and amorphous areas. An electrostatic protecting circuit is on a portion of at least one of the amorphous areas corresponding to the pad area, and a panel circuit unit is on a portion of at least one of the crystallization areas corresponding to the pad area.
    Type: Application
    Filed: May 16, 2012
    Publication date: January 31, 2013
    Inventor: Hyun-Been HWANG
  • Publication number: 20130017630
    Abstract: Provided are a crystallization apparatus and method, which prevent cracks from being generated, a method of manufacturing a thin film transistor (TFT), and a method of manufacturing an organic light emitting display apparatus. The crystallization apparatus includes a chamber for receiving a substrate, a first flash lamp and a second flash lamp, which are disposed facing each other within the chamber, wherein amorphous silicon layers are disposed on a first surface of the substrate facing the first flash lamp and a second surface of the substrate facing the second flash lamp, respectively.
    Type: Application
    Filed: September 13, 2012
    Publication date: January 17, 2013
    Applicant: Samsung Display Co., Ltd.
    Inventors: Jin Seong-Hyun, Chang Young-Jin, Oh Jae-Hwan, Lee Won-Kyu