With Heterojunction (epo) Patents (Class 257/E33.016)
  • Patent number: 9000414
    Abstract: An object of the present invention is to provide a light emitting diode having a heterogeneous material structure and a method of manufacturing thereof, in which efficiency of extracting light to outside is improved by forming depressions and prominences configured of heterogeneous materials different from each other before or in the middle of forming a semiconductor material on a substrate in order to improve the light extraction efficiency.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: April 7, 2015
    Assignee: Korea Photonics Technology Institute
    Inventors: Sang-Mook Kim, Jong-Hyeob Baek
  • Patent number: 8957402
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first nitride semiconductor layer, a nitride semiconductor light emitting layer, a second nitride semiconductor layer, a p-side electrode, and an n-side electrode. The nitride semiconductor light emitting layer is provided on the p-side region of the second face of the first nitride semiconductor layer. The second nitride semiconductor layer is provided on the nitride semiconductor light emitting layer. The p-side electrode is provided on the second nitride semiconductor layer. The n-side electrode is provided on the n-side region of the second face of the first nitride semiconductor layer. The nitride semiconductor light emitting layer has a first concave-convex face in a side of the first nitride semiconductor layer, and a second concave-convex face in a side of the second nitride semiconductor layer.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: February 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiro Kojima, Hideto Furuyama, Miyoko Shimada, Yosuke Akimoto
  • Patent number: 8916885
    Abstract: The present invention introduces the novel, improved design approach of the semiconductor devices that utilize the effect of carrier recombination, for example, to produce the electromagnetic radiation. The approach is based on the separate control over the injection of the electrons and holes into the active region of the device. As a result, better recombination efficiencies can be achieved, and the effect of the wavelength shift of the produced radiation can be eliminated. The devices according to the present invention outperform existing solid state light and electromagnetic radiation sources and can be used in any applications where solid state light sources are currently involved, as well as any applications future discovered.
    Type: Grant
    Filed: August 3, 2011
    Date of Patent: December 23, 2014
    Inventors: Alexei Koudymov, Christian Martin Wetzel
  • Patent number: 8907322
    Abstract: A light emitting diode is provided, which includes an n-type contact layer and a light generating structure adjacent to the n-type contact layer. The light generating structure includes a set of quantum wells. The contact layer and light generating structure can be configured so that a difference between an energy of the n-type contact layer and an electron ground state energy of a quantum well is greater than an energy of a polar optical phonon in a material of the light generating structure. Additionally, the light generating structure can be configured so that its width is comparable to a mean free path for emission of a polar optical phonon by an electron injected into the light generating structure. The diode can include a blocking layer, which is configured so that a difference between an energy of the blocking layer and the electron ground state energy of a quantum well is greater than the energy of the polar optical phonon in the material of the light generating structure.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: December 9, 2014
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Remigijus Gaska, Maxim S. Shatalov, Michael Shur
  • Patent number: 8835998
    Abstract: A compositionally graded semiconductor device and a method of making same are disclosed that provides an efficient p-type doping for wide bandgap semiconductors by exploiting electronic polarization within the crystalline lattice. The compositional graded semiconductor graded device includes a graded heterojunction interface that exhibits a 3D bound polarization-induced sheet charge that spreads in accordance with ??(z)=??·P(z), where ??(z) is a volume charge density in a polar (z) direction, and ? is a divergence operator, wherein the graded heterojunction interface is configured to exhibit substantially equivalent conductivities along both lateral and vertical directions relative to the graded heterojunction interface.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: September 16, 2014
    Assignee: University of Notre Dame du Lac
    Inventors: John Simon, Debdeep Jena, Huili Xing
  • Patent number: 8728884
    Abstract: A method of fabricating a normally “off” GaN heterostructure field effect transistor having a source and a drain including depositing a passivation layer patterned to cover a channel region between a source and a drain, forming a first opening in the passivation layer, the first opening for defining a gate area in the channel region and the first opening having a first length dimension along a direction of current flow between the source and the drain, and implanting ions in an implant area within the gate area, wherein the implant area has a second length dimension along the direction of current flow shorter than the first length dimension.
    Type: Grant
    Filed: July 28, 2009
    Date of Patent: May 20, 2014
    Assignee: HRL Laboratories, LLC
    Inventors: Tahir Hussain, Miroslav Micovic, Wah S. Wong, Shawn D. Burnham
  • Patent number: 8659041
    Abstract: A nitride semiconductor light emitting diode includes at least an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer. The active layer is formed of one first nitride semiconductor layer having a highest In ratio in the light emitting diode. The light emitting diode further includes at least one of a second nitride semiconductor layer located between the active layer and the n-type nitride semiconductor layer and including an InGaN layer, and a third nitride semiconductor layer located between the active layer and the p-type nitride semiconductor layer and including an InGaN layer. Respective In (Indium) ratios of the InGaN layers included in the second nitride semiconductor layer and the InGaN layers included in the third nitride semiconductor layer are lower than the In ratio of the first nitride semiconductor layer forming the active layer. The LED with high luminous efficiency can thus be provided.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: February 25, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Satoshi Komada
  • Patent number: 8643003
    Abstract: An object of the present invention is to provide a light emitting element or a light emitting device that can be formed without any regard for a work function of an electrode. Another object of the invention is to provide a light emitting element or a light emitting device in that the range of choice for a material of an electrode can be widened. In an aspect of the invention, a light emitting device includes first, second and third layers between mutually-facing first and second electrodes. The first layer has a donor level. The second layer is a single layer or a laminated body containing a light emitting substance. The third layer has an acceptor level. When a potential of the second electrode is set higher than that of the first electrode, holes generated in the second layer are injected in the third layer.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: February 4, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke Kumaki, Satoshi Seo
  • Patent number: 8552461
    Abstract: An LED (light emitting diode) includes a seat and an LED chip. The seat includes a main body, and a first electrode and a second electrode formed on the main body. The LED chip includes a first semiconductor layer, an annular light-emitting layer encircling the first semiconductor layer, and an annular second semiconductor layer encircling the light-emitting layer. The first electrode electrically connects with the first semiconductor layer, and the second electrode electrically connects with the second semiconductor layer.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: October 8, 2013
    Assignee: Foxsemicon Integrated Technology, Inc.
    Inventor: Kuo-Cheng Chang
  • Publication number: 20130256629
    Abstract: Graphene semiconductor device, a method of manufacturing a graphene semiconductor device, an organic light emitting display and a memory, include forming a multilayered member including a sacrificial substrate, a sacrificial layer, and a semiconductor layer deposited in sequence, forming a transfer substrate on the semiconductor layer, forming a first laminate including the transfer substrate and the semiconductor layer by removing the sacrificial layer to separate the sacrificial substrate from the semiconductor layer, forming a second laminate by forming a graphene layer on a base substrate, combining the first laminate and the second laminate such that the semiconductor layer contacts the graphene layer, and removing the transfer substrate.
    Type: Application
    Filed: June 14, 2012
    Publication date: October 3, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chang Seung LEE, Young Bae KIM, Young Jun YUN, Yong Sung KIM, David SEO, Joo Ho LEE
  • Patent number: 8502263
    Abstract: Some aspects for the invention include a method and a structure including a light-emitting device disposed over a second crystalline semiconductor material formed over a semiconductor substrate comprising a first crystalline material.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: August 6, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jizhong Li, Anthony J. Lochtefeld
  • Publication number: 20130126887
    Abstract: An LED includes a seat and an LED chip. The seat includes a main body, a first electrode protruding upwardly from the main body, and a second electrode formed on the main body. The LED chip includes a substrate, a first semiconductor layer disposed on the substrate, a light-emitting layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the light-emitting layer, and a third electrode fixed on the second semiconductor layer. The first electrode extends through the substrate and electrically connects with the first semiconductor layer, and the third electrode electrically connects with the second electrode via a wire.
    Type: Application
    Filed: November 21, 2011
    Publication date: May 23, 2013
    Applicant: FOXSEMICON INTEGRATED TECHNOLOGY, INC.
    Inventor: KUO-CHENG CHANG
  • Publication number: 20130039664
    Abstract: Tensile strained germanium is provided that can be sufficiently strained to provide a nearly direct band gap material or a direct band gap material. Compressively stressed or tensile stressed stressor materials in contact with germanium regions induce uniaxial or biaxial tensile strain in the germanium regions. Stressor materials may include silicon nitride or silicon germanium. The resulting strained germanium structure can be used to emit or detect photons including, for example, generating photons within a resonant cavity to provide a laser.
    Type: Application
    Filed: August 12, 2011
    Publication date: February 14, 2013
    Inventors: Paul A. Clifton, Andreas Goebel, R. Stockton Gaines
  • Patent number: 8222657
    Abstract: A light emitting apparatus may include a gate metal positioned between a p-type contact and an n-type contact, a gate oxide or other dielectric stack positioned below and attached to the gate metal, a Ge or Si1-zGez channel positioned below and attached to the gate dielectric stack, a buffer, and a silicon substrate positioned below and attached to the buffer. The light emitting apparatus may alternatively include a gate metal positioned between a p-type contact and an n-type contact, a wide bandgap semiconductor positioned below and attached to the gate metal, a Ge or Si1-zGez channel positioned below and attached to the wide bandgap semiconductor, a buffer, and a silicon substrate positioned below and attached to the buffer. Embodiments of the light emitting apparatus may be configured for use in current-injected on-chip lasers, light emitting diodes or other light emitting devices.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: July 17, 2012
    Assignee: The Penn State Research Foundation
    Inventors: Jian Xu, Somasundaram Ashok
  • Publication number: 20120085987
    Abstract: A light emitting device is provided, which includes a light-emitting structure having an active layer and a magnetic material. The active layer includes at least one quantum well structure, and a thickness of at least one of the quantum well structure is greater than or substantially equal to 1.2 nm at room temperature. The magnetic material is coupled with the light-emitting structure to produce a magnetic field perpendicular to a surface of the active layer in the light-emitting structure.
    Type: Application
    Filed: October 12, 2010
    Publication date: April 12, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Rong Xuan, Po-Chun Liu, Ren-Hao Jiang
  • Patent number: 8143650
    Abstract: A semiconductor device 1 includes a substrate 2 having on a main surface thereof a central area and a peripheral area which surrounds the central area and is exposed, a semiconductor layer 4 which is formed on the main surface of the substrate 2, is made of a material harder than the substrate 2, is in the shape of a mesa, and has a steep side over the exposed peripheral area, and an insulating film 12S provided on a side surface of the semiconductor layer 4.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: March 27, 2012
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Ken Sato, Nobuo Kaneko
  • Patent number: 8129733
    Abstract: Gallium nitride devices are formed on a diamond substrate, such as for light emitting diodes as a replacement for incandescent light bulbs and fluorescent light bulbs. In one embodiment, gallium nitride diodes (or other devices) are formed on diamond in at least two methods. A first method comprises growing gallium nitride on diamond and building devices on that gallium nitride layer. The second method involves bonding gallium nitride (device or film) onto diamond and building the device onto the bonded gallium nitride. These devices may provide significantly higher efficiency than incandescent or fluorescent lights, and provide significantly higher light or energy density than other technologies. Similar methods and structures result in other gallium nitride semiconductor devices.
    Type: Grant
    Filed: January 26, 2006
    Date of Patent: March 6, 2012
    Assignee: Apollo Diamond, Inc
    Inventor: Robert C. Linares
  • Patent number: 8110849
    Abstract: A light emitting device is provided. The light emitting device comprises a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer, and an InNO layer. The active layer is disposed on the first conductive semiconductor layer. The second conductive semiconductor layer is disposed on the active layer. The InNO layer is disposed on the second conductive semiconductor layer.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: February 7, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventor: Sang Kyun Shim
  • Publication number: 20110263062
    Abstract: A nanocrystal capable of light emission includes a nanoparticle having photoluminescence having quantum yields of greater than 30%.
    Type: Application
    Filed: June 10, 2011
    Publication date: October 27, 2011
    Applicant: Massachusetts Institute of Technology
    Inventors: Moungi G. Bawendi, Klavs F. Jensen, Bashir O. Dabbousi, Javier Rodriguez-Viejo, Frederic Victor Mikulec
  • Patent number: 8017953
    Abstract: An LED chip is specified that comprises at least one current barrier. The current barrier is suitable for selectively preventing or reducing, by means of a reduced current density, the generation of radiation in a region laterally covered by the electrical connector body. The current spreading layer contains at least one TCO (Transparent Conductive Oxide). In a particularly preferred embodiment, at least one current barrier is contained which comprises material of the epitaxial semiconductor layer sequence, material of the current spreading layer and/or an interface between the semiconductor layer sequence and the current spreading layer. A method for producing an LED chip is also specified.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: September 13, 2011
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Berthold Hahn, Ralph Wirth, Tony Albrecht, Magnus Ahlstedt, Stefan Illek, Klaus Streubel
  • Patent number: 8008652
    Abstract: An object of the present invention is to provide a light emitting element or a light emitting device that can be formed without any regard for a work function of an electrode. Another object of the invention is to provide a light emitting element or a light emitting device in that the range of choice for a material of an electrode can be widened. In an aspect of the invention, a light emitting device includes first, second and third layers between mutually-facing first and second electrodes. The first layer has a donor level. The second layer is a single layer or a laminated body containing a light emitting substance. The third layer has an acceptor level. When a potential of the second electrode is set higher than that of the first electrode, holes generated in the second layer are injected in the third layer.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: August 30, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke Kumaki, Satoshi Seo
  • Patent number: 7973325
    Abstract: Provided are a reflective electrode and a compound semiconductor light emitting device having the reflective electrode, such as LED or LD is provided. The reflective electrode formed on a p-type compound semiconductor layer of a compound semiconductor light emitting device, comprising a first electrode layer formed one of a Ag and Ag-alloy and forms an ohmic contact with the p-type compound semiconductor layer, a third electrode layer formed of a material selected from the group consisting of Ni, Ni-alloy, Zn, Zn-alloy, Cu, Cu-alloy, Ru, Ir, and Rh on the first electrode layer, and a fourth electrode layer formed of a light reflective material on the third electrode layer.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: July 5, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mi-yang Kim, Joon-seop Kwak
  • Patent number: 7935956
    Abstract: A device having an optically active region includes a silicon substrate and a SiGe cladding layer epitaxially grown on the silicon substrate. The SiGe cladding layer includes a plurality of arrays of quantum dots separated by at least one SiGe spacing layer, the quantum dots being formed from a compound semiconductor material.
    Type: Grant
    Filed: November 1, 2007
    Date of Patent: May 3, 2011
    Assignee: The Regents of the University of California
    Inventor: Ya-Hong Xie
  • Patent number: 7910425
    Abstract: A process for forming bipolar junction transistors having a plurality of different collector doping densities on a semiconductor substrate and an integrated circuit comprising bipolar junction transistors having a plurality of different collector doping densities. A first group of the transistors are formed during formation of a triple well for use in providing triple well isolation for complementary metal oxide semiconductor field effect transistors also formed on the semiconductor substrate. Additional bipolar junction transistors with different collector doping densities are formed during a second doping step after forming a gate stack for the field effect transistors. Implant doping through bipolar transistor emitter windows forms bipolar transistors having different doping densities than the previously formed bipolar transistors.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: March 22, 2011
    Assignee: Agere Systems Inc.
    Inventors: Daniel Charles Kerr, Michael Scott Carroll, Amal Ma Hamad, Thiet The Lai, Roger W. Key
  • Patent number: 7888692
    Abstract: Microcavity comprising two reflectors, at least one semiconductor layer separating said reflectors and a semiconductor quantum well wherein at least one of said reflectors and of said at least one semiconductor layer comprises a structure which is adjusted to localize a polariton in said microcavity.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: February 15, 2011
    Assignee: École Polytechnique Fédérale de Lausanne
    Inventors: Benoît Deveaud-Plédran, Cristiano Ciuti, François Morier-Genoud
  • Publication number: 20110031528
    Abstract: A semiconductor light emitting device with which a driving voltage is able to be kept low is provided. The semiconductor light emitting device includes: an n-type cladding layer; an active layer; a p-type cladding layer containing AlGaInP; an intermediate layer; and a contact layer containing GaP in this order, wherein the intermediate layer contains Ga1-aInaP (0.357?a?0.408), and has a thickness of from 10 nm to 20 nm both inclusive.
    Type: Application
    Filed: July 12, 2010
    Publication date: February 10, 2011
    Applicant: Sony Corporation
    Inventors: Tsuyoshi Nagatake, Jugo Mitomo
  • Patent number: 7884381
    Abstract: A light emitting device includes a semiconductor multilayer structure having a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and an active layer. A reflecting layer is provided at a side of one surface of the semiconductor multilayer structure and reflects a light emitted from the active layer. A supporting substrate of Si or Ge is provided at an opposite side of the reflecting layer with respect to the side of the semiconductor multilayer structure and supports the semiconductor multilayer structure via a metal bonding layer. A back surface electrode is provided at an opposite side of the supporting substrate with respect to a side of the metal bonding layer and includes Au alloyed with the support substrate. A hardness of the back surface electrode is higher than a hardness of the Au.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: February 8, 2011
    Assignee: Hitachi Cable, Ltd.
    Inventors: Masahiro Arai, Kazuyuki Iizuka
  • Publication number: 20100213477
    Abstract: A light emitting apparatus may include a gate metal positioned between a p-type contact and an n-type contact, a gate oxide or other dielectric stack positioned below and attached to the gate metal, a Ge or Si1-zGez channel positioned below and attached to the gate dielectric stack, a buffer, and a silicon substrate positioned below and attached to the buffer. The light emitting apparatus may alternatively include a gate metal positioned between a p-type contact and an n-type contact, a wide bandgap semiconductor positioned below and attached to the gate metal, a Ge or Si1-zGez channel positioned below and attached to the wide bandgap semiconductor, a buffer, and a silicon substrate positioned below and attached to the buffer. Embodiments of the light emitting apparatus may be configured for use in current-injected on-chip lasers, light emitting diodes or other light emitting devices.
    Type: Application
    Filed: February 18, 2010
    Publication date: August 26, 2010
    Applicant: The Penn State Research Foundation
    Inventors: Jian Xu, S. Ashok
  • Patent number: 7781796
    Abstract: A nitride semiconductor laser element includes a substrate and a nitride semiconductor layer in which a first semiconductor layer, an active layer, and a second semiconductor layer are laminated in this order on the substrate. At least one of the first semiconductor layer and the second semiconductor layer includes a first section forming recessed and raised portions and a second section embedding the recessed and raised portions of the first section. A region with a higher aluminum mixed crystal ratio than the second section that embeds the recessed and raised portions is disposed on top faces of the raised portions. The nitride semiconductor layer defines resonant planes, and the recessed and raised portions are formed in a shape of stripes that extend substantially parallel to the resonant planes.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: August 24, 2010
    Assignee: Nichia Corporation
    Inventors: Shingo Masui, Kazutaka Tsukayama
  • Publication number: 20100171132
    Abstract: A light-emitting device is provided. The light-emitting device comprises a light-emitting layer having a first quaternary clad layer with a first material having a first composition ratio and a second material having a second composition ratio, a second quaternary clad layer with a third material having a third composition ratio and a fourth material having a fourth composition ratio, and an activation layer contacted with first clad layer and the second clad layer between them; a first electrode electrically contacted with the light-emitting layer; and, a second electrode electrically contacted with the light-emitting layer, wherein the first quaternary clad layer and the second quaternary clad layer have a predetermined energy band gap by controlling the first, second, third and fourth composition ratio, for removing the piezoelectric field and spontaneous polarization applied to the activation layer.
    Type: Application
    Filed: May 22, 2008
    Publication date: July 8, 2010
    Applicant: WOOREELST CO., LTD
    Inventors: Do Yeol Ahn, Seoung Hwan Park
  • Patent number: 7737453
    Abstract: Disclosed is a light emitting diode structure including a Constructive Oxide Contact Structure contact layer. The light emitting diode structure comprises a substrate, a buffer layer formed on the substrate, a lower confinement layer formed on the buffer layer, a light emitting layer formed on the lower confinement layer, an upper confinement layer formed on the light emitting layer, a Constructive Oxide Contact Structure contact layer formed on the upper confinement layer whose conducting type can be P-type, N-type, or I-type, a first electrode, and a second electrode (transparent electrode). The transparent electrode is formed on the Constructive Oxide Contact Structure contact layer as an anode of the light emitting diode. The first electrode is formed on the lower confinement layer and is spaced apart from the light emitting layer, the upper confinement layer, the contact layer, and the transparent electrode. The first electrode is used as a cathode of the light emitting diode.
    Type: Grant
    Filed: May 4, 2007
    Date of Patent: June 15, 2010
    Assignee: Huga Optotech Inc.
    Inventors: Tzong-Liang Tsai, Chi-Shen Lee, Ting-Kai Huang
  • Patent number: 7713811
    Abstract: A process for forming bipolar junction transistors having a plurality of different collector doping densities on a semiconductor substrate and an integrated circuit comprising bipolar junction transistors having a plurality of different collector doping densities. A first group of the transistors are formed during formation of a triple well for use in providing triple well isolation for complementary metal oxide semiconductor field effect transistors also formed on the semiconductor substrate. Additional bipolar junction transistors with different collector doping densities are formed during a second doping step after forming a gate stack for the field effect transistors. Implant doping through bipolar transistor emitter windows forms bipolar transistors having different doping densities than the previously formed bipolar transistors.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: May 11, 2010
    Assignee: Agere Systems Inc.
    Inventors: Daniel Charles Kerr, Michael Scott Carroll, Amal Ma Hamad, Thiet The Lai, Roger W. Key
  • Patent number: 7700936
    Abstract: In one embodiment, a method of producing an optoelectronic nanostructure includes preparing a substrate; providing a quantum well layer on the substrate; etching a volume of the substrate to produce a photonic crystal. The quantum dots are produced at multiple intersections of the quantum well layer within the photonic crystal. Multiple quantum well layers may also be provided so as to form multiple vertically aligned quantum dots. In another embodiment, an optoelectronic nanostructure includes a photonic crystal having a plurality of voids and interconnecting veins; a plurality of quantum dots arranged between the plurality of voids, wherein an electrical connection is provided to one or more of the plurality of quantum dots through an associated interconnecting vein.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: April 20, 2010
    Assignee: University of Delaware
    Inventors: Janusz Murakowski, Garrett Schneider, Dennis W. Prather
  • Patent number: 7683366
    Abstract: Provided are an organic thin film transistor providing smoother movement of holes between a source electrode or a drain electrode and a p-type organic semiconductor layer, and a flat panel display device including the organic thin film transistor. The organic thin film transistor includes a substrate, a gate electrode disposed on the substrate, a p-type organic semiconductor layer insulated from the gate electrode, a source electrode and a drain electrode separated from each other and insulated from the gate electrode, and a hole injection layer interposed between the source and drain electrodes and the p-type organic semiconductor layer.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: March 23, 2010
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventor: Nam-Choul Yang
  • Patent number: 7671383
    Abstract: A semiconductor device, includes: a first conductivity type semiconductor base having a main face; a hetero semiconductor region contacting the main face of the semiconductor base and forming a hetero junction in combination with the semiconductor base, the semiconductor base and the hetero semiconductor region in combination defining a junction end part; a gate insulating film defining a junction face in contact with the semiconductor base and having a thickness; and a gate electrode disposed adjacent to the junction end part via the gate insulating film and defining a shortest point in a position away from the junction end part by a shortest interval, a line extending from the shortest point to a contact point vertically relative to the junction face, forming such a distance between the contact point and the junction end part as to be smaller than the thickness of the gate insulating film contacting the semiconductor base.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: March 2, 2010
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Tetsuya Hayashi, Masakatsu Hoshi, Yoshio Shimoida, Hideaki Tanaka, Shigeharu Yamagami
  • Patent number: 7652282
    Abstract: A main semiconductor region of semiconducting nitrides is formed on a silicon substrate via a buffer region of semiconducting nitrides to provide devices such as HEMTs, MESFETs and LEDs. In order to render the wafer proof against warping, the buffer region is divided into a first and a second multilayered buffer subregion. The first buffer subregion comprises multiple alterations of a multi-sublayered first buffer layer and a non-sublayered second buffer layer. Each multi-sublayered first buffer layer of the first buffer subregion comprises multiple alternations of a first and a second buffer sublayer. The second buffer sublayers of each multi-sublayered first buffer layer either do not contain aluminum or do contain it in a higher proportion than do the first buffer sublayers. The second multilayered buffer subregion comprises multiple alternations of a first and a second buffer layer.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: January 26, 2010
    Assignee: Sanken Electric Co., Ltd.
    Inventor: Masataka Yanagihara
  • Patent number: 7626209
    Abstract: Disclosed is a light emitting diode having an active region of a multi quantum well structure. The active region is positioned between GaN-based N-type and P-type compound semiconductor layers. At least one of barrier layers in the active region includes an undoped InGaN layer and a Si-doped GaN layer, and the Si-doped GaN layer is in contact with a well layer positioned at a side of the P-type compound semiconductor layer therefrom. Accordingly, carrier overflow and a quantum confined stark effect can be reduced, thereby improving an electron-hole recombination rate. Further, disclosed is an active region of a multi quantum well structure including relatively thick barrier layers and relatively thin barrier layers.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: December 1, 2009
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Dong Seon Lee, Eu Jin Hwang
  • Patent number: 7582891
    Abstract: Semiconductor structures having at least one quantum well heterostructure grown strain-free on Si(100) via a Sn1-xGex buffer layer and their uses are provided.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: September 1, 2009
    Inventors: John Kouvetakis, Jose Menendez, John Tolle, Ling Liao, Dean Samara-Rubio
  • Patent number: 7470934
    Abstract: In a radiation-emitting optoelectronic semiconductor chip comprising an active layer (3) at least one p-doped layer (9) and a layer sequence (8) comprising a plurality of undoped layers (4, 5, 6, 7), which is arranged between the active layer (3) and the p-doped layer (9) and contains at least a first undoped layer (5) and a second undoped layer (6), the second undoped layer adjoining the first undoped layer (5) and succeeding the first undoped layer (5) as seen from the active layer (3), the first undoped layer (5) and the second undoped layer (6) in each case contain aluminum, the aluminum proportion being greater in the first undoped layer (5) than in the second undoped layer (6). The layer sequence (8) advantageously acts as a diffusion barrier for the dopant of the p-doped layer.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: December 30, 2008
    Assignee: Osram Opto Semiconductors GmbH
    Inventor: Norbert Linder
  • Publication number: 20080296594
    Abstract: Nitride optoelectronic devices that have asymmetric double-sided structures and methods fabricating such structures are disclosed. Two n-type III-N layers are formed simultaneously over opposite sides of a substrate with substantially the same composition. Thereafter, a p-type III-N active layer is formed over one of the n-type III-N layers but not over the other.
    Type: Application
    Filed: July 15, 2008
    Publication date: December 4, 2008
    Applicant: Applied Materials, Inc.
    Inventors: David Bour, Jacob Smith, Jie Su, Sandeep Nijhawan
  • Patent number: 7449727
    Abstract: An LED incorporating an overvoltage protector with a minimum of space requirement. The LED itself comprises a p-type semiconductor substrate, a light-generating semiconductor region grown epitaxially thereon, a first electrode on the light-generating semiconductor region, and a second electrode on the underside of the substrate. The standard method of LED fabrication is such that the substrate is notionally divisible into a main portion in register with the overlying light-generating semiconductor region and, surrounding the main portion, a tubular marginal portion needed for dicing the wafer into individual squares or dice. The overvoltage protector comprises an n-type semiconductor film formed on the marginal portion of the substrate and held against the side surfaces of the light-generating semiconductor region via an insulating film.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: November 11, 2008
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Junji Sato, Mikio Tazima, Tetsuji Moku, Arei Niwa, Yasuhiro Kamii
  • Publication number: 20080272391
    Abstract: Various methods and devices are implemented using efficient silicon compatible integrated light communicators. According to one embodiment of the present invention, a semiconductor device is implemented for communicating light, such as by detecting, modulating or emitting light. The device has a silicon-seeding location, an insulator layer and a second layer on the insulator layer. The second layer includes a silicon-on-insulator region and an active region surrounded by the silicon-on-insulator region and connected to the silicon-seeding location. The active region includes a single-crystalline germanium-based material that extends from the silicon-seeding location through a passageway with a cross-sectional area that is sufficiently small to mitigate crystalline growth defects.
    Type: Application
    Filed: March 28, 2008
    Publication date: November 6, 2008
    Inventors: Pawan Kapur, Michael West Wiemer
  • Publication number: 20070290230
    Abstract: A nitride semiconductor device according to the present invention includes a p-type nitride semiconductor layer, an n-type nitride semiconductor layer, and an active layer interposed between the p-type nitride semiconductor layer and the n-type nitride semiconductor layer. The p-type nitride semiconductor layer includes: a first p-type nitride semiconductor layer containing Al and Mg; and a second p-type nitride semiconductor layer containing Mg. The first p-type nitride semiconductor layer is located between the active layer and the second p-type nitride semiconductor layer, and the second p-type nitride semiconductor layer has a greater band gap than a band gap of the first p-type nitride semiconductor layer.
    Type: Application
    Filed: September 24, 2004
    Publication date: December 20, 2007
    Inventors: Yasutoshi Kawaguchi, Toshitaka Shimamoto, Akihiko Ishibashi, Isao Kidoguchi, Toshiya Yokogawa
  • Publication number: 20070263690
    Abstract: An electronic or optoelectronic device fabricated from a crystalline material in which a parameter of a bandgap characteristic of said crystalline material has been modified locally by introducing distortions on an atomic scale in the lattice structure of said crystalline material and the electronic and/or optoelectronic parameters of said device are dependent on the modification of said bandgap is exemplified by a radiation emissive optoelectronic semiconductor device which comprises a junction (10) formed from a p-type layer (11) and an n-type layer (12), both formed from indirect bandgap semiconductor material. The p-type layer (11) contains a array of dislocation loops which create a strain field to confine spatially and promote radiative recombination of the charge carriers.
    Type: Application
    Filed: June 29, 2007
    Publication date: November 15, 2007
    Applicant: University of Surrey
    Inventors: Kevin Homewood, Russell Gwilliam, Guosheng Shao