Comprising Only Group Iv Compound (e.g., Sic) (epo) Patents (Class 257/E33.035)
  • Patent number: 11799051
    Abstract: A nitride semiconductor light-emitting element includes a light-emitting layer comprising a well layer comprising AlGaN and emitting ultraviolet light; an electron blocking layer being located on the light-emitting layer and comprising AlGaN with a first Al composition ratio higher than an Al composition ratio of the well layer; and a p-type cladding layer being located on the electron blocking layer, comprising AlGaN with a second Al composition ratio higher than the Al composition ratio of the well layer and lower than the first Al composition ratio, and being doped with a predetermined concentration of a p-type dopant. An interface between the electron blocking layer and the p-type cladding layer is doped with not less than a predetermined amount of an n-type dopant.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: October 24, 2023
    Assignee: Nikkiso Co., Ltd.
    Inventors: Yusuke Matsukura, Tetsuhiko Inazu, Cyril Pernot
  • Patent number: 8785952
    Abstract: A light emitting device is disclosed. The light emitting device includes a first electrode and a second electrode, which have different areas, thereby achieving enhanced bonding reliability.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: July 22, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Dongwook Park
  • Patent number: 8748923
    Abstract: A material such as a phosphor is optically coupled to a semiconductor structure including a light emitting region disposed between an n-type region and a p-type region, in order to efficiently extract light from the light emitting region into the phosphor. The phosphor may be phosphor grains in direct contact with a surface of the semiconductor structure, or a ceramic phosphor bonded to the semiconductor structure, or to a thin nucleation structure on which the semiconductor structure may be grown. The phosphor is preferably highly absorbent and highly efficient. When the semiconductor structure emits light into such a highly efficient, highly absorbent phosphor, the phosphor may efficiently extract light from the structure, reducing the optical losses present in prior art devices.
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: June 10, 2014
    Assignee: Philips Lumileds Lighting Company LLC
    Inventors: Michael R. Krames, Gerd O. Mueller
  • Patent number: 8698271
    Abstract: Provided is a germanium photodetector having a germanium epitaxial layer formed without using a buffer layer and a method of fabricating the same. In the method, an amorphous germanium layer is formed on a substrate. The amorphous germanium layer is heated up to a high temperature to form a crystallized germanium layer. A germanium epitaxial layer is formed on the crystallized germanium layer.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: April 15, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Dongwoo Suh, Sang Hoon Kim, Gyungock Kim, JiHo Joo
  • Patent number: 8680537
    Abstract: According to one embodiment, a nitride semiconductor element includes a foundation layer, a functional layer and a stacked body. The stacked body is provided between the foundation layer and the functional layer. The stacked body includes a first stacked intermediate layer including a first GaN intermediate layer, a first high Al composition layer of Alx1Ga1-x1N (0<x1?1) and a first low Al composition layer. A compressive strain is applied to the first low Al composition layer. Unstrained GaN has a first lattice spacing. The Alx1Ga1-x1N (0<x1?1) when unstrained has a second lattice spacing. The first high Al composition layer has a third lattice spacing. An Al composition ratio of the first low Al composition layer is not more than a ratio of a difference between the first and third lattice spacings to a difference between the first and second lattice spacings.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: March 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiki Hikosaka, Yoshiyuki Harada, Hisashi Yoshida, Naoharu Sugiyama, Shinya Nunoue
  • Publication number: 20130092955
    Abstract: A light-emitting diode (LED) and fabricating method thereof. The method includes: providing a first substrate and forming an epitaxial portion on the first substrate; forming at least one reflection layer on the epitaxial portion; forming a metal barrier portion on the reflection layer; etching the epitaxial portion and the barrier portion by a first etching process, so as to form a plurality of epitaxial layers and a plurality of metal barrier layers, an etch channel is formed between adjacent epitaxial layers, and each metal barrier layer enwraps a corresponding reflection layer and covers all of a surface of a corresponding epitaxial layer; forming a first bonding layer on the metal barrier layer; and forming a second substrate on the first bonding layer and removing the first substrate.
    Type: Application
    Filed: February 23, 2012
    Publication date: April 18, 2013
    Applicant: CHI MEI LIGHTING TECHNOLOGY CORP.
    Inventors: Shin-Jia Chiou, Chung Hsin Lin, Chi-Lung Wu, Jui-Chun Chang
  • Publication number: 20130082237
    Abstract: Light emitting devices having an enhanced degree of polarization, PD, and methods for fabricating such devices are described. A light emitting device may include a light emitting region that is configured to emit light having a central wavelength, ?, and a degree of polarization, PD, where PD>0.006??b for 200 nm???400 nm, wherein b?1.5.
    Type: Application
    Filed: December 16, 2011
    Publication date: April 4, 2013
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: John E. Northrup, Christopher L. Chua, Michael Kneissl, Thomas Wunderer, Noble M. Johnson
  • Publication number: 20130037801
    Abstract: A light emitting diode (LED) chip including: a substrate; and a light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer, sequentially deposited on the substrate, in which when a length of the substrate is L and a width of the substrate is W, L/W>10.
    Type: Application
    Filed: October 17, 2012
    Publication date: February 14, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: SAMSUNG ELECTRONICS CO., LTD.
  • Patent number: 8367510
    Abstract: In a bipolar silicon carbide semiconductor device in which an electron and a hole recombine with each other during current passage within a silicon carbide epitaxial film grown from a surface of a silicon carbide single crystal substrate, an object described herein is the reduction of defects which are the nuclei of a stacking fault which is expanded by current passage, thereby suppressing the increase of the forward voltage of the bipolar silicon carbide semiconductor device. In a method for producing a bipolar silicon carbide semiconductor device, the device is subjected to a thermal treatment at a temperature of 300° C. or higher in the final step of production. Preferably, the above-mentioned thermal treatment is carried out after the formation of electrodes and then the resulting bipolar silicon carbide semiconductor device is mounted in a package.
    Type: Grant
    Filed: September 1, 2006
    Date of Patent: February 5, 2013
    Assignee: Central Research Institute of Electric Power Industry
    Inventors: Toshiyuki Miyanagi, Hidekazu Tsuchida, Isaho Kamata, Masahiro Nagano, Yoshitaka Sugawara, Koji Nakayama, Ryosuke Ishii
  • Publication number: 20130009152
    Abstract: The invention relates to light-emitting devices (200); in particular, to high effective light-emitting diodes on the base of nitrides of III group elements of the periodic system. The proposed light-emitting device comprises a substrate, a buffer layer (120) formed on the substrate, a first layer (130) from n-type semiconductor formed on the buffer layer, a second layer (150) from p-type semiconductor and an active layer (240) arranged between the first and second layers. The first, the second and the active layers form interlacing of the layers with zinc blende phase structure and layers with wurtzite phase structure forming heterophase boundaries therebetween.
    Type: Application
    Filed: March 15, 2011
    Publication date: January 10, 2013
    Inventors: Yuri Georgievich Shreter, Yuri Toomasovich Rebane, Aleksey Vladimirovich Mironov
  • Publication number: 20120327326
    Abstract: A field emission panel includes a cathode electrode which is formed on a substrate, a multilayered carbon nano tube which is formed on the cathode electrode, and a gate electrode which is positioned at a distance from the multilayered carbon nano tube. The multilayered carbon nano tube has a minimum thermal decomposition temperature higher than a temperature of a heating process which is performed when the field emission panel is manufactured, and has three peaks of Raman scattered light in a Raman intensity distribution characteristic.
    Type: Application
    Filed: December 23, 2011
    Publication date: December 27, 2012
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kwang-jong SUH, Jae-sang HA
  • Publication number: 20120292640
    Abstract: A solid state energy conversion device and method of making is disclosed for converting energy between electromagnetic and electrical energy. The solid state energy conversion device comprises a wide bandgap semiconductor material having a first doped region. A thermal energy beam is directed onto the first doped region of the wide bandgap semiconductor material in the presence of a doping gas for converting a portion of the first doped region into a second doped region in the wide bandgap semiconductor material. In one embodiment, the solid state energy conversion device operates as a light emitting device. In another embodiment, the solid state energy conversion device operates as a photovoltaic device.
    Type: Application
    Filed: February 10, 2012
    Publication date: November 22, 2012
    Inventors: Nathaniel R. Quick, Aravinda Kar
  • Patent number: 8304784
    Abstract: An illumination device having a plurality of light emitting diodes is provided. The light emitting diode may include a plurality of semiconductor layers at least one of which has a light emitting surface which may include a rough surface pattern having a pre-determined pattern. The pre-determined pattern may include one or more impurity regions with each region having a recess for guiding current across the light emitting surface and maximizing the emission of light (i.e. light intensity) of the illumination device. Each recess may include a lower internal portion having a bottom contact point located on a bottom surface and an upper internal portion integrally connected to the lower internal portion by a plurality of center contact points. The gaps created between the center and bottom contact points in adjacent recesses may act as spark gaps allowing for the current to flow through the entire light emitting surface.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: November 6, 2012
    Inventor: Andrew Locke
  • Patent number: 8299488
    Abstract: The present invention provides a LED chip structure. The LED chip structure comprises a substrate and an N type layer disposed on the substrate; a P type layer disposed on the N type layer; a N type contact pad and a P type contact pad disposed below the substrate; conductive through holes disposed through the substrate to electrically connect the N type layer to the N type contact pad and the P type layer to the conduct heat generated by the P type layer and the N type layer downward.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: October 30, 2012
    Assignee: King Dragon International Inc.
    Inventor: Wen-Kun Yang
  • Publication number: 20120223334
    Abstract: LED devices and methods for making such devices are provided. One such method may include forming epitaxially a substantially single crystal SiC layer on a substantially single crystal Si wafer, forming epitaxially a substantially single crystal diamond layer on the SiC layer, doping the diamond layer to form a conductive diamond layer, removing the Si wafer to expose the SiC layer opposite to the conductive diamond layer, forming epitaxially a plurality of semiconductor layers on the SiC layer such that at least one of the semiconductive layers contacts the SiC layer, and coupling an n-type electrode to at least one of the semiconductor layers such that the plurality of semiconductor layers is functionally located between the conductive diamond layer and the n-type electrode.
    Type: Application
    Filed: August 29, 2011
    Publication date: September 6, 2012
    Inventor: Chien-Min Sung
  • Patent number: 8222674
    Abstract: Provided is a semiconductor device containing a silicon single crystal substrate 101, a silicon carbide layer 102 provided on a surface of the substrate, a Group III nitride semiconductor junction layer 103 provided in contact with the silicon carbide layer, and a superlattice-structured layer 104 constituted by Group III nitride semiconductors on the Group III nitride semiconductor junction layer. In this semiconductor device, the silicon carbide layer is a layer of a cubic system whose lattice constant exceeds 0.436 nm and is not more than 0.460 nm and which has a nonstoichiometric composition containing silicon abundantly in terms of composition, and the Group III nitride semiconductor junction layer has a composition of AlxGaYInzN1-?M? (0?X, Y, Z?1, X+Y+Z=1, 0??<1, M is a Group V element except nitrogen).
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: July 17, 2012
    Assignees: Showa Denko K.K., The Doshisha
    Inventors: Tadashi Ohachi, Takashi Udagawa
  • Publication number: 20120161092
    Abstract: The invention provides a phase change memory and a method for forming the phase change memory. The phase change memory includes a storage region and a peripheral circuit region. The peripheral circuit region has a peripheral substrate, a plurality of peripheral shallow trench isolation (STI) units in the peripheral substrate, and at least one MOS transistor on the peripheral substrate and between the peripheral STI units. The storage region has a storage substrate, an N-type ion buried layer on the storage substrate, a plurality of vertical LEDs on the N-type ion buried layer, a plurality of storage shallow trench isolation (STI) units between the vertical LEDs, and a plurality of phase change layers on the vertical LED and between the storage STI units. The storage STI units have thickness substantially equal to thickness of the vertical LEDs. The peripheral STI units have thickness substantially equal to thickness of the storage STI units. The N-type conductive region contains SiC.
    Type: Application
    Filed: July 5, 2011
    Publication date: June 28, 2012
    Applicant: Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Fumitake Mieno, Youfeng He
  • Publication number: 20120153299
    Abstract: The present invention provides a LED chip structure. The LED chip structure comprises a substrate and an N type layer disposed on the substrate; a P type layer disposed on the N type layer; a N type contact pad and a P type contact pad disposed below the substrate; conductive through holes disposed through the substrate to electrically connect the N type layer to the N type contact pad and the P type layer to the conduct heat generated by the P type layer and the N type layer downward.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 21, 2012
    Inventor: WEN KUN YANG
  • Publication number: 20120138957
    Abstract: Embodiments disclose a light emitting device including a substrate, a buffer layer disposed on an R-plane of the substrate, the buffer layer having a rock salt structured nitride, and a light emitting structure arranged on the buffer layer, the light emitting structure being grown in an a-plane.
    Type: Application
    Filed: January 31, 2012
    Publication date: June 7, 2012
    Inventor: Heejae SHIM
  • Publication number: 20110284875
    Abstract: A high efficiency Group III nitride light emitting diode is disclosed. The diode includes a substrate selected from the group consisting of semiconducting and conducting materials, a Group III nitride-based light emitting region on or above the substrate, and, a lenticular surface containing silicon carbide on or above the light emitting region, and extending to said light emitting region.
    Type: Application
    Filed: July 21, 2011
    Publication date: November 24, 2011
    Inventors: John Adam Edmond, David Beardsley Slater, JR., Jayesh Bharathan, Matthew Donofrio
  • Publication number: 20110227116
    Abstract: An object of the present invention is to provide a germanium laser diode that can be easily formed on a substrate such as silicon by using a normal silicon process and can emit light efficiently. A germanium light-emitting device according to the present invention is a germanium laser diode characterized in that tensile strain is applied to single-crystal germanium serving as a light-emitting layer to be of a direct transition type, a thin semiconductor layer made of silicon, germanium or silicon-germanium is connected adjacently to both ends of the germanium light-emitting layer, the thin semiconductor layer has a certain degree of thickness capable of preventing the occurrence of quantum confinement effect, another end of the thin semiconductor layer is connected to a thick electrode doped with impurities at a high concentration, the electrode is doped to a p type and an n type, a waveguide is formed so as not to be in direct contact with the electrode, and a mirror is formed at an end of the waveguide.
    Type: Application
    Filed: October 21, 2009
    Publication date: September 22, 2011
    Applicant: HITACHI, LTD.
    Inventors: Shinichi Saito, Masahiro Aoki, Nobuyuki Sugii, Katsuya Oda, Toshiki Sugawa
  • Patent number: 7989926
    Abstract: A semiconductor device includes a substrate formed of a single crystal. a silicon carbide layer disposed on a surface of the single crystal substrate and an intermediate layer disposed on a surface of the silicon carbide layer and formed of a Group III nitride semiconductor, wherein the silicon carbide layer is formed of a cubic crystal stoichiometrically containing silicon copiously and the surface thereof has a (3×3) reconstruction structure.
    Type: Grant
    Filed: September 12, 2006
    Date of Patent: August 2, 2011
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Publication number: 20110156056
    Abstract: A material such as a phosphor is optically coupled to a semiconductor structure including a light emitting region disposed between an n-type region and a p-type region, in order to efficiently extract light from the light emitting region into the phosphor. The phosphor may be phosphor grains in direct contact with a surface of the semiconductor structure, or a ceramic phosphor bonded to the semiconductor structure, or to a thin nucleation structure on which the semiconductor structure may be grown. The phosphor is preferably highly absorbent and highly efficient. When the semiconductor structure emits light into such a highly efficient, highly absorbent phosphor, the phosphor may efficiently extract light from the structure, reducing the optical losses present in prior art devices.
    Type: Application
    Filed: March 11, 2011
    Publication date: June 30, 2011
    Applicant: PHILIPS LUMILEDS LIGHTING COMPANY LLC
    Inventors: Michael R. Krames, Gerd O. Mueller
  • Publication number: 20110133243
    Abstract: Disclosed are a light emitting device and a method of manufacturing the same. The light emitting device includes a growth substrate, a first conductive semiconductor layer on the growth substrate, an active layer on the first conductive semiconductor layer, a second conductive semiconductor layer on the active layer, and an ohmic contact layer having a concavo-convex structure on the second conductive semiconductor layer.
    Type: Application
    Filed: May 4, 2009
    Publication date: June 9, 2011
    Inventor: June O Song
  • Publication number: 20110079795
    Abstract: A semiconductor light emitting device (10) is provided with a base substrate (12) and three LED chips (14A, 14B, and 14C) disposed on the base substrate (12). Each LED chip (14A, 14B, and 14C) includes a semiconductor multilayer structure (20) and has a rhombus shape with interior angles of approximately 60° and approximately 120° in plan view. Each semiconductor multilayer structure (20) has an HCP single crystal structure and includes a light emission layer (24). The LED chips (14A, 14B, and 14C) are arranged on the base substrate (12) so as to face one another at a vertex forming the larger interior angle in plan view. With this arrangement, the LED chips (14A, 14B, and 14C) as a whole form a substantially regular hexagonal shape.
    Type: Application
    Filed: December 14, 2010
    Publication date: April 7, 2011
    Applicant: Panasonic Corporation
    Inventor: Hideo Nagai
  • Publication number: 20100276702
    Abstract: LED devices and methods for making such devices are provided. One such method may include forming epitaxially a substantially single crystal SiC layer on a substantially single crystal Si wafer, forming epitaxially a substantially single crystal diamond layer on the SiC layer, doping the diamond layer to form a conductive diamond layer, removing the Si wafer to expose the SiC layer opposite to the conductive diamond layer, forming epitaxially a plurality of semiconductor layers on the SiC layer such that at least one of the semiconductive layers contacts the SiC layer, and coupling an n-type electrode to at least one of the semiconductor layers such that the plurality of semiconductor layers is functionally located between the conductive diamond layer and the n-type electrode.
    Type: Application
    Filed: May 3, 2010
    Publication date: November 4, 2010
    Inventor: Chien-Min Sung
  • Patent number: 7811943
    Abstract: A process is described for producing silicon carbide crystals having increased minority carrier lifetimes. The process includes the steps of heating and slowly cooling a silicon carbide crystal having a first concentration of minority carrier recombination centers such that the resultant concentration of minority carrier recombination centers is lower than the first concentration.
    Type: Grant
    Filed: February 7, 2005
    Date of Patent: October 12, 2010
    Assignee: Cree, Inc.
    Inventors: Calvin H. Carter, Jr., Jason R. Jenny, David P. Malta, Hudson M. Hobgood, Valeri F. Tsvetkov, Mrinal K. Das
  • Publication number: 20100244052
    Abstract: A light emitting diode is disclosed that includes a silicon carbide substrate and a light emitting structure formed from the Group III nitride material system on the substrate. The diode has an area greater than 100,000 square microns and has a radiant flux at 20 milliamps current of at least 29 milliwatts at its dominant wavelength between 390 and 540 nanometers.
    Type: Application
    Filed: June 8, 2010
    Publication date: September 30, 2010
    Inventors: John Adam Edmond, Michael J. Bergmann, David T. Emerson, Kevin Ward Haberern
  • Publication number: 20100219418
    Abstract: LED devices incorporating diamond materials and methods for making such devices are provided. One such method may include forming epitaxially a substantially single crystal SiC layer on a substantially single crystal Si wafer, forming epitaxially a substantially single crystal diamond layer on the SiC layer, doping the diamond layer to form a conductive diamond layer, removing the Si wafer to expose the SiC layer opposite to the conductive diamond layer, forming epitaxially a plurality of semiconductor layers on the SiC layer such that at least one of the semiconductive layers contacts the SiC layer, and coupling an n-type electrode to at least one of the semiconductor layers such that the plurality of semiconductor layers is functionally located between the conductive diamond layer and the n-type electrode.
    Type: Application
    Filed: April 6, 2010
    Publication date: September 2, 2010
    Inventor: Chien-Min Sung
  • Publication number: 20100213469
    Abstract: An illumination device having a plurality of light emitting diodes is provided. The light emitting diode may include a plurality of semiconductor layers at least one of which has a light emitting surface which may include a rough surface pattern having a pre-determined pattern. The pre-determined pattern may include one or more impurity regions with each region having a recess for guiding current across the light emitting surface and maximizing the emission of light (i.e. light intensity) of the illumination device. Each recess may include a lower internal portion having a bottom contact point located on a bottom surface and an upper internal portion integrally connected to the lower internal portion by a plurality of center contact points. The gaps created between the center and bottom contact points in adjacent recesses may act as spark gaps allowing for the current to flow through the entire light emitting surface.
    Type: Application
    Filed: December 23, 2009
    Publication date: August 26, 2010
    Inventor: Andrew Locke
  • Patent number: 7750364
    Abstract: A light-emitting device includes an active region, an n-type region, a p-type region, an n-electrode and a p-electrode. The active region is formed from a semiconductor material. The semiconductor material has a tetrahedral structure and includes an impurity. The impurity creates at least two energy levels connected with the allowed transition within a band gap of the semiconductor material. The n-type and p-type regions in contact with the active region are disposed between the n-type and p-type regions. An excitation element is configured to inject an electron from the n-type region and inject a hole from the p-type region so as to generate an electron-hole pair in the active region. The active region has a thickness no less than an atomic distance of the semiconductor and no more than 5 nm.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: July 6, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazushige Yamamoto, Tatsuo Shimizu
  • Publication number: 20100102412
    Abstract: Provided is a germanium photodetector having a germanium epitaxial layer formed without using a buffer layer and a method of fabricating the same. In the method, an amorphous germanium layer is formed on a substrate. The amorphous germanium layer is heated up to a high temperature to form a crystallized germanium layer. A germanium epitaxial layer is formed on the crystallized germanium layer.
    Type: Application
    Filed: March 13, 2009
    Publication date: April 29, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Dongwoo SUH, Sam Hoon KIM, Gyungock KIM, JiHo JOO
  • Patent number: 7646025
    Abstract: LED devices incorporating diamond materials and methods for making such devices are provided. One such method may include forming epitaxially a substantially single crystal SiC layer on a substantially single crystal Si wafer, forming epitaxially a substantially single crystal diamond layer on the SiC layer, doping the diamond layer to form a conductive diamond layer, removing the Si wafer to expose the SiC layer opposite to the conductive diamond layer, forming epitaxially a plurality of semiconductor layers on the SiC layer such that at least one of the semiconductive layers contacts the SiC layer, and coupling an n-type electrode to at least one of the semiconductor layers such that the plurality of semiconductor layers is functionally located between the conductive diamond layer and the n-type electrode.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: January 12, 2010
    Inventor: Chien-Min Sung
  • Patent number: 7592618
    Abstract: The nanoparticle electroluminescence device includes: a front electrode formed of a transparent conductive material; a rear electrode formed of a conductive material; and an emitting layer interposed between the front electrode and the rear electrode and comprising a plurality of nanoparticles having a core/shell structure comprising a core formed of silicon and a shell formed of silicon oxide or silicon nitride on the surface of the core.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: September 22, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon-ho Khang, Eun-hyu Lee, Kyo-yeol Lee, Joo-hyun Lee, Seong-il Im
  • Patent number: 7531840
    Abstract: An electronic device includes a conductive n-type substrate, a Group III nitride active region, an n-type Group III-nitride layer in vertical relationship to the substrate and the active layer, at least one p-type layer, and means for providing a non-rectifying conductive path between the p-type layer and the n-type layer or the substrate. The non-rectifying conduction means may include a degenerate junction structure or a patterned metal layer.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: May 12, 2009
    Assignee: Cree, Inc.
    Inventors: John A. Edmond, Kathleen M. Doverspike, Michael J. Bergmann, Hua-Shuang Kong
  • Publication number: 20090057689
    Abstract: A light-emitting device includes an active region, an n-type region, a p-type region, an n-electrode and a p-electrode. The active region is formed from a semiconductor material. The semiconductor material has a tetrahedral structure and includes an impurity. The impurity creates at least two energy levels connected with the allowed transition within a band gap of the semiconductor material. The n-type and p-type regions in contact with the active region are disposed between the n-type and p-type regions. An excitation element is configured to inject an electron from the n-type region and inject a hole from the p-type region so as to generate an electron-hole pair in the active region. The active region has a thickness no less than an atomic distance of the semiconductor and no more than 5 nm.
    Type: Application
    Filed: August 27, 2008
    Publication date: March 5, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazushige YAMAMOTO, Tatsuo Shimizu
  • Patent number: 7304334
    Abstract: Bipolar junction transistors (BJTs) are provided including silicon carbide (SiC) substrates. An epitaxial SiC base region is provided on the SiC substrate. The epitaxial SiC base region has a first conductivity type. An epitaxial SiC emitter region is also provided on the SiC substrate. The epitaxial SiC emitter region has a second conductivity type, different from the first conductivity type. The epitaxial SiC emitter region has first and second portions. The first portion is provided on the SiC substrate and the second portion is provided on the first portion. The second portion has a higher carrier concentration than the first portion. Related methods of fabricating BJTs are also provided herein.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: December 4, 2007
    Assignee: Cree, Inc.
    Inventors: Anant K. Agarwal, Sumithra Krishnaswami, Sei-Hyung Ryu, Edward Harold Hurt
  • Publication number: 20070238258
    Abstract: Bipolar transistors and methods of forming the bipolar transistors. The method including forming a P-type collector in a silicon substrate; forming an intrinsic base on the collector, the intrinsic base including a first N-type dopant species, germanium and carbon; forming an N-type extrinsic base over a first region and a second region of the intrinsic base, the first region over the collector and the second region over a dielectric adjacent to the collector, the N-type extrinsic base containing or not containing carbon; and forming a P-type emitter on the first region of the intrinsic base.
    Type: Application
    Filed: March 30, 2006
    Publication date: October 11, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas Adam, Rajendran Krishnasamy
  • Publication number: 20070200114
    Abstract: A compound semiconductor device includes hexagonal silicon carbide crystal substrate and a boron-phosphide-based semiconductor layer formed on the silicon carbide crystal substrate, wherein the silicon carbide crystal substrate has a surface assuming a {0001} crystal plane, and the boron-phosphide-based semiconductor layer is composed of a {111} crystal stacked on and in parallel with the {0001} crystal plane of the silicon carbide crystal substrate, and when the number of the layers contained in one periodical unit of an atomic arrangement in the [0001] crystal orientation of the silicon carbide crystal substrate is n, an n-layer-stacked structure included in the {111} crystal plane forming the {111} crystal has a stacking height virtually equal to the c-axis lattice constant of the silicon carbide crystal substrate.
    Type: Application
    Filed: March 28, 2005
    Publication date: August 30, 2007
    Inventor: Takashi Udagawa