Electrical Contact Or Lead (e.g., Lead Frame) (epo) Patents (Class 257/E33.066)
  • Patent number: 8901586
    Abstract: Disclosed are a light emitting device and a method of manufacturing the same. The light emitting device includes a substrate; a light emitting structure disposed on the substrate and having a stack structure in which a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer are stacked; a lens disposed on the light emitting structure; and a first terminal portion and a second terminal portion electrically connected to the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, respectively. At least one of the first and second terminal portions extends from a top surface of the light emitting structure along respective side surfaces of the light emitting structure and the substrate.
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: December 2, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hak Hwan Kim, Ho Sun Paek, Hyung Kun Kim, Sung Kyong Oh, Jong In Yang
  • Patent number: 8896106
    Abstract: In accordance with an embodiment of the present invention, a semiconductor package includes a first lead frame having a first die paddle, and a second lead frame, which has a second die paddle and a plurality of leads. The second die paddle is disposed over the first die paddle. A semiconductor chip is disposed over the second die paddle. The semiconductor chip has a plurality of contact regions on a first side facing the second lead frame. The plurality of contact regions is coupled to the plurality of leads.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: November 25, 2014
    Assignee: Infineon Technologies AG
    Inventors: Ralf Otremba, Josef Hoeglauer, Juergen Schredl, Xaver Schloegel, Klaus Schiess
  • Patent number: 8890176
    Abstract: Disclosed is an LED package. The LED package includes a package body, a first frame and a second frame on the package body and a light emitting device chip on the first frame. The first frame is separated from the second frame, and the first frame includes a bottom frame on the package body and at least two sidewall frames extending from the bottom frame and inclined with respect to the bottom frame.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: November 18, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Sung Min Kong, Choong Youl Kim, Hee Seok Choi
  • Patent number: 8888381
    Abstract: An optical module base is made up of a plurality of lead frames and a resin structure integrally molded with the lead frames and has an optical device mounting part and an optical waveguide mounting part which are formed in the resin structure. Each of the lead frames includes a connection part to which an optical device is to be mounted and electrically connected and a lead part which is continuous with the connection part. A portion of the thickness of the connection part is embedded in the resin structure and is positioned at the optical device mounting part. A sufficient strength of fixing a lead frame on a resin structure integrally molded with the lead frame can be ensured even if the sizes of the lead frames are miniaturized according to the sizes of electrodes of an optical device to be flip-chip bonded.
    Type: Grant
    Filed: April 6, 2013
    Date of Patent: November 18, 2014
    Assignee: Japan Aviation Electronics Industry, Limited
    Inventor: Osamu Hashiguchi
  • Patent number: 8890203
    Abstract: A lead 1 includes a die-bonding portion 11 with an opening 11a penetrating in a thickness direction. Another lead 2 is spaced from the lead 1. An LED unit 3 includes an LED chip 30 with a electrode terminal 31 connected to the lead 1 and another electrode terminal 32 connected to the lead 2. The LED unit 3, mounted on a surface of the die-bonding portion 11 on a first side in z direction, overlaps the opening 11a. A wire 52 connects the lead 2 and the electrode terminal 32. A support member 4 supporting the leads 1-2 is held in contact with another surface of the die-bonding portion 11 on a second side in z direction. These arrangements ensure efficient heat dissipation from the LED chip 30 and efficient use of light emitted from the LED chip 3.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: November 18, 2014
    Assignee: Rohm Co., Ltd.
    Inventor: Masahiko Kobayakawa
  • Patent number: 8883530
    Abstract: A device manufacturing method including substrate preparation, pixel electrode formation, photosensitive film formation, first part exposure, second part exposure, and development. In first part exposure, after execution of photosensitive film formation, first photomask is arranged to face substrate and exposure is performed to cause first part of photosensitive film to be exposed to light via first photomask. In second part exposure, after or together with execution of first part exposure, second photomask is arranged to face substrate and exposure is performed to cause second part of photosensitive film, which is different from first part at least partially, to be exposed to light via second photomask. In second part exposure, second photomask is arranged such that end thereof overlaps with end of first photomask, and overlap between first and second photomasks positionally corresponds to electrical wire.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: November 11, 2014
    Assignee: Panasonic Corporation
    Inventor: Seiji Nishiyama
  • Patent number: 8884314
    Abstract: The present disclosure is directed to circuitry configurable based on device orientation. Example circuitry may comprise at least one device location and configurable conductors. The at least one device location may include at least two conductive pads onto which a device may be populated by a manufacturing process. The configurable conductors may be coupled to each of the at least two conductive pads. The configurable conductors may be configured by adding conductive material to at least one configurable conductor or subtracting at least part of at least one configurable conductor. For example, conductive material may be added to close a space between two segments of a configurable conductor to form a conduction path. Alternatively, at least part of at least one of a plurality of configurable conductors coupled to a conductive pad may be subtracted (e.g., cut) to stop conduction in the at least one configurable conductor.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: November 11, 2014
    Assignee: OSRAM SYLVANIA Inc.
    Inventor: Jeffery J. Serre
  • Patent number: 8872215
    Abstract: A light emitting device according to the embodiment includes a first electrode; a light emitting structure including a first semiconductor layer, an active layer and a second semiconductor layer on the first electrode; a second electrode on the light emitting structure; and a control switch installed on the light emitting structure to control the light emitting structure.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: October 28, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kwang Ki Choi, Hwan Hee Jeong, Sang Youl Lee, June O Song
  • Patent number: 8866179
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, an insulating layer, a first interconnection layer, a second interconnection layer, a first metal pillar, a second metal pillar, a resin layer and a conductive material. The conductive material is provided on a surface of the resin layer between the first metal pillar and the second metal pillar, and electrically connects the first metal pillar and the second metal pillar.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: October 21, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiaki Sugizaki, Susumu Obata
  • Patent number: 8860069
    Abstract: A light-emitting device package. The light-emitting device package includes a lead frame comprising a plurality of separate leads; a molding member that fixes the plurality of leads and comprises an opening portion that exposes the lead frame; and a light-emitting device chip that is attached on the lead frame in the opening portion and emits light through an upper surface portion of the light-emitting device chip, wherein a height of the molding member is lower than a height of the light-emitting device chip with respect to the lead frame.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: October 14, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Cheol-jun Yoo, Young-hee Song
  • Patent number: 8860072
    Abstract: A light emitting device includes a body having a first recess; a barrier section having a second recess and a third recess, protruding upward over a bottom surface of the first recess, and dividing the bottom surface of the first recess into a first region and a second region; a first light emitting diode disposed in the first region; a second light emitting diode disposed in the second region; a first lead electrode disposed in the first region; a second lead electrode disposed in the second region; a first wire electrically connecting the first lead electrode to the second light emitting diode through the second recess; and a second wire electrically connecting the second lead electrode to the first light emitting diode through the third recess.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: October 14, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Joong In An, Sung Min Kong
  • Patent number: 8860045
    Abstract: An embodiment of the present invention provides a light emitting device including: a transparent substrate; a wiring layer disposed on the transparent substrate; a plurality of light emitting diode chips disposed on the transparent substrate and electrically connected to the wiring layer; and an opposite substrate disposed on the transparent substrate to sandwich the light emitting diode chips and the wiring layer, wherein no wiring layer is disposed on a surface of the opposite substrate facing the light emitting diode chips.
    Type: Grant
    Filed: August 4, 2012
    Date of Patent: October 14, 2014
    Assignee: Kun Hsin Technology
    Inventor: Kun-Chuan Lin
  • Patent number: 8860066
    Abstract: An LED module A1 includes an LED chip 1, a lead group 4 including a lead 4A on which the LED chip 1 is mounted and a lead 4B spaced apart from the lead 4A, a resin package 2 covering part of the lead group 4, and mounting terminals 41 and 42 provided by part of the lead group 4 that is exposed from the resin package 2 and spaced apart from each other in direction x. The LED module further includes a mounting terminal 43 spaced apart from the mounting terminal 41 in direction y, and a mounting terminal 44 spaced apart from the mounting terminal 42 in direction y. This arrangement allows the LED module A1 to be mounted at a correct position on a circuit board.
    Type: Grant
    Filed: July 22, 2009
    Date of Patent: October 14, 2014
    Assignee: Rohm Co., Ltd.
    Inventor: Kentaro Mineshita
  • Patent number: 8853718
    Abstract: A display device is provided with a reinforced power line. The display device includes a common power line. A light emission layer is interposed between a first and a second electrode. A passivation layer is formed over the second electrode and has a stepped shape. An auxiliary metal layer is coupled to a common power line. At least a portion of the auxiliary metal layer is formed over the passivation layer and has a shape that follows the stepped shape of the passivation layer.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: October 7, 2014
    Assignee: LG Display Co., Ltd.
    Inventors: Jaehyuk Lee, Myungseop Kim
  • Patent number: 8853837
    Abstract: An optoisolator leadframe assembly includes: an emitter leadframe part including a first rail and a plurality of emitter leadframe units, each rail including two rows of emitter leadframes, each having a die-mounting pad; and a receiver leadframe part including a second rail and a plurality of receiver leadframe units, each including two rows of receiver leadframes, each having a die-mounting pad. The die-mounting pads of the emitter leadframes of each row of each of the emitter leadframe units are respectively aligned with and spaced apart from the die-mounting pads of the receiver leadframes of an adjacent row of an adjacent one of the receiver leadframe units. Each of the emitter and receiver leadframe parts is a single piece.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: October 7, 2014
    Assignees: Lite-On Electronics (Guangzhou) Limited, Lite-On Technology Corp.
    Inventors: Cheng-Hong Su, Chih-Hung Tzeng
  • Patent number: 8853732
    Abstract: The invention relates to an optoelectronic component, having —a carrier (1) comprising a first main surface (Ia), —at least one optoelectronic semiconductor chip (2) having no substrate, and —a contact metallization (3a, 3b), wherein —the carrier (1) is electrically insulating, —the at least one optoelectronic semiconductor chip (2) is fastened to the first main surface (Ia) of the carrier (1) by means of a bonding material (4), particularly a solder material, —the contact metallization (3a, 3b) covers at least one area of the first main surface (Ia) free of the optoelectronic semiconductor chip (2), and —the contact metallization (3a, 3b) is electrically conductively connected to the optoelectronic semiconductor chip (2).
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: October 7, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Klaus Müller, Günter Spath, Siegfried Herrmann, Ewald Karl Michael Günther, Herbert Brunner
  • Patent number: 8853733
    Abstract: An light-emitting diode (LED) package includes a substrate, a electrode structure embedded in the substrate, and a plurality of LED chips electrically connecting with the electrode structure. The substrate includes a main portion and a protruding portion extending from a bottom surface of the main portion. The main portion is located above the protruding portion. The electrode structure includes a first, a second and a third electrode spaced from each other. The third electrode is located between the first and second electrodes. Top surfaces of the first, second and third electrodes are exposed out of the top surface of the main portion. Bottom surfaces of the first and second electrodes are exposed out of the bottom surface of the main portion. Bottom surface of the third electrode is covered by the protruding portion. The present disclosure also relates to a method for manufacturing the LED package.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: October 7, 2014
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Che-Hsang Huang, Pin-Chuan Chen, Lung-Hsin Chen, Wen-Liang Tseng, Yu-Liang Huang
  • Patent number: 8835937
    Abstract: Disclosed is an optoelectronic component (1) comprising a semiconductor function region (2) with an active zone (400) and a lateral main direction of extension, said semiconductor function region including at least one opening (9, 27, 29) through the active zone, and there being disposed in the region of the opening a connecting conductor material (8) that is electrically isolated (10) from the active zone in at least in a subregion of the opening. Further disclosed are a method for producing such an optoelectronic component and a device comprising a plurality of optoelectronic components. The component and the device can be produced entirely on-wafer.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: September 16, 2014
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Ralph Wirth, Herbert Brunner, Stefan Illek, Dieter Eissler
  • Patent number: 8836107
    Abstract: A plastic SON/QFN package (300) for high power has a pair of oblong metal pins (320, 321) exposed from a surface of the plastic (301), the pins straddling a corner (302) of the package; each pin has a long axis (320a, 321a), the long axes of the pair forming a non-orthogonal angle. Package (300) further includes a chip assembly pad (310), acting as a thermal spreader.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: September 16, 2014
    Assignee: Texas Instruments Incorporated
    Inventor: Sreenivasan K. Koduri
  • Patent number: 8829561
    Abstract: The present invention relates to an LED device, which includes a metallic frame, an LED chip, and a packaging body. The metallic frame includes a first lead frame and a second lead frame. The first lead frame has a protruding portion extending toward the second lead frame, while the second lead frame has a notch formed correspondingly to the protruding portion. An electrically insulated region is cooperatively defined by the first and second lead frames. The metallic frame defines at least one blind hole in proximate to the electrically insulated region. The LED chip is electrically connected to the first and second lead frames. The packaging body has a base portion encapsulating the metallic frame and a light-permitting portion arranged above the LED chip.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: September 9, 2014
    Assignees: Lite-On Electronics (Guangzhou) Limited, Lite-On Technology Corporation
    Inventors: Chen-Hsiu Lin, Yi-Chien Chang
  • Patent number: 8829560
    Abstract: An optoelectronic semiconductor chip, comprising: a radiation out-coupling side (102, 910); a contact connection (104, 1000); a metal contact material (210, 912) applied to the radiation out-coupling side (102, 910) and a metal conductive connection (106, 500, 914) applied to the contact material (210, 912) and which is connected to the contact connection (104, 1000).
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: September 9, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Franz Eberhard, Wolfgang Schmid
  • Patent number: 8829691
    Abstract: A light-emitting device package includes: a package body on which a mount portion and a terminal portion are disposed; a light-emitting device chip that is mounted on the mount portion; and a bonding wire that electrically connects an electrode of the light-emitting device chip and the terminal portion. The bonding wire includes a rising portion that rises from the light-emitting device chip to a loop peak, and an extended portion that connects the loop peak and the terminal portion. A first kink portion, which is bent in a direction intersecting a direction in which the rising portion rises, is disposed on the rising portion.
    Type: Grant
    Filed: September 25, 2011
    Date of Patent: September 9, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-yun Lim, Kook-jin Oh, Joon-gil Lee
  • Patent number: 8829556
    Abstract: A large area, flexible, OLED assembly has improved thermal management by providing a metal cathode of increased thickness of at least 500 nm. A thermal heat sink trace may be used as alternative or in conjunction with the increased thickness cathode where the trace leads from a central region of the OLED toward a perimeter region, or by other backsheet thermal management designs. External heat sinking, for example to a plate, fixture, etc. may be additionally used or in conjunction with the increased thickness cathode and/or backsheet design to provide further thermal management.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: September 9, 2014
    Assignee: General Electric Company
    Inventors: Deeder Aurongzeb, James Michael Kostka, Gary Robert Allen
  • Patent number: 8823024
    Abstract: An optoelectronic semiconductor body comprises a substantially planar semiconductor layer sequence having a first and a second main side, which has an active layer suitable for generating electromagnetic radiation. Furthermore, the semiconductor body comprises at least one trench that severs the active layer of the semiconductor layer sequence and serves for subdividing the active of the semiconductor layer sequence into at least two electrically insulated active partial layers. A first and second connection layer arranged on a second main side serve for making contact with the active partial layers. In this case, the first and second connection layers for making contact with the at least two active partial layers are electrically conductively connected to one another in such a way that the active partial layers form a series circuit.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: September 2, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Karl Engl, Patrick Rode, Lutz Hoeppel, Martin Strassburg
  • Patent number: 8823022
    Abstract: A light emitting device includes a serially-connected LED array of a plurality of LED cells epitaxially formed on a substrate. The LED array includes a first LED cell, and a second LED cell adjacent to each other, and a serially-connected LED sub-array including at least three LED cells intervening the first and the second LED cells. Each LED cell includes a first semiconductor layer formed on the substrate; a second semiconductor layer formed on the first semiconductor layer; and an active layer formed between the first semiconductor layer and the second semiconductor layer; wherein the distance between the first semiconductor layer of the first LED cell and that of the second LED cell is larger than 30 ?m, and one of the first semiconductor layers and/or one of the second semiconductor layers of the LED cells includes a round corner with a radius of curvature not less than 15 ?m.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: September 2, 2014
    Assignee: Epistar Corporation
    Inventors: Chao Hsing Chen, Chien Fu Shen, Tsun Kai Ko, Schang Jing Hon
  • Patent number: 8816386
    Abstract: A flip-chip LED including a light emitting structure, a first dielectric layer, a first metal layer, a second metal layer, and a second dielectric layer is provided. The light emitting structure includes a first conductive layer, an active layer, and a second conductive layer. The active layer is disposed on the first conductive layer, and the second conductive layer is disposed on the active layer. The first metal layer is disposed on the light emitting structure and is contact with the first conductive layer, and part of the first metal layer is disposed on the first dielectric layer. The second metal layer is disposed on the light emitting structure and is in contact with the second conductive layer, and part of the second metal layer is disposed on the first dielectric layer. The second dielectric layer is disposed on the first dielectric layer. The first conductive layer includes a rough surface so as to improve a light extraction efficiency.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: August 26, 2014
    Assignee: Epistar Corporation
    Inventors: Tzer-Perng Chen, Jen-Chau Wu, Chuan-Cheng Tu, Yuh-Ren Shieh
  • Patent number: 8816385
    Abstract: An exemplary light-emitting diode (LED) package includes a first electrode, a second electrode spaced from the first electrode, an electrically insulating substrate sandwiched by and connecting with the first electrode and the second electrode, a first LED chip and a second LED chip mounted on top surfaces of the first and second electrodes respectively, and a reflector covering the top surfaces of the first and second electrodes. The first LED chip mounted on the top surface of the first electrode is above the second LED chip mounted on the top surface of the second surface. L-shaped retaining walls are formed on the top surfaces of the first and second electrodes. By the retaining walls, the LED package can also be used as a side-view LED package.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: August 26, 2014
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventor: Hsin-Chiang Lin
  • Patent number: 8810010
    Abstract: An exemplary semiconductor device comprises a through silicon via penetrating a semiconductor substrate including a circuit pattern on one side of the substrate, a first doped layer formed in the other side, and a bump connected with the through silicon via.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: August 19, 2014
    Assignee: SK Hynix Inc.
    Inventor: Jae Bum Kim
  • Patent number: 8803183
    Abstract: An LED heat-conducting substrate and its thermal module wherein the composite heat-conducting substrate is incorporated by multiple heat-conducting wires or fibers and insulating material. Said wires or fibers are arranged at interval, and penetrate the front and rear faces. The wires or fibers are segregated by insulating material. An electrode pad is incorporated onto the front face of the composite heat-conducting substrate, and is electrically connected with the electrode pin of LED unit. A heat-conducting pad is incorporated and kept in contact with the heat sink of the LED component for heat conduction. An insulating layer is incorporated onto the rear face of the composite heat-conducting substrate, and located correspondingly to the electrode pad. The LED heat-conducting substrate and thermal module can be constructed easily for high heat conduction in the thickness direction and high electrical insulation in the direction of plane, enabling quick heat transfer to the heat-sinking component.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: August 12, 2014
    Assignee: Ho Cheng Industrial Co., Ltd.
    Inventors: Yi-Shun Chang, Syh-Yuh Cheng
  • Patent number: 8803186
    Abstract: An LED substrate structure has a substrate and a conducting portion. The substrate has a bottom surface and two opposite first lateral surfaces connected with the bottom surface. The bottom surface has the conducting portion formed thereon, and the conducting portion has a first cutting segment located on a contact border defined between one of the two first lateral surfaces and the bottom surface. The conducting portion further has an expansion region connected with the first cutting segment. The length of the first cutting segment is shorter than any segment taken on the expansion region parallel thereto.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: August 12, 2014
    Assignees: Lite-On Electronics (Guangzhou) Limited, Lite-On Technology Corporation
    Inventors: Hou-Te Lee, Tsung-Kang Ying, Chia-Hung Chu, Shih-Po Yu
  • Patent number: 8791491
    Abstract: A submount for a light emitting device package includes a substrate. A first bond pad and a second bond pad are on a first surface of the substrate. The first bond pad includes a die attach region offset toward a first end of the substrate and configured to receive a light emitting diode thereon. The second bond pad includes a bonding region between the first bond pad and the second end of the substrate and a second bond pad extension that extends from the bonding region along a side of the substrate toward a corner of the substrate at the first end of the substrate. First and second solder pads are a the second surface of the substrate. The first solder pad is adjacent the first end of the substrate and contacts the second bond pad. The second solder pad is adjacent the second end of the substrate and contacts the first bond pad. Related LED packages and methods of forming LED packages are disclosed.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: July 29, 2014
    Assignee: Cree, Inc.
    Inventors: Ban P. Loh, Nathaniel O. Cannon, Norbert Hiller, John Edmond, Mitch Jackson, Nicholas W. Medendorp, Jr.
  • Patent number: 8791484
    Abstract: A LED lamp is disclosed which has a plurality of light unit, each of the light unit has at least one flat metal lead for heat dissipation and the lower part of the metal lead is mounted on a heat sink for a further heat dissipation.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: July 29, 2014
    Assignee: Uniled Lighting Taiwan Inc.
    Inventors: Ming-Te Lin, Ming-Yao Lin, Heng Qiu
  • Patent number: 8786073
    Abstract: A packaging device for matrix-arrayed semiconductor light-emitting elements of high power and high directivity comprises a metal base, an array chip and a plurality of metal wires. The metal base is of highly heat conductive copper or aluminum, and a first electrode area and at least one second electrode area which are electrically isolated are disposed on the metal base. The array chip is disposed on the first electrode area, on which multiple matrix-arranged semiconductor light-emitting elements and at least one wire bond pad adjacent to the light-emitting elements are disposed. The light-emitting element is a VCSEL element, an HCSEL element or an RCLED element. The metal wires are connected between the wire bond pad and the second electrode area to transmit power signals. Between the bottom surface and the first electrode area is disposed a conductive adhesive to bond and facilitate electrical connection between the two.
    Type: Grant
    Filed: October 23, 2012
    Date of Patent: July 22, 2014
    Assignee: TrueLight Corporation
    Inventors: Cheng Ju Wu, Hung-Che Chen, I Han Wu, Shang-Cheng Liu, Jin Shan Pan
  • Patent number: 8786074
    Abstract: A packaging device for matrix-arrayed semiconductor light-emitting elements of high power and high directivity comprises a metal base, an array chip and a plurality of metal wires. The metal base is of highly heat conductive copper or aluminum, and a first electrode area and at least one second electrode area which are electrically isolated are disposed on the metal base. The array chip is disposed on the first electrode area, on which multiple matrix-arranged semiconductor light-emitting elements and at least one wire bond pad adjacent to the light-emitting elements are disposed. The light-emitting element is a VCSEL element, an HCSEL element or an RCLED element. The metal wires are connected between the wire bond pad and the second electrode area to transmit power signals. Between the bottom surface and the first electrode area is disposed a conductive adhesive to bond and facilitate electrical connection between the two.
    Type: Grant
    Filed: October 23, 2012
    Date of Patent: July 22, 2014
    Assignee: TrueLight Corporation
    Inventors: Cheng Ju Wu, Hung-Che Chen, I Han Wu, Shang-Cheng Liu, Jin Shan Pan
  • Patent number: 8772803
    Abstract: A semiconductor light-emitting device is provided that may include an electrode layer, a light-emitting structure including a compound semiconductor layer on the electrode layer, and an electrode on the light-emitting structure, wherein the electrode includes an ohmic contact layer that contacts the compound semiconductor layer, a first barrier layer on the ohmic contact layer, a conductive layer including copper on the first barrier layer, a second barrier layer on the conductive layer, and a bonding layer on the second barrier layer.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: July 8, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Hwan Hee Jeong, Sang Youl Lee, June O Song, Kwang Ki Choi
  • Patent number: 8772166
    Abstract: Methods are disclosed, including for increasing the density of isolated features in an integrated circuit. Also disclosed are associated structures. In some embodiments, contacts are formed on pitch with other structures, such as conductive interconnects that may be formed by pitch multiplication. To form the contacts, in some embodiments, a pattern corresponding to some of the contacts is formed in a selectively definable material such as photoresist. Features in the selectively definable material are trimmed, and spacer material is blanket deposited over the features and the deposited material is then etched to leave spacers on sides of the features. The selectively definable material is removed, leaving a mask defined by the spacer material. The pattern defined by the spacer material may be transferred to a substrate, to form on pitch contacts. In some embodiments, the on pitch contacts may be used to electrically contact conductive interconnects in the substrate.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: July 8, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Sandhu, Mark Kiehlbauch, Steve Kramer, John Smythe
  • Patent number: 8772794
    Abstract: Disclosed are a light emitting device package and a lighting system in which the light emitting device package includes a first cavity in a first region of the body, a second cavity in a second region of the body, first and second lead frames spaced apart from each other in the first cavity, a third lead frame spaced apart from the second lead frame in the second cavity, a first light emitting device on the first and second lead frames in the first cavity, a second light emitting device on the second and third lead frames in the second cavity, and a molding member in the first and second cavities.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: July 8, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Buemyeon Lee
  • Patent number: 8772823
    Abstract: Light-emitting devices are provided, the light-emitting devices include a light-emitting structure layer having a first conductive layer, a light-emitting layer and a second conductive layer sequentially stacked on a first of a substrate, a plurality of seed layer patterns formed apart each other in the first conductive layer; and a plurality of first electrodes formed through the substrate, wherein each of the first electrodes extends from a second side of the substrate to each of the seed layer patterns.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: July 8, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yu-Sik Kim
  • Patent number: 8772914
    Abstract: A first semiconductor chip and a second semiconductor chip are overlapped with each other in a direction in which a first multilayer interconnect layer and a second multilayer interconnect layer are opposed to each other. When seen in a plan view, a first inductor and a second inductor are overlapped. The first semiconductor chip and the second semiconductor chip have non-opposed areas which are not opposed to each other. The first multilayer interconnect layer has a first external connection terminal in the non-opposed area, and the second multilayer interconnect layer has a second external connection terminal in the non-opposed area.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: July 8, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Yasutaka Nakashiba, Kenta Ogawa
  • Patent number: 8766314
    Abstract: An object is to provide a light-emitting device having a structure in which an external connection portion can easily be connected and a method for manufacturing the light-emitting device. A light-emitting device includes a lower support 110, a base insulating film 112 over the lower support 110 which has a through-hole 130, a light-emitting element 127 over the base insulating film 112, and an upper support 122 over the light-emitting element 127. An electrode 131 is provided in the through-hole 130, and the external connection terminal 132 electrically connected to the electrode 131 is provided below the base insulating film 112. The external connection terminal 132 is electrically connected to the external connection portion 133 and functions as a terminal that inputs a signal or a power supply into the light-emitting device. This light-emitting device has a structure in which an external connection portion can easily be connected.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: July 1, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kaoru Hatano, Satoshi Seo
  • Patent number: 8759846
    Abstract: A light emitting device is provided. The light emitting device comprises a substrate, a first lead frame and a second lead frame on the substrate, a first light emitting diode, a heat conductor on the substrate, and a heat transfer pad. The first light emitting diode on the first lead frame is electrically connected to the first lead frame and the second lead frame. The heat conductor is electrically separated from the first lead frame. The heat transfer pad contacts the first lead frame and the heat conductor thermally to connect the first lead frame to the heat conductor.
    Type: Grant
    Filed: August 11, 2008
    Date of Patent: June 24, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Jun Seok Park
  • Patent number: 8759869
    Abstract: A heat radiation structure of a light emitting element has leads, each lead having a plurality of leg sections, and a light emitting chip mounted on any one of the leads. The present invention can provide a high-efficiency light emitting element, in which a thermal load is reduced by widening a connecting section through which a lead and a chip seating section of the light emitting element are connected, and the heat generated from a heat source can be more rapidly radiated to the outside. Further, the present invention can also provide a high-efficiency light emitting element, in which heat radiation fins are formed between a stopper and a molding portion of a lead of the light emitting element so that natural convection can occur between the heat radiation fins, and an area in which heat radiation can occur is widened to maximize a heat radiation effect.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: June 24, 2014
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Tae Won Seo, Zhbanov Alexander, Dae Won Kim
  • Patent number: 8759855
    Abstract: A light emitting device includes a support member having a mounting surface. The support member includes an insulating member having top surface and a plurality of side surfaces, a first metal pattern disposed on the top surface of the insulating member, and a second metal pattern disposed on the side surface of the insulating member such that a side surface of the second metal pattern is continuous with a top surface of the first metal pattern. The light emitting device further includes a light emitting element mounted on the mounting surface at a location of the first metal pattern, and a bonding member that bonds the light emitting element to the mounting surface. The bonding member covers at least a portion of the first metal pattern and at least a portion of the second metal pattern.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: June 24, 2014
    Assignee: Nichia Corporation
    Inventor: Kazuhiro Kamada
  • Patent number: 8742416
    Abstract: A display panel includes: gate lines disposed on a first substrate; signal lines extending across the gate lines and including portions, other than portions thereof that extend across the gate lines, disposed on the same surface as the gate lines, the portions that extend across the gate lines being disposed in positions facing the gate lines with an insulating film interposed therebetween; transistors having gate electrodes connected to the gate lines, source electrodes connected to the signal lines and disposed on the insulating film, and drain electrodes disposed on the insulating film; pixel electrodes connected to the drain electrode and disposed on the insulating film; a protective film covering the transistors and the pixel electrodes; and a common electrode disposed on the protective film.
    Type: Grant
    Filed: October 19, 2011
    Date of Patent: June 3, 2014
    Assignee: Sony Corporation
    Inventors: Toshiharu Matsushima, Shinichiro Nomura
  • Patent number: 8735932
    Abstract: An LED includes a compound semiconductor structure having first and second compound layers and an active layer, first and second electrode layers atop the second compound semiconductor layer and connected to respective compound layers. An insulating layer is coated in regions other than where the first and second electrode layers are located. A conducting adhesive layer is formed atop the non-conductive substrate, connecting the same to the first electrode layer and insulating layer. Formed on one side surface of the non-conductive substrate and adhesive layer is a first electrode connection layer connected to the conducting adhesive layer. A second electrode connection layer formed on another side surface is connected to the second electrode layer. By forming connection layers on respective side surfaces of the light-emitting device, manufacturing costs can be reduced.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: May 27, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-hyung Kim, Cheol-soo Sone, Jong-in Yang, Sang-yeob Song, Si-hyuk Lee
  • Patent number: 8735891
    Abstract: A display substrate includes first, second, and third insulating layers in a display area thereof. The first and third insulating layers are in not only the display area but also a pad area adjacent to the display area and including a pad therein. Thus, defects of the display panel may be reduced.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: May 27, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: JeongMin Park, Jung-Soo Lee, Ji-Hyun Kim, Gwui-Hyun Park
  • Patent number: 8729580
    Abstract: A light emitting device based on a AlInGaN materials system wherein a coating is used to improve the extraction of light from a device. A coating has a very low optical loss and an index of refraction greater than 2. In a preferred embodiment the coating is made from Ta2O5, Nb2O5, TiO2, or SiC and has a thickness between about 0.01 and 10 microns. A surface of a coating material may be textured or shaped to increase its surface area and improve light extraction. A surface of the coating material can also be shaped to engineer the directionality of light escaping the layer. A coating can be applied directly to a surface or multiple surfaces of a light emitting device or can be applied onto a contact material. A coating may also serve as a passivation or protection layer for a device.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: May 20, 2014
    Assignee: Toshiba Techno Center, Inc.
    Inventor: Steven D. Lester
  • Patent number: 8723213
    Abstract: Provided is a light emitting device. In one embodiment, a light emitting device including: a support member; a light emitting structure on the support member, the light emitting structure comprising a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer; a protective member at a peripheral region of an upper surface of the support member; an electrode including an upper portion being on the first conductive type semiconductor layer, a side portion extended from the upper portion and being on a side surface of the light emitting structure, and an extended portion extended from the side portion and being on the protective member; and an insulation layer between the side surface of the light emitting structure and the electrode.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: May 13, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Jung Hyeok Bae, Young Kyu Jeong, Kyung Wook Park, Duk Hyun Park
  • Publication number: 20140117388
    Abstract: Light-emitting semiconductor packages and related methods. The light-emitting semiconductor package includes a central barrier, a plurality of leads, a light-emitting device, a first encapsulant, a package body, and a second encapsulant. The light-emitting device is disposed in the interior space defined by the central barrier and is electrically connected to the leads surrounding the central barrier. The light-emitting device includes upper and lower light-emitting surfaces. The first encapsulant and the second encapsulant cover the upper and lower light-emitting surfaces, respectively. The package body encapsulates portions of the central barrier, portions of each of the leads, and the first encapsulant. The light-emitting semiconductor package can emit light from both the upper and lower sides thereof.
    Type: Application
    Filed: October 29, 2012
    Publication date: May 1, 2014
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yen-Ting Kuo, Ping-Cheng Hu, Yu-Fang Tsai
  • Patent number: 8710609
    Abstract: A semiconductor arrangement including at least one lead arrangement with a top and a bottom opposite the top; at least one solder resist layer which partially covers the top and the bottom, at least sub-zones of the top and the bottom, which are not covered by the solder resist layer, forming electrical base members; an optoelectronic semiconductor element, which is mounted on at least one of the base members on the top of the lead arrangement and is connected electrically conductively therewith, and an encapsulant applied at least to the top of the lead arrangement, the encapsulant covering up the semiconductor element and lying at least partially against the solder resist layer, wherein the base members are bordered all round by the solder resist layer.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: April 29, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Michael Zitzlsperger, Matthias Sperl