Abstract: Disclosed embodiments demonstrate batch processing methods for producing optical windows for microdevices. The windows protect the active elements of the microdevice from contaminants, while allowing light to pass into and out of the hermetically sealed microdevice package. Windows may be batch produced, reducing the cost of production, by fusing multiple metal frames to a single sheet of glass. In order to allow windows to be welded atop packages, disclosed embodiments keep a lip of metal without any glass after the metal frames are fused to the sheet of glass. Several techniques may accomplish this goal, including grinding grooves in the glass to provide a gap that prevents fusion of the glass to the metal frames along the outside edges in order to form a lip. The disclosed batch processing techniques may allow for more efficient window production, taking advantage of the economy of scale.

Abstract: An improved MEMS transducer apparatus and method is provided. The apparatus has a movable base structure including an outer surface region and at least one portion removed to form at least one inner surface region. At least one intermediate anchor structure is disposed within the inner surface region. The apparatus includes an intermediate spring structure operably coupled to the central anchor structure, and at least one portion of the inner surface region. A capacitor element is disposed within the inner surface region.

Abstract: An embodiment of the invention provides a chip package including a semiconductor substrate having a first surface and a second surface opposite thereto. A conducting pad is located on the first surface. A side recess is on at least a first side of the semiconductor substrate, wherein the side recess extends from the first surface toward the second surface and across the entire length of the first side. A conducting layer is located on the first surface and electrically connected to the conducting pad, wherein the conducting layer extends to the side recess.

Abstract: The disclosure relates to method and apparatus for micro-contact printing of micro-electromechanical systems (“MEMS”) in a solvent-free environment. The disclosed embodiments enable forming a composite membrane over a parylene layer and transferring the composite structure to a receiving structure to form one or more microcavities covered by the composite membrane. The parylene film may have a thickness in the range of about 100 nm-2 microns; 100 nm-1 micron, 200-300 nm, 300-500 nm, 500 nm to 1 micron and 1-30 microns. Next, one or more secondary layers are formed over the parylene to create a composite membrane. The composite membrane may have a thickness of about 100 nm to 700 nm to several microns. The composite membrane's deflection in response to external forces can be measured to provide a contact-less detector. Conversely, the composite membrane may be actuated using an external bias to cause deflection commensurate with the applied bias.

Abstract: A multilayer ceramic electronic component includes a ceramic main body having internal and floating electrode layers laminated therein and spaced apart from each other; and external electrodes formed on ends of the ceramic main body and including a first layer including a conductive metal and a second layer formed on the first layer and including a conductive resin. When Tc is thickness of a cover layer, G is gap between internal electrodes, L1 is length from either end of the ceramic main body in a length direction thereof to an end of the first layer formed on the upper or lower surface of the ceramic main body, Te is thickness of the internal electrode, Td is distance between internal and floating electrode layers, Lm is length of a margin part of the floating electrode layer, and L is length of the ceramic main body, Tc?80 ?m, (1.5)Lm?G?(L?2Lm), and L1<Lm+(Tc+Te+Td)×cot 50° are satisfied.

Abstract: Disclosed embodiments demonstrate batch processing methods for producing optical windows for microdevices. The windows protect the active elements of the microdevice from contaminants, while allowing light to pass into and out of the hermetically sealed microdevice package. Windows may be batch produced, reducing the cost of production, by fusing multiple metal frames to a single sheet of glass. In order to allow windows to be welded atop packages, disclosed embodiments keep a lip of metal without any glass after the metal frames are fused to the sheet of glass. Several techniques may accomplish this goal, including grinding grooves in the glass to provide a gap that prevents fusion of the glass to the metal frames along the outside edges in order to form a lip. The disclosed batch processing techniques may allow for more efficient window production, taking advantage of the economy of scale.

Abstract: A method for fabricating an EDLC includes (a) coating a porous activated carbon material onto current collector sheets to form carbon-based electrodes, (b) drying the carbon-based electrodes, (c) winding or stacking carbon-based electrodes interleaved with separator sheets to fabricate a jelly roll or prismatic electrode assembly, (d) inserting the electrode assembly into a package and forming electrical connections between the electrode assembly and package terminals, (e) filling the package with a liquid electrolyte, and (f) sealing the package. Steps (a)-(f) are performed in an atmosphere having a low moisture content. The atmosphere may be vacuum or purged with dry gas.

Abstract: A method of forming a dual port pressure sensor includes forming a first opening and a second opening in a flag of a lead frame. An encapsulant is molded to hold the lead frame in which the encapsulant is over a top of the flag and a bottom of the flag is uncovered by the encapsulant. A first opening in the encapsulant is aligned with and larger than the first opening in the flag and a second opening in the encapsulant aligned with the second opening in the flag. A pressure sensor transducer is attached to the bottom of the flag to cover the first opening in the flag, wherein the pressure sensor transducer provides an electrically detectable correlation to a pressure differential based on a first pressure received on its top side and a second pressure received on its bottom side. An integrated circuit is attached to the bottom of the flag. The integrated circuit is electrically coupled to the pressure sensor. A lid is attached to the encapsulant to form an enclosure around the bottom of the flag.

Abstract: A method of manufacturing an electronic component includes the steps of: preparing a first block formed by stacking a plurality of green sheets serving as an element body; cutting the first block in a first direction into a plurality of second blocks such that a portion of an internal conductor connected to an external electrode is exposed at a cut surface; and cutting each of the plurality of second blocks in a second direction crossing the first direction such that the internal conductor exposed at each of both cut surfaces is located in the center of a portion serving as each element body in the first direction in each of the plurality of second blocks.

Abstract: A composite sheet includes a ceramic green sheet having a lengthwise direction and a conductor film printed on the ceramic green sheet. The conductor film has a shape that has a longitudinal dimension extending in the lengthwise direction and a lateral dimension perpendicular or substantially perpendicular to the longitudinal direction. The conductor film includes a plurality of thickness-varied regions arranged in a row or a plurality of rows extending in the lengthwise direction while being dispersed in the lengthwise direction. The thickness-varied regions have a thickness that is different from a thickness of a portion of the conductor film excluding the thickness-varied regions.

Abstract: Described herein are multi-functional composite materials containing energy storage assemblies that can be significantly resistant to tension/compression stress. The energy storage assemblies can contain at least one energy storage layer that contains an insulating layer having a plurality of openings arranged in a spaced apart manner, and a plurality of energy storage devices, each energy storage device being contained within one of the openings. The energy storage devices can be electrically connected to one another. The energy storage layer can contain a support material upon which electrical connections are formed. One or more energy storage layers can be disposed between two or more stress carrying layers to form an energy storage assembly that can have significant resistance to tension/compression stress. Energy storage devices suitable for use in the energy storage assemblies can include, for example, batteries, capacitors and/or supercapacitors.

Abstract: A capacitor assembly for use in, and a method of assembling, a filtered feedthrough. The capacitor includes an insulative member fixedly attached to its bottom portion to inhibit high voltage arcing. The termination material present on the inner and outer diameters of the capacitor is absent from a portion of the capacitor proximate the bottom portion, e.g., at the insulative member.

Abstract: A conductive paste that includes a (meth)acrylic resin serving as a binder resin, an organic solvent, and a metal powder. The (meth)acrylic resin has a glass transition point Tg in the range of ?60° C. to 120° C., a hydroxyl group content in the range of 0.01% to 5% by weight per molecule, an acid value in the range of 1 to 50 mgKOH/g, and a weight-average molecular weight in the range of 10,000 to 350,000 Mw.

Abstract: A thin film capacitor and a method of manufacturing the same are provided. The thin film capacitor includes a metal foil, dielectric layers and internal electrode layers alternately disposed on the metal foil, and a top electrode layer on the topmost layer among the two or more dielectric layers. These layers have peripheries that define an outer profile flaring toward the metal foil as viewed from the stacking direction of the thin film capacitor, and at least one dielectric layer of two or more dielectric layers satisfies a relationship B>A>0 wherein A is a gap of the periphery of the internal electrode layer directly below the dielectric layer protruding from the periphery of the dielectric layer, and B is a gap of the periphery of the dielectric layer protruding from the periphery of the internal electrode layer or the top electrode layer directly above the dielectric layer. The thin film capacitor has a structure free from short-circuiting and reducing debris of broken dielectric material.

Abstract: There is provided a multilayered ceramic electronic component including: a ceramic body in which a plurality of dielectric layers are stacked; a plurality of first and second internal electrodes formed on at least one of the dielectric layers and alternately exposed through both ends of the ceramic body in a stacking direction of the ceramic body; an a step compensation cover including a ceramic material having a viscosity higher than that of a ceramic material included in the ceramic body and formed on at least one of an upper surface and a lower surface of the ceramic body.

Abstract: The invention relates to three-dimensional crystalline foams with high surface areas, high lithium capacity, and high conductivity for use as electrode materials and methods for their fabrication. In additional embodiments, the invention also relates to the use of three-dimensional crystalline foams as supercapacitors for improved charge and energy storage.

Abstract: In an aligning device, in plan view, a first recess of a first transfer jig allows an entire region of a second recess of the first transfer jig to be situated within the first recess of the first transfer jig by a predetermined interval. A first recess of a second transfer jig allows an entire region of a second recess of the second transfer jig to be situated within the first recess of the second transfer jig by a predetermined interval. When the first transfer jig and the second transfer jig overlap each other, the first recess of the second transfer jig allows the entire region of the second recess of the first transfer jig to be situated within the first recess of the second transfer jig by a predetermined interval. With the alignment object being transferred into a cavity of the first transfer jig, by causing the first transfer jig and the second transfer jig to overlap each other, the alignment object is transferred from the cavity of the first transfer jig to a cavity of the second transfer jig.

Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body including dielectric layers and internal electrodes; electrode layers connected to the internal electrodes; and a conductive resin layer formed on the electrode layers and including a first conductor, a second conductor having a fiber shape, and a base resin.

Abstract: High precision capacitors and methods for forming the same utilizing a precise and highly conformal deposition process for depositing an insulating layer on substrates of various roughness and composition are disclosed. The method generally includes the steps of depositing a first insulating layer on a metal substrate by atomic layer deposition (ALD); (b) forming a first capacitor electrode on the first insulating layer; and (c) forming a second insulating layer on the first insulating layer and on or adjacent to the first capacitor electrode. The methods provide an improved deposition process that produces a highly conformal insulating layer on a wide range of substrates, and thereby, an improved capacitor.

Abstract: There are provided a multilayer ceramic capacitor and a manufacturing method thereof, the multilayer ceramic capacitor including: a ceramic body; first and second internal electrodes; first and second external electrodes; and a first insulating layer.

Abstract: There is provided a multilayer ceramic electronic component including a ceramic body including a plurality of dielectric layers stacked in a thickness direction and satisfying T/W>1.0 when it is defined that a width thereof is W and a thickness thereof is T, a plurality of first and second internal electrodes disposed in the ceramic body so as to face each other, having the dielectric layer interposed therebetween, and alternately exposed through both end surfaces of the ceramic body, and first and second external electrodes including head parts formed on both end surfaces of the ceramic body and two band parts connected to the head parts and formed on portions of upper and lower main surfaces of the ceramic body so as to be spaced apart from each other in a width direction, and electrically connected to the first and second internal electrodes, respectively.

Abstract: The multi-layer component has a main body (1) made of ceramic layers (2) and two-dimensional inner electrodes (3, 3a, 3b, 3c) in an alternating sequence. Outer electrodes (4, 4a) which are separate from each other are located on the outer surfaces (5, 5a) of the main body. The inner electrodes each have a connecting region and an overlapping region adjacent thereto. A rectilinear edge (16) of the connecting region is connected in an electrically conductive manner to one of the outer electrodes. The overlapping region is arranged at distances (6, 6a) from the outer electrodes. The edge of the connecting region that is connected to the outer electrode is at least as long as the extent of the overlapping region along straight lines running parallel to said edge, and the overlapping region is multiply interrupted at least along a number of said straight lines.

Abstract: A capacitor with improved lead frame attachment is described wherein the improved lead frame attachment mitigates defects. The capacitor comprises parallel conductive internal electrodes of alternating polarity with a dielectric between the conductive internal electrodes. A first copper undercoat is in electrical contact with the conductive internal electrodes of a first polarity and a second copper undercoat is in electrical contact with conductive internal electrodes of a second polarity. A first lead is in electrical contact with the first copper undercoat with a first solder between the first lead and the first copper undercoat. A second lead is in electrical contact with the second copper undercoat with a second solder between the second lead and the second copper undercoat.

Abstract: There are provided a multilayer ceramic electronic component and a manufacturing method thereof, the multilayer ceramic electronic component including: a ceramic body including dielectric layers; a plurality of internal electrodes facing each other with the dielectric layer interposed therebetween; and external electrodes electrically connected to the internal electrodes, wherein a thickness to of the internal electrode satisfies 0.1 ?m?Te?0.5 ?m, and when, in a cross-section of the ceramic body taken in length and thickness directions, cut through a central portion of the ceramic body in a width direction, a distance, in the length direction, of a central portion of an internal electrode grain closest to a disconnected portion of the internal electrode is denoted by Tc, and a distance, in the length direction, of the internal electrode grain at a point equal to 25% of the thickness thereof above or below the central portion thereof is denoted by Tl, 0.7?Tl/Tc?1.3 is satisfied.

Abstract: There is provided an array type multilayer ceramic electronic component including a ceramic body having a plurality of dielectric layers stacked in a length direction, a first capacitor part including a plurality of first and second internal electrodes alternately exposed through both side surfaces of the ceramic body, a second capacitor part disposed to be spaced apart from the first capacitor part and including a plurality of third and fourth internal electrodes, a first external electrode formed on one side surface, a second external electrode disposed to be spaced apart from the first external electrode, formed on one side surface of the ceramic body, and a third external electrode formed on the other side surface of the ceramic body.

Abstract: A ceramic electronic component includes a rectangular or substantially rectangular parallelepiped shaped laminate in which a ceramic layer and an internal electrode are alternately laminated and an external electrode provided on a portion of a surface of the laminate and electrically connected to the internal electrode. The external electrode includes an inner external electrode covering a portion of the surface of the laminate and including a mixture of a resin component and a metal component and an outer external electrode covering the inner external electrode and including a metal component.

Abstract: There is provided a method of manufacturing a multilayer ceramic electronic component, the method including: preparing a ceramic multilayer body by stacking and sintering ceramic green sheets having internal electrodes formed thereon; determining whether or not a distance d1 from an edge of a side surface of the ceramic multilayer body to the internal electrode exceeds 8.0 ?m; and forming a reinforcing layer on the side surface when the distance d1 ranges from 0.1 ?m to 8.0 ?m.

Abstract: An electronic component manufacturing method includes the steps of preparing at least one electronic component chip having a first surface and a second surface opposite each other; holding the electronic component chip between a first plate and a second plate such that the first surface is in contact with a first elastic layer of the first plate and the second surface is in contact with a second elastic layer of the second plate; and turning the electronic component chip by relatively moving the first and second plates in a planar direction thereof using a planar movement mechanism and moving the first and second plates in accordance with a turning path of the electronic component chip using the planar movement mechanism and a vertical movement mechanism.

Abstract: A metal capacitor with an inner first terminal (e.g., a positive terminal) and an outer second terminal (e.g., a negative terminal) is disclosed herein. In an exemplary design, an apparatus (e.g., an IC chip) includes a first conductive line for a first terminal of a capacitor and at least one conductive line for a second terminal of the capacitor. The at least one conductive line is formed on opposing first and second sides of the first conductive line. Parallel conductive traces are formed transverse to, and on both the first and second sides of, the first conductive line. Additional parallel conductive traces are formed transverse to the at least one conductive line and are interlaced with the parallel conductive traces coupled to the first conductive line. The metal capacitor includes a plurality of unit capacitors formed by the parallel conductive traces coupled to the conductive lines.

Abstract: A capacitor arrangement structure includes: a first wiring pattern; a second wiring pattern; a first electrode pattern that protrudes from the first wiring pattern toward the second wiring pattern; a second electrode pattern that protrudes from the second wiring pattern toward the first wiring pattern so as to run in parallel to the first electrode pattern; and a plurality of capacitors that are arranged in parallel between the first electrode pattern and the second electrode pattern.

Abstract: A method for manufacturing a laminated ceramic electronic component is provided in which a plurality of ceramic green sheets having printed strip inner electrodes patterns, each including a thick portion at a width-direction center and thin portions at respective width-direction sides of the thick portion, are laminated so that the thin portions overlap and the thick portions do not overlap to form an unfired mother laminated body. This unfired mother laminated body is cut along predetermined cut lines that are vertical to each other to obtain a plurality of unfired ceramic element assemblies. By applying ceramic paste to cover exposed portions of inner electrode patterns exposed to lateral surfaces, side gap areas are formed between a first inner electrode pattern and first and second lateral surfaces of the unfired ceramic element assembly and between a second inner electrode pattern and the first and second lateral surfaces.

Abstract: A capacitor with a combined with a resistor and/or fuse is described. This safe capacitor can rapidly discharge through the resistor when shorted. The presence of a fuse in series with the capacitor and results in a resistive failure when this opens during and overcurrent condition. Furthermore, the presence of a resistor in parallel to the capacitor allows the energy to be rapidly dissipated when a failure occurs.

Abstract: Disclosed is an electrochemical capacitor that can be reflow soldered, and wherein film package is used on the capacitor body. The container (20) of the electrochemical capacitor (ECC) stores the film package (11) of the capacitor body (10) within a storage space (SR) such that sealing sections (11a-11c) do not contact the inner surface of the storage space (SR). Inner material (30), which cover the sealing sections (11a-11c) and rear edge of the film package 11 and are adhered to the inner surface of the storage space (SR), affixing the film package (11) within the storage space (SR), are provided in a rectangular framework to the regions in the storage space (SR) of the container (20) that correspond to said sealing sections (11a-11c) and rear edge.

Abstract: Disclosed is a capacitor. The capacitor includes a plurality of capacitor units connected to each other in parallel. The capacitor unit includes a first capacitor, a second capacitor connected to the first capacitor in parallel, and a switch selectively connected to the first capacitor or the second capacitor.

Abstract: Disclosed are methods of making a dielectric on a metal foil, and a method of making a large area capacitor that includes a dielectric on a metal foil. A first dielectric layer is formed over the metal foil by physical vapor deposition, and a dielectric precursor layer is formed over the first dielectric layer by chemical solution deposition. The metal foil, first dielectric layer and dielectric precursor layer are prefired at a prefiring temperature in the range of 350 to 650° C. The prefired dielectric precursor layer, the first dielectric layer and the base metal foil are subsequently fired at a firing temperature in the range of 700 to 1200° C.

Abstract: A multilayer ceramic electronic component includes a ceramic body including dielectric layers stacked in a thickness direction and satisfying T/W>1.0 when a width thereof is W and a thickness thereof is T; first and second internal electrodes; and first and second external electrodes, wherein when the ceramic body is divided into five regions in a width direction and a central region among the five regions is CW1 and regions adjacent to the central region CW1 are CW2 and CW3, a difference between electrode connectivity of the central region CW1 and electrode connectivity of the region CW2 or CW3 satisfies 0.02?(CW2 or CW3)?CW1?0.10.

Abstract: A low capacitance density, high voltage MIM capacitor and the high density MIM capacitor and a method of manufacture are provided. The method includes depositing a plurality of plates and a plurality of dielectric layers interleaved with one another. The method further includes etching a portion of an uppermost plate of the plurality of plates while protecting other portions of the uppermost plate. The protected other portions of the uppermost plate forms a top plate of a first metal-insulator-metal (MIM) capacitor and the etching exposes a top plate of a second MIM capacitor.

Abstract: A method of manufacturing a leadless marker for localizing the position of a target within a patient. According to one embodiment, the method includes providing a ferromagnetic element; positioning a coil of an inductor at least around a portion of the ferromagnetic element, wherein the coil comprises a plurality of windings of a conductor; and positioning the ferromagnetic element such that the radiographic and magnetic centroids of the marker are at least substantially coincident. The marker does not have external electrical lead lines extending through the casing. The ferromagnetic element is at least partially within the inductor. The ferromagnetic element has a volume such that when the marker is in an imaging magnetic field having a field strength of 1.5 T and a gradient of 3 T/m, then the force exerted on the marker by the imaging magnetic field is not greater than gravitational force exerted on the marker.

Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body having first and second side surfaces opposite to each other, and third and fourth end surfaces connecting the first and second side surfaces; a plurality of internal electrodes formed in the ceramic body and having one ends thereof exposed to the third or fourth end surface; and first and second side margin parts formed from the first and second side surfaces to respective edges of the internal electrodes, the first and second side margin parts having an average thickness of 18 ?m or less, wherein when a boundary surface between a cover layer and the first or second side margin part in the ceramic body is divided into two regions in a thickness direction of the ceramic body, a region adjacent to the internal electrode is S1, and a porosity of S1 is P1, 1?P1?20 is satisfied.

Abstract: The embodiments relate to a capacitor device for a conductor loop in a device for the in-situ production of heavy oil and bitumen from oil-sand deposits, characterized by a housing and a capacitor unit arranged therein to compensate for the inductive voltage drop along the conductor loop, wherein there are two connection interfaces, wherein each connection interface is designed for mechanical and electrically conductive connection between the capacitor unit and a conductor element of the conductor loop.

Abstract: The invention relates to a capacitor component having a first integrated capacitor (C1) and an integrated Y capacitor, wherein the Y capacitor has a second capacitor (C2) and a third capacitor (C3), and the second and third capacitor (C2, C3) are connected in series with one another and in parallel with the first capacitor (C1). The invention further relates to a method for producing such a capacitor component.

Abstract: There is provided a multilayer ceramic capacitor including a ceramic body including a plurality of dielectric layers stacked therein, a plurality of first and second internal electrodes disposed in the ceramic body to be alternately exposed to both end surfaces of the ceramic body, and first and second external electrodes formed on the both end surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively, wherein the second internal electrode includes a lead-out portion exposed to one end surface of the ceramic body and a capacitance formation portion overlapped with the first internal electrode, the capacitance formation portion has a length and a width smaller than those of the first internal electrode, and a connection portion connecting the lead-out portion and the capacitance formation portion of the second internal electrode to each other is forced to have a bottleneck shape.

Abstract: Methods for making feedthrough assemblies including a capacitive filter array are disclosed. Methods disclosed include attaching a perimeter wall of the capacitor filter array to an interior wall of a ferrule, depositing a thick film conductive paste within at least one passageway to form a conductive pathway, and heating the ferrule, capacitor filter array and the thick film conductive paste to convert the paste to a relatively solid material.

Abstract: A planar capacitor includes, in part, a first metal line forming spiral-shaped loops around one of its end point, and a second metal line forming spiral-shaped loops between the loops of the first metal line. The first and second metal lines are coplanar, formed on an insulating layer, and form the first and second plates of the planar capacitor. The planar capacitor may be used to form a filter. Such a filter includes a first metal line forming first spiral-shaped loops, a second metal line forming second spiral-shaped loops, and a third metal line—coplanar with the first and second metal lines—forming loops between the loops of the first and second metal lines. The filter further includes a first inductor coupled between the first and third metal lines, and a second inductor coupled between the second and third metal lines.

Abstract: Systems and methods for providing input component assemblies for dome switches are provided. In some embodiments, an input component assembly may include a contact area coupled to a circuit board for a switch, a conductive covering for enclosing the circuit board, and a dome positioned over the conductive covering, where the dome is operative to close at least one circuit of the switch when the dome is depressed towards the conductive covering.

Abstract: Methods of fabricating an array capacitor are disclosed, in which via structures of the array capacitor have increased uniformity in their transverse areas. One method involves perforating a capacitor body to form first holes extending from a first surface and partially through the capacitor body. The capacitor body may be further perforated to form second holes extending from a second opposed surface of the capacitor body. The second holes are to connect to the first holes to provide through holes extending across a thickness of the capacitor body. An appropriate conductive material may then be filled in the through holes to form via structures with increased uniformity in their transverse areas.

Abstract: A low-inductance capacitor assembly (12) is provided. The capacitor assembly (12) includes a positive terminal plate (16), a negative terminal plate (18) and an array (20) of capacitors (22) disposed between and electrically coupled to the positive terminal plate (16) and the negative terminal plate (18). A passage (30) extends through the positive terminal plate (16), the negative terminal plate (18) and through a void (35) formed within the array (20) of capacitors (22). The passage (30) may allow routing of a conductor (14) through the capacitor assembly (12).

Abstract: In accordance with the present disclosure, one embodiment of a fractal variable capacitor comprises a capacitor body in a microelectromechanical system (MEMS) structure, wherein the capacitor body has an upper first metal plate with a fractal shape separated by a vertical distance from a lower first metal plate with a complementary fractal shape; and a substrate above which the capacitor body is suspended.

Abstract: A capacitor includes a sealing member that includes a valve installation part, the valve installation part being higher than a processed sealing part of an outer packaging case for housing a capacitor element; and a pressure valve that is installed in a through hole of the valve installation part and whose valve function part is set at a position, the position being higher than the processed sealing part.

Abstract: A method for fabricating a dynamic random access memory (DRAM) capacitor stack is disclosed wherein the stack includes a first electrode, a dielectric layer, and a second electrode. The first electrode is formed from a conductive binary metal compound and the conductive binary metal compound is annealed in a reducing atmosphere to promote the formation of a desired crystal structure. The binary metal compound may be a metal oxide. Annealing the metal oxide (i.e. molybdenum oxide) in a reducing atmosphere may result in the formation of a first electrode material (i.e. MoO2) with a rutile-phase crystal structure. This facilitates the formation of the rutile-phase crystal structure when TiO2 is used as the dielectric layer. The rutile-phase of TiO2 has a higher k value than the other possible crystal structures of TiO2 resulting in improved performance of the DRAM capacitor.