Electric Condenser Making Patents (Class 29/25.41)
  • Publication number: 20130301187
    Abstract: Semiconductor devices and methods of manufacture thereof are disclosed. In a preferred embodiment, a capacitor plate includes a first propeller-shaped portion and a second propeller-shaped portion. A via portion is disposed between the first propeller-shaped portion and the second propeller-shaped portion.
    Type: Application
    Filed: July 12, 2013
    Publication date: November 14, 2013
    Inventors: Sun-Oo Kim, Yoon-Hae Kim
  • Publication number: 20130292167
    Abstract: An electrical component includes a first electrode layer, an organic insulating layer, which is arranged on the first electrode layer in a monolayer, an organic dielectric layer arranged on the organic insulating layer, and a second electrode layer, which is arranged on the dielectric layer. The electrical component is arranged on a circuit board substrate, a prepreg or a circuit board. The dielectric layer is formed from an ionic liquid, preferably in a polymer matrix.
    Type: Application
    Filed: December 8, 2011
    Publication date: November 7, 2013
    Applicant: Siemens Aktiengesellschaft
    Inventors: Günter Schmid, Dan Taroata
  • Patent number: 8572824
    Abstract: A method for manufacturing a quartz crystal unit comprises disposing a metal film on a surface of a quartz crystal wafer, disposing a resist on the metal film, forming a tuning fork shape pattern on the surface, etching the quartz crystal wafer to form a quartz crystal tuning fork shape having a base and first and second tines, forming electrodes on opposite side surfaces of the first and second tines so that the electrode of the first tine has an electrical polarity opposite to an electrical polarity of the electrode of the second tine to form a quartz crystal tuning fork resonator that vibrates in a flexural mode of an inverse phase, removing the resist before forming the electrodes, mounting the tuning fork resonator on a mounting portion of the case, disposing a metal or a glass into a through-hole of the case, and adjusting an oscillation frequency of the tuning fork resonator.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: November 5, 2013
    Assignee: Piedek Technical Laboratory
    Inventor: Hirofumi Kawashima
  • Publication number: 20130286538
    Abstract: There are provided a multilayer ceramic electronic component and a manufacturing method thereof, the multilayer ceramic electronic component including: a ceramic body including dielectric layers; a plurality of internal electrodes facing each other with the dielectric layer interposed therebetween; and external electrodes electrically connected to the internal electrodes, wherein a thickness to of the internal electrode satisfies 0.1 ?m?Te?0.5 ?m, and when, in a cross-section of the ceramic body taken in length and thickness directions, cut through a central portion of the ceramic body in a width direction, a distance, in the length direction, of a central portion of an internal electrode grain closest to a disconnected portion of the internal electrode is denoted by Tc, and a distance, in the length direction, of the internal electrode grain at a point equal to 25% of the thickness thereof above or below the central portion thereof is denoted by Tl, 0.7?Tl/Tc?1.3 is satisfied.
    Type: Application
    Filed: September 14, 2012
    Publication date: October 31, 2013
    Inventors: Jong Han KIM, Jae Man Park
  • Publication number: 20130279079
    Abstract: The present invention relates to a method for manufacturing an electrolytic capacitor which includes the following steps: a) providing an electrode body made of an electrode material, wherein a dielectric at least partially covers a surface of this electrode material to obtain an anode body; b) introducing a dispersion, which contains particles of an electrically conductive polymer with a particle size (d50) of 70 nm and less and a dispersing agent, into at least a part of the anode body; c) at least partial removing the dispersing agent to obtain a capacitor body; d) introducing into the capacitor body, a polyalkylene glycol or a polyalkylene glycol derivative or a combination of at least two thereof as an impregnating agent. The invention also relates to an electrolytic capacitor manufactured with this method, the use of an electrolytic capacitor and electronic circuits.
    Type: Application
    Filed: September 30, 2011
    Publication date: October 24, 2013
    Applicant: HERAEUS PRECIOUS METALS GMBH & CO. KG
    Inventors: Udo Merker, Katrin Asteman, Matthias Intelmann, Armin Sautter
  • Publication number: 20130279075
    Abstract: An asymmetric supercapacitor is described. The supercapacitor includes a first electrode, a second electrode, a thin film separator, and an electrolyte. The first electrode comprises functionalized cellulose fiber and the second electrode comprises functionalized cellulose fiber and metal oxide.
    Type: Application
    Filed: April 19, 2013
    Publication date: October 24, 2013
    Applicant: University of South Carolina
    Inventor: Xiaodong Li
  • Patent number: 8561271
    Abstract: A method for making a capacitor having improved capacitance efficiency which results from increasing the effective area of an electrode surface is disclosed. Specifically, an improved “three-dimensional” capacitor may be constructed with electrode layers having three-dimensional aspects at the point of interface with a dielectric such that portions of the electrode extend into the dielectric layer. Advantageously, embodiments of a three-dimensional capacitor drastically reduce the space footprint that is required in a circuit to accommodate the capacitor, when compared to current capacitor designs. Increased capacitance density may be realized without using high k (high constant) dielectric materials, additional “electrode-dielectric-electrode” arrangements in an ever increasing stack, or serially stringing together multiple capacitors.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: October 22, 2013
    Inventors: Liang Chai, Alan Rae, James M Wison
  • Patent number: 8555474
    Abstract: A method of manufacturing a capacitor includes: anodizing a metal substrate in two stages by applying two different voltage so as to make first and second holes having different pitches, distributed randomly in an oxide substance; filling the first and second holes with an electrode material, respectively, to form first and second electrodes; connecting the first electrodes to a conductive layer formed on one surface of the oxide substance; and connecting the second electrodes to another conductive layer formed on another surface of the oxide substance.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: October 15, 2013
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Hidetoshi Masuda, Taisei Irieda, Masaru Kurosawa, Kotaro Mizuno
  • Patent number: 8537521
    Abstract: An electronic device includes a plurality of internal electrode layers and dielectric layers alternately laminated. The particle size of the first dielectric particles contacting one laminating direction end face of the internal electrode layer is larger than the particle size of second dielectric particles contacting another laminating direction end face of the internal electrode layer. A thickness of a first ceramic layer formed by the first dielectric particles is smaller than a thickness of a second ceramic layer formed by the second dielectric particles.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: September 17, 2013
    Assignee: TDK Corporation
    Inventors: Norihisa Ando, Yoshitomo Matsushita
  • Patent number: 8528175
    Abstract: Some embodiments include methods of forming capacitors. A metal oxide mixture may be formed over a first capacitor electrode. The metal oxide mixture may have a continuous concentration gradient of a second component relative to a first component. The continuous concentration gradient may correspond to a decreasing concentration of the second component as a distance from the first capacitor electrode increases. The first component may be selected from the group consisting of zirconium oxide, hafnium oxide and mixtures thereof; and the second component may be selected from the group consisting of niobium oxide, titanium oxide, strontium oxide and mixtures thereof. A second capacitor electrode may be formed over the first capacitor electrode. Some embodiments include capacitors that contain at least one metal oxide mixture having a continuous concentration gradient of the above-described second component relative to the above-described first component.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: September 10, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Vassil Antonov, Vishwanath Bhat, Chris M. Carlson
  • Publication number: 20130219679
    Abstract: A method of making a transparent touch-responsive capacitor apparatus includes providing a transparent substrate having a material layer formed over the transparent substrate; pattern-wise defining electrically connected first micro-wires over the transparent substrate in a plurality of first transparent conductor areas in the materials layer; pattern-wise defining electrically connected second micro-wires over the transparent substrate in a plurality of second transparent conductor areas spaced apart from the first transparent conductor areas in the material layer, the first micro-wires electrically connected to the second micro-wires; and wherein the height of at least a portion of the first micro-wires is greater than the height of at least a portion of the second micro-wires and the total area occupied by the first micro-wires is less than 15% of the first transparent conductor area and the total area occupied by the second micro-wires is less than 15% of the second transparent conductor area.
    Type: Application
    Filed: February 28, 2012
    Publication date: August 29, 2013
    Inventor: Ronald Steven Cok
  • Publication number: 20130215553
    Abstract: A system and method for sealing a capacitor bottom in a filtered feedthrough. The feedthrough comprises a ferrule, a capacitor, at least one terminal pin and a support structure. The support structure includes at least one projection that extends into an aperture of the capacitor. The projection includes an opening through which the at least one terminal pin extends such that, in an assembled state, the terminal pin extends through the opening of the projection and the aperture of the capacitor.
    Type: Application
    Filed: February 12, 2013
    Publication date: August 22, 2013
    Applicant: MEDTRONIC, INC.
    Inventor: Medtronic, Inc.
  • Publication number: 20130208398
    Abstract: A rectangular or substantially rectangular parallelepiped chip including first and second end surfaces and first and second side surfaces is produced by cutting a mother block along a first direction in a portion where, of conductive layers that are adjacent to each other in a stacking direction, a first one is present and a second one is not present and cutting of the mother block along a second direction in a portion where, of the conductive layers that are adjacent to each other in the stacking direction, the second one is present and the first one is not present. A first internal electrode formed from the first conductive layer is exposed at the first end and side surfaces and not exposed at either of the second end and side surfaces. A second internal electrode formed from the second conductive layer is exposed at the second end and side surfaces and not exposed at either of the first end and side surfaces.
    Type: Application
    Filed: February 12, 2013
    Publication date: August 15, 2013
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Murata Manufacturing Co., Ltd.
  • Publication number: 20130207730
    Abstract: Disclosed is an impedance matching circuit capable of wideband matching. The impedance matching circuit includes: a first variable inductor unit of which one end is connected to the first node and an inductance value varies; a second inductor unit connected between the first node and a second node and having a variable inductance value; a first variable capacitor unit of which one end is connected to the first node and a capacitance value varies; and a second variable capacitor unit of which one end is connected to the second node and a capacitance value varies, and the other end of the first variable capacitor unit and the other end of the second variable capacitor unit are connected to a ground voltage terminal to perform the impedance matching between a circuit connected to the other end of the first variable inductor unit and a circuit connected to the second node.
    Type: Application
    Filed: January 17, 2013
    Publication date: August 15, 2013
    Applicant: Electronics and Telecommunications Research Institute
    Inventor: Electronics and Telecommunications Research Institute
  • Patent number: 8499426
    Abstract: An apparatus including a first electrode; a second electrode; a first and second ceramic material disposed between the first electrode and the second electrode, the second ceramic material having a greater electrical conductivity than the first ceramic material. A method including forming a first ceramic material film and a different second ceramic material film on a first electrode; and forming a second electrode on the second ceramic material film to form a capacitor structure having the first ceramic material film and the second ceramic material film disposed between the first electrode and the second electrode, wherein the first ceramic material has a conductivity selected to dampen undesired oscillations in electrical device operation to which the capacitor structure may be exposed. An apparatus including a first electrode; a second electrode; and a composite dielectric including a plurality of dielectric films including a different Curie temperature.
    Type: Grant
    Filed: July 7, 2008
    Date of Patent: August 6, 2013
    Assignee: Intel Corporation
    Inventor: Cengiz A. Palanduz
  • Publication number: 20130194712
    Abstract: Multiple wound film capacitors include a hollow core formed by a first non-conducting tubular section, and a first capacitor winding wrapped around the first non-conducting tubular section. Also included are a second non-conducting tubular section wrapped around the first capacitor winding, and a second capacitor winding wrapped around the second non-conducting tubular section. The multiple wound film capacitors may also include a third non-conducting tubular section wrapped around the second capacitor winding, and a third capacitor winding wrapped around the third non-conducting tubular section. In addition, ends of the first and second non-conducting tubular sections extend beyond ends of the first and second capacitor windings.
    Type: Application
    Filed: January 31, 2012
    Publication date: August 1, 2013
    Applicant: ELECTRONIC CONCEPTS, INC.
    Inventors: BERNARD LAVENE, David CURTO
  • Publication number: 20130182368
    Abstract: There is provided a multilayer ceramic electronic component including: a ceramic main body; a plurality of internal electrodes; and external electrodes formed on outer surfaces of the ceramic main body and electrically connected to the internal electrodes, wherein an average thickness of the external electrodes is 10 ?m or less, and when a thickness of the external electrodes in a central portion of the ceramic main body in a thickness direction is Tc and a thickness of the external electrodes at a point spaced apart from a central portion of a capacitance formation region in a thickness direction by a distance equal to 25% of a thickness (S) of the capacitance formation region is T1, 0.8?|T1/Tc|?1.0 is satisfied.
    Type: Application
    Filed: September 14, 2012
    Publication date: July 18, 2013
    Inventors: Byung Jun JEON, Kyu Ha Lee, Hyun Hee Gu, Chang Hoon Kim, Myung Jun Park
  • Patent number: 8484815
    Abstract: A method for manufacturing a laminated electronic component including an electronic component main body including laminated functional layers, internal conductors which are disposed inside the electronic component main body and a portion of which are exposed portions exposed at outer surfaces of the electronic component main body, and external terminal electrodes disposed on the outer surfaces of the electronic component main body so as to connect to the internal conductors and cover the exposed portions of the internal conductors includes the step of forming a substrate plating film having an average particle diameter of metal particles of at least about 1.0 ?m on the outer surface of the electronic component main body through direct plating so as to cover the exposed portions of the internal conductors in the formation of the external terminal electrodes on the electronic component main body.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: July 16, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Shunsuke Takeuchi, Kenichi Kawasaki, Akihiro Motoki, Makoto Ogawa, Toshiyuki Iwanaga
  • Patent number: 8481106
    Abstract: A method of fabrication of high-k paraelectric metal oxide films at low temperatures utilizing ordered mesoporous metal oxide thin films synthesized by organic templating methodology. The process consisting of (a) chemical solution deposition of periodic ordered mesoporous structures containing high-k metal oxide films, (b) removal of organic template additives, (c) infiltration of the pores with an appropriate second phase, and (d) low temperature thermal and/or annealing of infiltrated films.
    Type: Grant
    Filed: March 6, 2008
    Date of Patent: July 9, 2013
    Assignee: SBA Materials, Inc.
    Inventors: Shyama P. Mukherjee, Mark L. F. Phillips, Travis P. S. Thoms
  • Patent number: 8475866
    Abstract: A method for manufacturing a ceramic electronic component capable of preventing degradation of the self alignment property and product characteristics due to absorption of flux into pores of a ceramic element assembly during soldering in mounting and a ceramic electronic component. In the method, a ceramic element assembly is subjected to an oil-repellent treatment by using an oil-repellent agent containing a polyfluoropolyether compound as a primary component and hydrofluoroether as a solvent, so as to avoid absorption of the flux by the ceramic element assembly.
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: July 2, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Tatsuya Mizuno, Masaharu Konoue, Hiroki Hashimoto, Mitsuru Ueda
  • Patent number: 8468664
    Abstract: An EMI filtered terminal assembly including at least one conductive terminal pin, a feedthrough capacitor, and a counter-bore associated with a passageway through the capacitor is described. Preferably, the feedthrough capacitor having counter-drilled or counter-bored holes on its top side is first bonded to a hermetic insulator. The counter-drilled or counter-bore holes in the capacitor provide greater volume for the electro-mechanical attachment between the capacitor and the terminal pin or lead wire, permitting robotic dispensing of, for example, thermal-setting conductive adhesive.
    Type: Grant
    Filed: May 7, 2009
    Date of Patent: June 25, 2013
    Assignee: Greatbatch Ltd.
    Inventors: Richard L. Brendel, Jason Woods, Jose Luis Lorente-Adame, Robert A. Stevenson, John Roberts, Buehl E. Truex
  • Publication number: 20130155582
    Abstract: An improved capacitor and method of making an improved capacitor is set forth. The capacitor has planer anodes with each anode comprising a fusion end and a separated end and the anodes are in parallel arrangement with each anode in direct electrical contact with all adjacent anodes at the fusion end. A dielectric is on the said separated end of each anode wherein the dielectric covers at least an active area of the capacitor. Spacers separate adjacent dielectrics and the interstitial space between the adjacent dielectrics and spacers has a conductive material in therein.
    Type: Application
    Filed: December 14, 2011
    Publication date: June 20, 2013
    Applicant: Kemet Electronics Corporation
    Inventors: Liancai Ning, Chris Stolarski, Qun Ya
  • Publication number: 20130152351
    Abstract: A method for producing a laminated ceramic capacitor allows a surface of at least a portion of a ceramic element body chip to be brought into contact with a plated layer formed in advance in a mold member, and performs heat processing on the ceramic element body chip in that contact state, thereby to form an external conductor layer made of the plated layer on the surface of at least the portion of the ceramic element body chip. Thus, a method and an apparatus for producing a ceramic electronic component accurately and precisely controls the thickness of the external conductor layer to be small, and easily controls the length of the external conductor layer.
    Type: Application
    Filed: February 15, 2013
    Publication date: June 20, 2013
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Murata Manufacturing Co., Ltd.
  • Patent number: 8465555
    Abstract: The present subject matter includes a method of producing an apparatus for use in a patient, the method including etching an anode foil, anodizing the anode foil, assembling the anode foil, at least one cathode foil and one or more separators into a capacitor stack adapted to deliver from about 5.3 joules per cubic centimeter of capacitor stack volume to about 6.3 joules per cubic centimeter of capacitor stack volume at a voltage of between about 465 volts to about 620 volts, inserting the stack into a capacitor case, inserting the capacitor case into a device housing adapted for implant in a patient, connecting the capacitor to a component and sealing the device housing.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: June 18, 2013
    Assignee: Cardiac Pacemakers, Inc.
    Inventor: Gregory J. Sherwood
  • Publication number: 20130141841
    Abstract: A wet electrolytic capacitor is provided. The capacitor contains an anode comprising an anodically oxidized pellet formed from a pressed and sintered powder, a cathode that contains a metal substrate coated with a conductive polymer, and a working electrolyte in communication with the anode and the cathode. The working electrolyte is in the form of a gel and comprises an ammonium salt of an organic acid, inorganic oxide particles, an acid, and a solvent system that comprises water. The working electrolyte has a pH value of from about 5.0 to about 8.0.
    Type: Application
    Filed: November 27, 2012
    Publication date: June 6, 2013
    Applicant: AVX CORPORATION
    Inventor: AVX CORPORATION
  • Publication number: 20130141834
    Abstract: The present disclosure is directed to a device and a method for achieving a precise capacitance of a capacitor. The method includes trimming a first capacitance of the capacitor to a second capacitance, the capacitor having a first conductive layer separated from a second conductive layer by a dielectric layer. Changing a first dielectric constant of the dielectric layer to a second dielectric constant, where the first dielectric constant corresponding to the first capacitance and the second dielectric constant corresponding to the second dielectric constant includes heating the dielectric layer above a threshold temperature for a time period. The heat is provided by either one of the plates of the capacitor or from a separate heater.
    Type: Application
    Filed: December 2, 2011
    Publication date: June 6, 2013
    Applicant: STMicroelectronics Pte Ltd.
    Inventors: Olivier Le Neel, Ravi Shankar
  • Publication number: 20130141850
    Abstract: An object of the invention is to provide a capacitor device that can be made slimmer and lighter and that enables the strength and heat dissipation properties to be improved. A capacitor device (1) has a plurality of capacitor units (2) integrally housed within a housing case (3), the housing case (3) having cylindrical housing sections (5) for housing the capacitor bodies. The housing sections (5) are longitudinally aligned in the same direction and are joined together as an integrated whole. A capacitor unit (2) is inserted via an opening (9) at one end of each of the housing sections (5) so that the entire circumference of the capacitor unit (2) is covered by the corresponding housing section (5). The housing sections (5) have a uniform thickness at least on the outer side along the outer periphery of the capacitor units.
    Type: Application
    Filed: July 20, 2011
    Publication date: June 6, 2013
    Applicant: NIppon Chemi-Con Corporation
    Inventors: Ikufumi Honda, Nobukatsu Abe, Tsubasa Abe
  • Publication number: 20130143108
    Abstract: In one embodiment, a cap for an energy storage cell is provided, the cap including: a body including a dome formed therein, the dome including a through-way; and, an electrode assembly including a hemispherically shaped electrical insulator surrounding an electrode; wherein the insulator is disposed in and hermetically seals the dome and the electrode is electrically separated from the body by the throughway. A method of manufacture and an energy storage cell are also disclosed.
    Type: Application
    Filed: November 19, 2012
    Publication date: June 6, 2013
    Inventor: James Epstein
  • Publication number: 20130142089
    Abstract: An embodiment radio frequency MicroElectroMechanical (RF-MEMS) tunable bandpass filter includes one or more tunable resonators, each of which includes an electrically reconfigurable capacitor bank, a tuning screw, and a resonating structure. In an embodiment, the capacitor bank includes fixed value capacitors and switches to vary the capacitance of the resonator. In an embodiment, the capacitor bank includes variable capacitors and direct current (DC) bias circuits to vary the capacitance of the resonator. The filter may be incorporated into a time division duplexing (TDD) base station or other wireless communications device.
    Type: Application
    Filed: February 21, 2012
    Publication date: June 6, 2013
    Applicant: FUTUREWEI TECHNOLOGIES, INC.
    Inventors: Siamak Fouladi Azarnaminy, Fengxi Huang, Dong Yan, Raafat Mansour
  • Patent number: 8448313
    Abstract: Provided is a method for producing a ceramic body, which is capable of preventing the ingress of moisture into a void between a conductor and the ceramic body more effectively in the ceramic body including the conductor therein. Ingress of a supercritical fluid containing an oxide sol precursor is achieved into a void between an internal electrode layer and a ceramic laminate. After that, the oxide sol is turned into a gel, and subjected to a heat treatment, thereby filling the void between the internal electrode layer and the ceramic laminate with an oxide.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: May 28, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Tatsuo Kunishi, Junichi Saito, Yoshinori Ueda, Akihiro Motoki
  • Patent number: 8443498
    Abstract: The present invention carries out the vacuum deposition by setting a deposition angle between a single mask set including a shadow mask having a plurality of slits and a deposition source to form a lower terminal layer, a dielectric layer, an inner electrode layer, and an upper terminal layer at once under a vacuum state generated once, or adjusts slit patterns by relatively moving upper and lower mask sets that respectively include shadow masks having a plurality of slits and face each other to form a lower terminal layer, a dielectric layer, an inner electrode layer, and an upper terminal layer at once under a vacuum state generated once.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: May 21, 2013
    Assignee: Sehyang Industrial Co., Ltd.
    Inventor: Jae-Ho Ha
  • Publication number: 20130111720
    Abstract: A method of manufacturing a solid electrolytic capacitor includes steps (a) to (d). The step (a) forms at least two punched apertures in a metal plate, thereby forming a rung section between adjacent two of the punched apertures, the rung section having surfaces as a pair appearing as a result of formation of the punched apertures. The step (b) cuts the rung section out of the metal plate to form a pad member, the length of the rung section corresponding to a distance between the surfaces being determined to be the height of the pad member. The step (c) mounts the pad member on an anode terminal such that one of the surfaces faces the anode terminal. The step (d) electrically connects an anode section of a capacitor element to the other of the surfaces and electrically connects a cathode section of the capacitor element to the cathode terminal.
    Type: Application
    Filed: December 28, 2012
    Publication date: May 9, 2013
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventor: SANYO ELECTRIC CO., LTD.
  • Publication number: 20130113074
    Abstract: A capacitor system and a method for producing a capacitor system. The capacitor system may be used in a power semiconductor module. In one embodiment, the capacitor system comprises a metal shaped body having a depression; a capacitor arranged at least partly in the depression; a spacer composed of electrically insulating material, the spacer being arranged at least partly between the capacitor and the metal shaped body in the depression; and an electrically insulating potting material provided in the depression, wherein the potting material fixes the capacitor in the depression so that the capacitor does not touch the metal shaped body.
    Type: Application
    Filed: November 7, 2011
    Publication date: May 9, 2013
    Applicant: Semikron Elektronik GmbH & Ko. KG
    Inventors: Frank Ebersberger, Peter Beckedahl, Hartmut Kulas, Peter Schott
  • Publication number: 20130107419
    Abstract: A capacitor with improved lead frame attachment is described wherein the improved lead frame attachment mitigates defects. The capacitor comprises parallel conductive internal electrodes of alternating polarity with a dielectric between the conductive internal electrodes. A first copper undercoat is in electrical contact with the conductive internal electrodes of a first polarity and a second copper undercoat is in electrical contact with conductive internal electrodes of a second polarity. A first lead is in electrical contact with the first copper undercoat with a first solder between the first lead and the first copper undercoat. A second lead is in electrical contact with the second copper undercoat with a second solder between the second lead and the second copper undercoat.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 2, 2013
    Applicant: KEMET ELECTRONICS CORPORATION
    Inventors: R. Allen Hill, Philip M. Lessner, Reggie Phillips, Keith Brown, James B. Byrd
  • Publication number: 20130100065
    Abstract: This disclosure provides systems, methods and apparatus for electromechanical systems variable capacitance devices. In one aspect, an electromechanical systems variable capacitance device includes a substrate with a bottom bias electrode on the substrate. A first radio frequency electrode above the bottom bias electrode defines a first air gap. A non-planarized first dielectric layer is between the bottom bias electrode and the first radio frequency electrode. A metal layer above the first radio frequency electrode defines a second air gap. The metal layer includes a top bias electrode and a second radio frequency electrode.
    Type: Application
    Filed: October 21, 2011
    Publication date: April 25, 2013
    Applicant: QUALCOMM MEMS TECHNOLOGIES, INC.
    Inventors: Daniel FELNHOFER, Wenyue ZHANG, Je-Hsuing LAN
  • Patent number: 8424176
    Abstract: The present invention relates to methods of making and using tunable capacitors and devices. Using the methods described, one or more secondary tunable capacitors can be connected to a primary capacitor by printing a connector conducting layer or feature to obtain a desired net capacitance. Digitally printing the connector conducting layer allows the number of secondary capacitors connected into the circuit to be determined during the integrated circuit fabrication process, without the need for individual masks connecting the appropriate number of secondary capacitors. This provides an in-process or post-process trimming method to obtain the desired precision and accuracy for capacitors. Various sizes and combinations of secondary capacitors can be connected to obtain high precision capacitors and/or improved matching of capacitance values.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: April 23, 2013
    Assignee: Kovio, Inc.
    Inventors: Patrick Smith, Zhigang Wang
  • Patent number: 8424177
    Abstract: A method of forming a metal-insulator-metal capacitor having top and bottom plates separated by a dielectric layer, one of the top and bottom plates having at least one protrusion extending into a corresponding cavity in the other of the top and bottom plates, the method including the steps of growing one or more nanofibers on a base surface.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: April 23, 2013
    Assignees: STMicroelectronics (Crolles 2) SAS, NXP B.V. (Dutch Corporation)
    Inventors: Alexis Farcy, Maryline Thomas, Joaquin Torres, Sonarith Chhun, Laurent-Georges Gosset
  • Patent number: 8407871
    Abstract: A method that employs a novel combination of conventional fabrication techniques provides a ceramic short-resistant capacitor that is bendable and/or shapeable to provide a multiple layer capacitor that is extremely compact and amenable to desirable geometries. The method allows thinner and more flexible ceramic capacitors to be made. The method includes forming a first thin metal layer on a substrate; depositing a thin, ceramic dielectric layer over the metal layer; depositing a second thin metal layer over the dielectric layer to form a capacitor exhibiting a benign failure mode; and separating the capacitor from the substrate. The method may also include bending the resulting capacitor into a serpentine arrangement with gaps between the layers that allow venting of evaporated electrode material in the event of a benign failure.
    Type: Grant
    Filed: July 6, 2009
    Date of Patent: April 2, 2013
    Assignee: Delphi Technologies, Inc.
    Inventors: Ralph S. Taylor, John D. Myers, William J. Baney
  • Publication number: 20130063165
    Abstract: A capacitive sensor system and method resistant to electromagnetic interference is disclosed. The system includes a capacitive core, differential amplifier with inverting and non-inverting inputs, capacitive paths, and chopping system. Core can include inputs and outputs coupled to variable capacitors, and common nodes coupling variable capacitors. Capacitive paths couple core outputs to amplifier inputs. When chopping system is high, one polarity voltage is applied to core inputs, a first core output is coupled to the inverting input and a second core output is coupled to the non-inverting input. When the chopping system is low, opposite polarity voltage is applied to core inputs, and core output to amplifier input couplings are flipped. Capacitive paths can include bond wires. Chopping system can be varied between high and low at frequencies that smear noise away from a frequency band of interest, or that smear noise substantially evenly across a wide frequency range.
    Type: Application
    Filed: September 13, 2011
    Publication date: March 14, 2013
    Applicant: Robert Bosch GmbH
    Inventors: Ganesh Balachandran, Vladimir Petkov
  • Publication number: 20130063861
    Abstract: An interdigitated capacitor having digits of varying width is disclosed. One embodiment of a capacitor includes a first plurality of conductive digits and a second plurality of conductive digits positioned in an interlocking manner with the first plurality of conductive digits, such that an interdigitated structure is formed. The first plurality of conductive digits and the second plurality of conductive digits collectively form a set of digits, where the width of a first digit in the set of digits is non-uniform with respect to a second digit in the set of digits.
    Type: Application
    Filed: September 9, 2011
    Publication date: March 14, 2013
    Applicant: XILINX, INC.
    Inventors: Zhaoyin D. Wu, Parag Upadhyaya, Xuewen Jiang
  • Patent number: 8395053
    Abstract: A circuit system comprising: forming a lower electrode over a substrate; forming a resistive film over the lower electrode; forming a multi-layered insulating stack over a portion of the resistive film; and forming an upper electrode over a portion of the multi-layered insulating stack.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: March 12, 2013
    Assignee: Stats Chippac Ltd.
    Inventors: Yaojian Lin, Haijing Cao, Qing Zhang
  • Patent number: 8393077
    Abstract: A method for fabrication of passive electronic components includes disposing a sacrificial layer on a carrier and forming a curable resin layer on top of the sacrificial layer and patterning the curable resin to form a cured resin template having multiple pattern levels. A metal material is deposited into the first pattern level to form a first structure. A dielectric material is then formed on exposed portions of the first structure. A nonselective subtractive process is used to expose the sacrificial layer in a bottom of the second pattern level and metal material is deposited into the second pattern level and built up to include a portion which crosses over the dielectric material.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: March 12, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Lorraine Byrne, Kevin Dooley, David Fitzpatrick
  • Publication number: 20130058003
    Abstract: A feedthrough assembly may include a ferrule defining a ferrule opening, a feedthrough at least partially disposed within the ferrule opening, and a capacitive filter array at least partially disposed within the ferrule opening. The feedthrough may include at least one feedthrough conductive pathway and the capacitive filter array may include at least one filter array conductive pathway. In some examples, the feedthrough assembly includes a thick film conductive paste electrically connecting the at least one feedthrough conductive pathway and the at least one filter array conductive pathway. In some examples, the capacitive feedthrough array includes a perimeter conductive contact and a capacitive filter electrically coupling the at least one filter array conductive pathway and the perimeter conductive contact. In some of these examples, the feedthrough assembly includes a thick film conductive paste electrically connecting the perimeter conductive contact and the ferrule.
    Type: Application
    Filed: November 30, 2011
    Publication date: March 7, 2013
    Applicant: MEDTRONIC, INC.
    Inventors: Rajesh V. Iyer, Simon E. Goldman, Thomas P. Miltich
  • Publication number: 20130051126
    Abstract: Capacitors, apparatus including a capacitor, and methods for forming a capacitor are provided. One such capacitor may include a first conductor a second conductor above the first conductor, and a dielectric between the first conductor and the second conductor. The dielectric does not cover a portion of the first conductor; and the second conductor does not cover the portion of the first conductor not covered by the dielectric.
    Type: Application
    Filed: August 22, 2011
    Publication date: February 28, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Tae Heui Kwong
  • Publication number: 20130049527
    Abstract: The present invention provides a technology for decreasing a dispersion of the performance among electromechanical transducers each having through wiring. A method for manufacturing an electromechanical transducer includes: obtaining a structure in which an insulative portion having a through hole therein is bonded onto an electroconductive substrate; filling the through hole with an electroconductive material to form a through wiring which is electrically connected with the electroconductive substrate; and using the electroconductive substrate as a first electrode, forming a plurality of vibrating membrane portions including a second electrode, which opposes to the first electrode through a plurality of gaps, on an opposite side of the first electrode to the side having the insulative portion, to thereby forming a plurality of cells.
    Type: Application
    Filed: August 16, 2012
    Publication date: February 28, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Yoshihiro Hasegawa, Yasuyoshi Takai
  • Patent number: 8383195
    Abstract: In a production method for a laminated electronic component, a ceramic base body is formed by stacking a plurality of ceramic layers, and internal electrodes are formed in the ceramic base body. Lead-out portions of the internal electrodes are exposed from side surfaces of the ceramic base body. Belt-shaped external terminal electrodes are formed on the side surfaces by plating so as to be electrically connected to the exposed portions of the internal electrodes. The distance from an end surface to an external terminal electrode closest to the end surface in the ceramic base body is measured. When the measured distance does not correspond to a predetermined reference value, the ceramic base body is removed as being defective.
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: February 26, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Atsushi Sakanaka
  • Patent number: 8375539
    Abstract: A method of manufacturing a low capacitance density, high voltage MIM capacitor and the high density MIM capacitor. The method includes depositing a plurality of plates and a plurality of dielectric layers interleaved with one another. The method further includes etching a portion of an uppermost plate of the plurality of plates while protecting other portions of the uppermost plate. The protected other portions of the uppermost plate forms a top plate of a first metal-insulator-metal (MIM) capacitor and the etching exposes a top plate of a second MIM capacitor.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: February 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: James Stuart Dunn, Zhong-Xiang He, Anthony K. Stamper
  • Publication number: 20130038562
    Abstract: A capacitive touch panel and operating and fabrication methods thereof. The capacitive touch panel has a plurality of transmitter electrodes and a plurality of receiver electrodes. An electric field is formed by the receiver electrodes and the powered one of the transmitter electrodes. The changes, caused by the touch of a user, in the electric field are used in touch recognition. The receiver electrodes are all in a fork shape. For one receiver electrode, the teeth are spaced in a first distance. Note that adjacent teeth from different and adjacent electrodes are spaced apart by another distance. The second distance is greater than the first distance.
    Type: Application
    Filed: August 9, 2011
    Publication date: February 14, 2013
    Applicant: HTC CORPORATION
    Inventors: Te-Mu CHEN, Hsin-Hao LEE
  • Patent number: 8358793
    Abstract: A microphone is formed to have a diaphragm that is configured to improve signal to noise ratio. To that end, the microphone has a backplate having a hole therethrough, and a diaphragm movably coupled with the backplate. The diaphragm has a bottom surface (facing the backplate) with a convex portion aligned with the hole in the backplate.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: January 22, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Jason W. Weigold
  • Publication number: 20130010400
    Abstract: An method of forming a metal foil coated ceramic and a metal foil capacitor is provided in a method of making a metal foil coated ceramic comprising providing a metal foil; applying a ceramic precursor to the metal foil wherein the ceramic precursor comprises at least one susceptor and a high dielectric constant oxide and an organic binder, and sintering the ceramic precursor with a high intensity, high pulse frequency light energy to form the metal foil ceramic.
    Type: Application
    Filed: July 5, 2012
    Publication date: January 10, 2013
    Applicant: KEMET ELECTRONICS CORPORATION
    Inventors: John E. McConnell, John Bultitude, Abhijit Gurav