Electric Condenser Making Patents (Class 29/25.41)
  • Patent number: 8806728
    Abstract: Method for producing a laminated ceramic electronic component including: forming a laminated body by layering and press-bonding a plurality of ceramic green sheets to become a protective layer and a plurality of the ceramic green sheets with metal paste printed thereon, forming an extended part by printing and drying a conductive paste for the extended part on the main face of the laminated body, forming a laminated ceramic element by cutting off the laminated body with the extended part formed and separating the laminated body into fragments, and forming a curled part by applying a conductive paste for the curled part on said end face of said laminated ceramic element. In the step of forming the laminated body, the laminated body is press-bonded so that the main face of the lead part of the laminated body is positioned lower than the main face of the function part.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: August 19, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Tomoya Sakaguchi, Yukihito Yamashita
  • Publication number: 20140223710
    Abstract: A method of forming a capacitor is described as is an improved capacitor formed with a one-sided capacitor foil. The method includes: providing a foil comprising a conductive core and a high surface area on each side of a first side and a second side of the core; removing at least a portion of the high surface area on the first side of the core; and forming a conductive layer on the dielectric.
    Type: Application
    Filed: February 14, 2014
    Publication date: August 14, 2014
    Inventors: Yanming Liu, Jessica P. Love, Brandon Summey
  • Publication number: 20140227891
    Abstract: An interdigitated chip capacitor (“IDC”) assembly including an IDC having a semiconductor block with a top portion, a bottom portion opposite the top portion, a plurality of sidewall portions extending between the top and bottom portions, and a plurality of terminals located on the sidewall portions; and a substrate having a top portion with a plurality of generally flat, vertically extending, nonconductive abutment surfaces thereon, the sidewall portions of the IDC being abuttingly engaged with at least some of the plurality of abutment surfaces.
    Type: Application
    Filed: February 14, 2013
    Publication date: August 14, 2014
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Allan Jerome Daen Rapales, Floro Lopez Camenforte, III, John Paul Quianzon Kwo
  • Patent number: 8800141
    Abstract: There is provided a method for fabricating a device, preferably for a micro electro electro mechanical system. The method includes forming a first electrode on a substrate, where the first electrode has a first sloped end at least at one end thereof; forming a sacrificial layer on the first electrode, where the sacrificial layer has a first sloped edge, the first sloped edge and the first sloped end are overlapped each other so that a thickness of the first sloped edge decreases as a thickness of the first sloped end increases; forming a first spacer on the first electrode, where the first spacer has contact with the first sloped edge; forming a beam electrode on the sacrificial layer and the first spacer; and removing the sacrificial layer after the forming the beam electrode.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: August 12, 2014
    Assignee: Fujitsu Limited
    Inventors: Takashi Katsuki, Takeaki Shimanouchi, Masahiko Imai, Osamu Toyoda, Satoshi Ueda
  • Publication number: 20140218839
    Abstract: The present invention generally relates to a variable capacitor for RF and microwave applications. The variable capacitor includes a bond pad that has a plurality of cells electrically coupled thereto. Each of the plurality of cells has a plurality of MEMS devices therein. The MEMS devices share a common RF electrode, one or more ground electrodes and one or more control electrodes. The RF electrode, ground electrodes and control electrodes are all arranged parallel to each other within the cells. The RF electrode is electrically connected to the one or more bond pads using a different level of electrical routing metal.
    Type: Application
    Filed: August 17, 2012
    Publication date: August 7, 2014
    Applicant: CAVENDISH KINETICS INC.
    Inventors: Roberto Gaddi, Robertus Petrus Van Kampen, Richard L. Knipe, Anartz Unamuno
  • Publication number: 20140218057
    Abstract: An apparatus including a flexible substrate; a component supported by the flexible substrate; a first input electrode, supported by the flexible substrate and configured to form a first capacitor with a second input electrode and to provide an input to the component; and a first output electrode, supported by the flexible substrate and configured to form a second capacitor with a second output electrode and to provide an output from the component.
    Type: Application
    Filed: February 6, 2013
    Publication date: August 7, 2014
    Applicant: Nokia Corporation
    Inventors: Richard WHITE, Samiul Haque
  • Publication number: 20140209363
    Abstract: There are provided multilayer ceramic capacitor, a manufacturing method therefor, a circuit board having a multilayer ceramic capacitor embedded therein, and a polishing device for a multilayer ceramic capacitor.
    Type: Application
    Filed: June 26, 2013
    Publication date: July 31, 2014
    Inventors: Deok Seok OH, Jung Hyun JEON
  • Publication number: 20140208555
    Abstract: Disclosed are apparatus and methodology for providing a precision laser adjustable (e.g., trimmable) thin film capacitor array. A plurality of individual capacitors are formed on a common substrate and connected together in parallel by way of fusible links. The individual capacitors are provided as laddered capacitance value capacitors such that a plurality of lower valued capacitors corresponding to the lower steps of the ladder, and lesser numbers of capacitors, including a single capacitor, for successive steps of the ladder, are provided. Precision capacitance values can be achieved by either of fusing or ablating selected of the fusible links so as to remove the selected subcomponents from the parallel connection. In-situ live-trimming of selected fusible links may be performed after placement of the capacitor array on a hosting printed circuit board.
    Type: Application
    Filed: March 31, 2014
    Publication date: July 31, 2014
    Applicant: AVX CORPORATION
    Inventors: Kevin D. Christian, Gheorghe Korony
  • Publication number: 20140209364
    Abstract: There are provided multilayer ceramic capacitor, a manufacturing method therefor, a circuit board having a multilayer ceramic capacitor embedded therein, and a polishing device for a multilayer ceramic capacitor.
    Type: Application
    Filed: June 26, 2013
    Publication date: July 31, 2014
    Inventors: Deok Seok OH, Eun Hyuk CHAE, Jung Hyun JEON, Jin Man JUNG
  • Patent number: 8792225
    Abstract: A reaction container for manufacturing a capacitor element includes a container which accommodates electrolytic solution therein, a partitioning frame which can partition the inside of the container into a plurality of individual chambers, negative electrode members individually arranged in each of the individual chambers, and a constant-current source electrically connected to the cathode members. A passage, which enables movement of the electrolytic solution between each individual chamber and at least one individual chamber of the individual chambers adjacent to each individual chamber, is provided in a manner such that the passage can be opened and closed.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: July 29, 2014
    Assignee: Showa Denko K.K.
    Inventors: Kazumi Naito, Masahiro Suzuki
  • Publication number: 20140204502
    Abstract: There is provided a multilayer ceramic capacitor including a ceramic body including dielectric layers, first and second internal electrodes formed within the ceramic body and disposed to face each other, having the dielectric layer interposed therebetween, first and second electrode layers disposed on outer surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively, a conductive resin layer disposed on the first and second electrode layers and containing copper powder, a nickel plating layer disposed on an outer portion of the conductive resin layer, and a copper-nickel alloy layer disposed between the conductive resin layer and the nickel plating layer and having a thickness of 1 to 10 nm.
    Type: Application
    Filed: July 3, 2013
    Publication date: July 24, 2014
    Inventors: Byoung Jin CHUN, Byung Jun JEON, Kyung Pyo HONG, Jae Hwan HAN
  • Patent number: 8782876
    Abstract: A process for fabricating an integrated Micro-Electro-Mechanical Systems (MEMS) filter includes bonding an insulating substrate having a first end and a second end to a base substrate, the second end of the insulating substrate cantilevered over and separated from the base substrate by a gap, forming a resonator element on the second end of the insulating substrate, forming an inductive element comprising a coil, wherein the coil is formed on the insulating substrate, and forming a capacitive element on the first side of the insulating substrate, the capacitive element comprised of two conductive plates, wherein one of the two conductive plates is formed on the insulating substrate.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: July 22, 2014
    Assignee: HRL Laboratories, LLC
    Inventors: Randall L. Kubena, David T. Chang
  • Patent number: 8776337
    Abstract: The present disclosure includes methods of forming capacitive sensors. One method includes forming a first electrode array of the capacitive sensor on a first structure. Forming the first electrode array can include: forming a dielectric material on a substrate material; forming an electrode material on the dielectric material; removing portions of the electrode material to form a number of electrodes separated from each other; and removing at least a portion of the dielectric material from between the number of electrodes. The method can include bonding the first structure to a second structure having a second electrode array of the capacitive sensor formed thereon such that the number of electrodes of the first electrode array face a number of electrodes of the second electrode array.
    Type: Grant
    Filed: July 30, 2010
    Date of Patent: July 15, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Brian D. Homeijer, Robert G. Walmsley, Rodney L. Alley, Dennis M. Lazaroff, Sara J. Homeijer
  • Publication number: 20140192061
    Abstract: This disclosure provides systems, methods and apparatus for electromechanical systems having sidewalls beams. In one aspect, a device includes a substrate having a first electrode and a second electrode, and a movable shuttle monolithically integrated with the substrate, and having a first wall, a second wall, and a base. The first and second walls each have a first dimension at least four times larger than a second dimension. The first and second walls define substantially parallel vertical sides of the shuttle, and the base is positioned orthogonally to the first and second walls and forms a horizontal bottom of the shuttle, providing structural support to the first and second walls. The first wall and the first electrode define a first capacitor, and the second wall and the second electrode define a second capacitor.
    Type: Application
    Filed: January 9, 2013
    Publication date: July 10, 2014
    Applicant: Pixtronix, Inc.
    Inventors: Richard S. Payne, Nesbitt W. Hagood, Timothy J. Brosnihan, Joyce H. Wu, Mark B. Andersson, Jasper Lodewyk Steyn
  • Publication number: 20140182101
    Abstract: In a method of identifying a direction of stacking in a stacked ceramic capacitor, while density of magnetic flux generated from a magnetism generation apparatus is measured with a magnetic flux density measurement instrument, a stacked ceramic capacitor is caused to pass between a magnetism generation apparatus and the magnetic flux density measurement instrument and variation in magnetic flux density at least at the time of passage of the stacked ceramic capacitor is measured. Based on a result of measurement of magnetic flux density, a direction in which a plurality of internal electrodes are stacked in the stacked ceramic capacitor is identified.
    Type: Application
    Filed: December 11, 2013
    Publication date: July 3, 2014
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Yoshikazu SASAOKA
  • Publication number: 20140185189
    Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body in which a plurality of dielectric layers are laminated; a plurality of first and second internal electrodes formed to be alternately exposed to both end surfaces of the ceramic body with the dielectric layer interposed therebetween; and first and second external electrodes formed on both end surfaces of the ceramic body and electrically connected to the first and second internal electrodes, wherein when it is defined that a thickness of a band of the first and second external electrodes is T1 and a thickness of the ceramic body is T2, a ratio (T1/T2) of the thickness of the band of the first or second external electrode to the thickness of the ceramic body is equal to or less than 0.18.
    Type: Application
    Filed: July 23, 2013
    Publication date: July 3, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kyu Ree KIM, Byoung Hwa LEE, Eun Hyuk CHAE, Doo Young KIM
  • Publication number: 20140185185
    Abstract: A raw ceramic portion is formed on each of first and second lateral surfaces of a raw ceramic body. The raw ceramic portions contain ceramic particles and more of at least one constituent selected from Ba, Mg, Mn, and a rare-earth element between the ceramic particles than the ceramic section of the raw ceramic body in terms of total amount. The raw ceramic body is fired with the raw ceramic portions thereon. In this way, a ceramic electronic component is obtained that has a main body left after the raw ceramic body is fired with the raw ceramic portions thereon.
    Type: Application
    Filed: December 26, 2013
    Publication date: July 3, 2014
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Kenichi OKAJIMA, Daiki FUKUNAGA, Takayuki YAO, Yasunari NAKAMURA, Akihiro SHIOTA
  • Publication number: 20140174800
    Abstract: There is provided an embedded multilayer ceramic electronic component, including a ceramic body including dielectric layers, first internal electrodes and second internal electrodes disposed to face each other with the dielectric layers interposed therebetween, a first external electrode electrically connected to the first internal electrodes and a second external electrode electrically connected to the second internal electrodes, and a conductive paste layer formed on the first external electrode and the second external electrode, wherein the first and second external electrodes include a first conductive metal and glass, and the conductive paste layers include a second conductive metal.
    Type: Application
    Filed: July 3, 2013
    Publication date: June 26, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Mi Jeong CHANG, Hyun Tae KIM, Byoung Hwa LEE
  • Publication number: 20140160617
    Abstract: There is provided a multilayer ceramic capacitor, and a method of manufacturing the same, the multilayer ceramic capacitor including: a ceramic body; a first internal electrode; a second internal electrode; a first external electrode; a second external electrode; and an insulating layer.
    Type: Application
    Filed: January 10, 2013
    Publication date: June 12, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Eung Soo KIM, Jong Ho LEE, Jae Yeol CHOI, Doo Young KIM, Yu Na KIM, Sung Woo KIM
  • Publication number: 20140160624
    Abstract: An improved capacitor utilizing stacked MLCC's is provided. The capacitor comprising at least one MLCC sandwiched between a first lead and a second lead. Each lead comprises at least one integral lead crimp.
    Type: Application
    Filed: December 4, 2013
    Publication date: June 12, 2014
    Applicant: Kemet Electronics Corporation
    Inventors: John E. McConnell, Alan P. Webster, Lonnie G. Jones, Garry L. Renner, Jeffrey W. Bell
  • Publication number: 20140160616
    Abstract: There is provided a multilayered ceramic capacitor including: a ceramic body; a plurality of first and second internal electrodes having first and second lead-out portions overlapped with each other, respectively, and exposed to one surface of the ceramic body; first and second external electrodes formed on one surface of the ceramic body and electrically connected to the first and second lead-out portions, respectively; and an insulating layer formed on one surface of the ceramic body to cover exposed portions of the first and second lead-out portions, wherein the first lead-out portion has a first overlap increase part of which a forward edge has an inclined surface, and the second lead-out portion has a second overlap increase part of which a forward edge has an inclined surface.
    Type: Application
    Filed: January 9, 2013
    Publication date: June 12, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Byung Kwon YOON, Jae Yeol CHOI, Sang Hyuk KIM
  • Publication number: 20140160622
    Abstract: There is provided a stacked-type multilayer ceramic electronic component including: a ceramic body, a plurality of first and second internal, and first and second external electrodes formed on both surfaces of the ceramic element opposing one another; and first and second metal frames disposed to face one another and allowing the first and second external electrodes of the ceramic body to be attached thereto, respectively, wherein two or more ceramic bodies are attached between the first and second metal frames in a length direction of the first and second metal frames with an interval therebetween, and the respective ceramic bodies have different levels of capacitance.
    Type: Application
    Filed: March 15, 2013
    Publication date: June 12, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hae Sock CHUNG, Doo Young KIM, Na Rim HA, Youn Sik JIN, Tae Ok KIM
  • Patent number: 8742869
    Abstract: A high power, low passive inter-modulation capacitor is presented, which is formed using metal clad substrates, which are broad-side coupled through a thin air gap. Each substrate may include metal layers affixed on both sides which are electrical coupled together to form a single capacitor plate, or each substrate may have only a single metal layer on the surface adjacent to the air gap. The capacitor has particular application in low cost RF and microwave filters, which may be used in communication equipment and communication test equipment such a diplexers, for low PIM applications.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: June 3, 2014
    Assignee: K&L Microwave, Inc.
    Inventor: Rafi Hershtig
  • Patent number: 8732923
    Abstract: A method for manufacturing an acoustic wave device includes: adhering wafer-shaped first and second piezoelectric substrates to a front face of a first and second adhesive sheet respectively and dividing the first and the second piezoelectric substrates into rectangles; adhering a third and fourth adhesive sheet to the first and second piezoelectric substrates respectively and moving at least one divided portions of the first and second piezoelectric substrates selectively to the third and fourth adhesive sheet respectively; moving the first piezoelectric substrate on the first adhesive sheet to the fourth adhesive sheet; and moving the second piezoelectric substrate on the second adhesive sheet to the third adhesive sheet.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: May 27, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Kazunori Inoue, Tsutomu Miyashita, Kazuhiro Matsumoto
  • Patent number: 8732925
    Abstract: An electronic component and method for manufacture thereof is disclosed. A plurality of electrodes are positioned in stacked relation to form an electrode stack. The stack may include as few as two electrodes, but more may be used depending on the number of subcomponents desired. Spacing between adjacent electrodes is determined by removable spacers during fabrication. The resulting space between adjacent electrodes is substantially filled with gaseous matter, which may be an actual gaseous fill, air, or a reduced pressure gas formed through evacuation of the space. Further, adjacent electrodes are bonded together to maintain the spacing. A casing is formed to encapsulate the stack, with first and second conducting surfaces remaining exposed outside the casing. The first conducting surface is electrically coupled to a first of the electrodes, and the second conducting surface is electrically coupled to a second of the electrodes.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: May 27, 2014
    Assignee: Yen Technologies, LLC
    Inventor: William S. H. Cheung
  • Publication number: 20140132860
    Abstract: A touch sensor panel having co-planar single-layer touch sensors fabricated on a single side of a substrate is disclosed. The drive and sense lines can be fabricated as column-like patterns in a first orientation and patches in a second orientation, where each column-like pattern in the first orientation is connected to a separate metal trace in the border area of the touch sensor panel, and all patches in each of multiple rows in the second orientation are connected together using a separate metal trace in the border area of the touch sensor panel. The metal traces in the border areas can be formed on the same side of the substrate as the patches and columns, but separated from the patches and column-like patterns by a dielectric layer.
    Type: Application
    Filed: January 17, 2014
    Publication date: May 15, 2014
    Applicant: Apple Inc.
    Inventors: Steve Porter HOTELLING, John Z. Zhong
  • Patent number: 8720023
    Abstract: A method for fabricating subminiature, high-performance monolithic duplexer is disclosed. The method comprises depositing and patterning a lower electrode on an upper surface of an insulation layer on a substrate, so as to expose a first part of the insulation layer; depositing a piezoelectric layer on an upper surface of the exposed insulation layer and the lower electrode; depositing a metal on the upper part of the piezoelectric layer and patterning the metal to form a resonance part and a trimming inductor, wherein the lower electrode electrically couples the resonance part and the trimming inductor; fabricating air gap type FBARs (film bulk acoustic resonances) by forming a cavity by etching the substrate under the resonance part; and bonding a packaging substrate on the substrate, the packaging substrate having a phase shifting part which substantially prevents inflow of signal between the air gap type FBARs.
    Type: Grant
    Filed: December 24, 2009
    Date of Patent: May 13, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yun-kwon Park, In-sang Song, Seok-chul Yun, Seog-woo Hong, Byeoung-ju Ha, Dong-ha Shim, Hae-seok Park, Kuang-woo Nam, Duck-hwan Kim
  • Publication number: 20140126106
    Abstract: In a laminated ceramic electronic component, a side surface outer electrode circles around a ceramic element body, a first electrode portion includes a first side surface electrode portion on first and second side surfaces of the ceramic element body and a first wrap-around electrode portion extending from the first side surface electrode portion and wraps around portions of third and fourth side surfaces, and a second electrode portion includes a second side surface electrode portion on the third and fourth side surfaces and a second wrap-around electrode portion extending from the second side surface electrode portion and wrap around portions of the first and second side surfaces. External appearance configurations in which the first and second wrap-around electrode portions are recognizable from outside are provided to the first and second wrap-around electrode portions.
    Type: Application
    Filed: October 25, 2013
    Publication date: May 8, 2014
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Takashi SAWADA
  • Publication number: 20140123453
    Abstract: A method of forming a stacked electronic component, and an electronic component formed by the method wherein the method includes: providing a multiplicity of electronic components wherein each electronic component comprises a first external termination and a second external termination; providing a first lead frame plate and a second lead frame plate wherein the first lead frame plate and the second lead frame plate comprises barbs and leads; providing a molded case comprising a cavity and a bottom; and forming a sandwich of electronic components in an array between the first lead frame plate and the second lead frame plate with the barbs protruding towards the electronic components and the leads extending through the bottom.
    Type: Application
    Filed: January 10, 2014
    Publication date: May 8, 2014
    Applicant: Kemet Electronics Corporation
    Inventors: Maurice Perea, R. Allen Hill, Reggie Phillips
  • Publication number: 20140126110
    Abstract: There are provided a multilayer ceramic capacitor and a manufacturing method thereof, the multilayer ceramic capacitor including: a ceramic body; first and second internal electrodes; first and second external electrodes; and a first insulating layer
    Type: Application
    Filed: December 14, 2012
    Publication date: May 8, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Eung Soo Kim, Jae Yeol Choi, Doo Young Kim, Jong Ho Lee, Yu Na Kim, Sung Woo Kim
  • Patent number: 8713769
    Abstract: A novel method for manufacturing embedded a capacitive stack and a novel capacitive stack apparatus are provided having a capacitive core that serves as a structural substrate on which alternating thin conductive foils and nanopowder-loaded dielectric layers may be added and tested for reliability. This layering and testing allows early fault detection of the thin dielectric layers of the capacitive stack. The capacitive stack may be configured to supply multiple isolated capacitive elements that provide segregated, device-specific decoupling capacitance to one or more electrical components. The capacitive stack may serve as a core substrate on which a plurality of additional signaling layers of a multilayer circuit board may be coupled.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: May 6, 2014
    Assignee: Sanmina-Sci Corporation
    Inventor: George Dudnikov
  • Patent number: 8713770
    Abstract: A ceramic multilayer surface-mount capacitor with inherent crack mitigation void patterning to channel flex cracks into a safe zone, thereby negating any electrical failures.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: May 6, 2014
    Assignee: Kemet Electronics Corporation
    Inventor: John D. Prymak
  • Patent number: 8707552
    Abstract: A high-dielectric sheet for a printed circuit board includes a first electrode, a first sputter film formed on the first electrode, an intermediate layer formed on the first sputter film by calcining a sol-gel film, a second sputter film formed on the intermediate layer, and a second electrode provided on the second sputter film.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: April 29, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Takashi Kariya, Hironori Tanaka
  • Patent number: 8689417
    Abstract: Disclosed are apparatus and methodology for providing a precision laser adjustable (e.g., trimmable) thin film capacitor array. A plurality of individual capacitors are formed on a common substrate and connected together in parallel by way of fusible links. The individual capacitors are provided as laddered capacitance value capacitors such that a plurality of lower valued capacitors corresponding to the lower steps of the ladder, and lesser numbers of capacitors, including a single capacitor, for successive steps of the ladder, are provided. Precision capacitance values can be achieved by either of fusing or ablating selected of the fusible links so as to remove the selected subcomponents from the parallel connection. In-situ live-trimming of selected fusible links may be performed after placement of the capacitor array on a hosting printed circuit board.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: April 8, 2014
    Assignee: AVX Corporation
    Inventors: Kevin D. Christian, Gheorghe Korony
  • Publication number: 20140072150
    Abstract: A microelectromechanical microphone and method of manufacturing the same are disclosed. The microphone has a moveable diaphragm and a fixed backplate that create a variable capacitance. A fixed anchor electrically coupled to the diaphragm has an electrode that measures the variable capacitance, but also measures an unwanted, additive, parasitic capacitance. Various embodiments include a reference electrode, manufactured in the same deposition layer as the diaphragm or anchor, that measures only the parasitic capacitance. A circuit is provided either on-chip or off-chip that subtracts the capacitance measured at the reference electrode from that measured at the anchor, thereby producing only the desired variable capacitance as output. Because the reference electrode is deposited at the same time as the diaphragm or anchor, only minimal changes are required to existing manufacturing techniques.
    Type: Application
    Filed: September 11, 2012
    Publication date: March 13, 2014
    Applicant: ANALOG DEVICES, INC.
    Inventors: Fang Liu, Kuang L. Yang
  • Patent number: 8667654
    Abstract: A method manufactures a capacitor having polycrystalline dielectric layer between two metallic electrodes. The dielectric layer is formed by a polycrystalline growth of a dielectric metallic oxide on one of the metallic electrodes. At least one polycrystalline growth condition of the dielectric oxide is modified during the formation of the polycrystalline dielectric layer, which results in a variation of the polycrystalline properties of the dielectric oxide within the thickness of said layer.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: March 11, 2014
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventor: Mickael Gros-Jean
  • Publication number: 20140055213
    Abstract: A capacitive filter assembly and method including a housing having a power terminal connection for receiving electrical power. A plurality of capacitors in an electrically parallel configuration coupled to one or more side walls of the housing. The plurality of capacitors electrically communicating with a plurality of respective printed wiring boards (PWB) coupled to the capacitors inside the housing, and the plurality of capacitors being positioned between the power terminal connection in the housing and respective housing ground connections in the housing. A plurality of support structures coupled to the plurality of capacitors, respectively, the plurality of support structures being configured to mate with the respective printed wiring boards, the support structures being mounted in the housing such that the capacitors are coupled to the housing using their respective support structures.
    Type: Application
    Filed: August 22, 2012
    Publication date: February 27, 2014
    Applicant: BAE SYSTEMS CONTROLS INC.
    Inventors: Steven D. Sherwood, William F. Kienzler, III, Keith D. Rose, Peter J. Minni
  • Publication number: 20140053383
    Abstract: A method produces electrode windings, in which method a strip- or ribbon-like anode and a strip- or ribbon-like cathode are provided and flat collector lugs are formed on at least one longitudinal side of the anode and of the cathode at varying distances and/or contours are cut into the longitudinal sides of the electrodes. The anode and the cathode are wound up together with a strip- or ribbon-like separator to form a winding with the sequence anode/separator/cathode. The method is distinguished, in particular, in that the process of forming collector lugs and/or of cutting contours and the process of winding up overlap with respect to time.
    Type: Application
    Filed: April 27, 2012
    Publication date: February 27, 2014
    Applicant: VOLKSWAGEN VARTA Microbattery Forschungsgesellschaft mbH & Co. KG
    Inventors: Konrad Holl, Markus Pompetzki, Robert Sekler, Heiner Stelzig, Stefan Stock
  • Publication number: 20140055909
    Abstract: An improved capacitor and method of making an improved capacitor is set forth. The capacitor has planer anodes with each anode comprising a fusion end and a separated end and the anodes are in parallel arrangement with each anode in direct electrical contact with all adjacent anodes at the fusion end. A dielectric is on the said separated end of each anode wherein the dielectric covers at least an active area of the capacitor. Spacers separate adjacent dielectrics and the interstitial space between the adjacent dielectrics and spacers has a conductive material in therein.
    Type: Application
    Filed: November 4, 2013
    Publication date: February 27, 2014
    Applicant: Kemet Electronics Corporation
    Inventors: Liancai Ning, Qun Ya, Xincheng Jin, Erik Karlsen Reed, Chris Stolarski
  • Patent number: 8631549
    Abstract: A method for manufacturing a laminated ceramic capacitor includes a step of preparing a laminate which has a first principal surface, a second principal surface, a first end surface, a second end surface, a first side surface, and a second side surface and which includes insulating layers and internal electrodes having end portions exposed at the first or second end surface; a step of forming external electrodes on the first and second end surfaces such that plating deposits are formed on the exposed end portions of the internal electrodes so as to be connected to each other; and a step of forming thick end electrodes electrically connected to the external electrodes such that a conductive paste is applied onto edge portions of the first and second principal surfaces and first and second side surfaces of the laminate and then baked.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: January 21, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Akihiro Motoki, Kenichi Kawasaki, Makoto Ogawa, Shigeyuki Kuroda, Shunsuke Takeuchi, Hideyuki Kashio
  • Patent number: 8627556
    Abstract: An embodiment of the present invention provides a method, comprising breaking an electrode into subsections with signal bus lines connecting said subsections and a solid electrode to improve Q.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: January 14, 2014
    Assignee: BlackBerry Limited
    Inventor: James Martin
  • Patent number: 8621730
    Abstract: In a capacitor producing method, a bottom electrode, a thin-film dielectric, and a top electrode are deposited on a substrate so as to form a capacitor, wherein defects including particles and electrical short-circuits between the bottom electrode and the top electrode are detected before the capacitor is divided into capacitor cells. Next, defects such as particles and electrical short-circuits between the bottom electrode and the top electrode are removed before the capacitor is divided into capacitor cells.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: January 7, 2014
    Assignee: NEC Corporation
    Inventors: Akinobu Shibuya, Koichi Takemura, Takashi Manako
  • Publication number: 20130335880
    Abstract: There is provided a capacitor including a dielectric layer having a first plane, a second plane opposite to the first plane, and a plurality of through-holes communicated with the first plane and the second plane, including a plurality of arrangement regions where arrangement directions of the plurality of through-holes are same; a first external electrode layer disposed on the first plane; a second external electrode layer disposed on the second plane; a first internal electrode housed in a part of the plurality of through-holes and connected to the first external electrode layer; and a second internal electrode housed in a part of the plurality of through-holes and connected to the second external electrode layer.
    Type: Application
    Filed: June 11, 2013
    Publication date: December 19, 2013
    Inventor: Hidetoshi MASUDA
  • Patent number: 8607424
    Abstract: A method and apparatus for a reverse metal-insulator-metal (MIM) capacitor. The apparatus includes a lower metal layer, a bottom electrode, and an upper metal layer. The lower metal layer is disposed above a substrate layer. The bottom electrode is disposed above the lower metal layer and coupled to the lower metal layer. The upper metal layer is disposed above the bottom electrode. The upper metal layer comprises a top electrode of a metal-insulator-metal (MIM) capacitor.
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: December 17, 2013
    Assignee: Cypress Semiconductor Corp.
    Inventors: Vladimir Korobov, Oliver Pohland
  • Patent number: 8601658
    Abstract: The embodiments disclosed herein are directed to fabrication methods useful for creating MEMS via microcontact printing by using small organic molecule release layers. The disclose method enables transfer of a continuous metal film onto a discontinuous platform to form a variable capacitor array. The variable capacitor array can produce mechanical motion under the application of a voltage. The methods disclosed herein eliminate masking and other traditional MEMS fabrication methodology. The methods disclosed herein can be used to form a substantially transparent MEMS having a PDMS layer interposed between an electrode and a graphene diaphragm.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: December 10, 2013
    Assignee: Massauchusetts Institute of Technology
    Inventors: Vladimir Bulovic, Corinne Evelyn Packard, Jennifer Jong-Hua Yu, Apoorva Murarka, LeeAnn Kim
  • Patent number: 8590123
    Abstract: The disclosure provides a method for producing an electronic component in which the oxidation of Cu constituting an internal conductor part of the component is inhibited or prevented in a firing step, and even when a magnetic body part containing NiO, ZnO, Fe2O3, etc. is reduced in the firing step, the magnetic body part is subsequently oxidized to ensure the original characteristics. In producing the electronic component, an unfired laminated body including parts to serve as the magnetic body part and the internal conductor part after firing is subjected to firing in an atmosphere with an oxygen concentration equal to or lower than the equilibrium oxygen partial pressure of Cu—Cu2O, and the fired laminated body is then subjected to an oxygenic-atmosphere heat treatment in an atmosphere with an oxygen concentration of 0.01% or more in a step of decreasing the temperature.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: November 26, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Atsushi Yamamoto, Akihiro Nakamura
  • Patent number: 8590136
    Abstract: A dual backplate MEMS microphone system including a flexible diaphragm sandwiched between two single-crystal silicon backplates may be formed by fabricating each backplate in a separate wafer, and then transferring one backplate from its wafer to the other wafer, to form two separate capacitors with the diaphragm.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: November 26, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Kuang L. Yang, Li Chen, Thomas D. Chen
  • Publication number: 20130309533
    Abstract: An electric storage device according to the present invention is provided with a flat electrode assembly in which a positive electrode plate and a negative electrode plate are wound while being isolated from each other, and which includes a pair of folded-back portions opposed to each other with a center line therebetween and a flat portion positioned between the pair of folded-back portions; and a case for housing the electrode assembly, the case including, on an inner surface thereof, a raised portion having direct or indirect contact externally with a boundary region between one of the pair of folded-back portions and the flat portion of the electrode assembly, wherein a maximum external length of the folded-back portion in a direction orthogonal to the flat portion is greater than an external length of the boundary region in a direction orthogonal to the flat portion at a position thereof with which the raised portion has contact.
    Type: Application
    Filed: May 13, 2013
    Publication date: November 21, 2013
    Inventor: JUN NAKAMURA
  • Patent number: 8584332
    Abstract: In a manufacturing method for a monolithic ceramic electronic component, a ceramic paste is applied by using an application plate to a side surface of each of a plurality of green chips arrayed in row and column directions which are obtained after cutting a mother block. In the applying step, the ceramic paste is transferred to the side surface by moving the green chips and the application plate relative to each other in the direction in which the side surface extends while separating the green chips from the application plate, in a state where the ceramic paste is connected to both the green chips and the application plate.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: November 19, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Togo Matsui, Minoru Dooka, Hiroyoshi Takashima, Kenichi Okajima
  • Publication number: 20130299215
    Abstract: An electronic component includes a body and first and second external electrodes arranged on an external surface of the body. An edge portion of the first external electrode and an edge portion of the second external electrode face each other on the body. The first and second external electrodes each include a copper-metal-containing layer and a protective copper oxide layer covering the copper-metal-containing layer within the edge portion of the first and second external electrodes, respectively.
    Type: Application
    Filed: May 7, 2013
    Publication date: November 14, 2013
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Yasunori TASEDA, Isamu FUJIMOTO