Beam Lead Frame Or Beam Lead Device Patents (Class 29/827)
  • Patent number: 5319847
    Abstract: A method and apparatus for conditioning the leads of integrated circuit devices having a plurality of sequential stations. The flat device packages have rows of J-shaped leads along the edges. Individual devices are picked up at an input station and moved to a precising nest where the device is accurately located. The device is moved, preferably by a vacuum chuck transport mechanism, to a first conditioning station where a precising bar adjusts lead spread, then a needle is inserted through the row of leads to adjust lead standoff. A coining die reforms the "J" configuration and establishes a precisely uniform seating plane for all leads. A combing blade arrangement then establishes the lead spacing and lead sweep. After leads along two opposite sides of the device are conditioned, the device is moved to a second conditioning station (if required) where these operations are repeated on the other two sides of the device.
    Type: Grant
    Filed: July 16, 1993
    Date of Patent: June 14, 1994
    Assignee: Integrated Concepts
    Inventors: Roy A. Darling, George T. Rushforth
  • Patent number: 5313367
    Abstract: Actualized are fingers through which a semiconductor integrated circuit including high density electrode strings can be easily safely mounted on a circuit substrate in the same manner with the prior art. A conductor pattern capable of improving a packaging density of the integrated circuit including the fingers is actualized. The fingers are therefore configured using the multi-layered conductor pattern. The conductor pattern is multi-layered, i.e., consists of conductive layers and an insulating layer for separating these conductive layers. In addition to a wiring pattern serving as fingers for connecting an integrated circuit to a packaging substrate, an electrification path for interlayer connections is also formed in a thickness direction. The circuit substrate exhibiting a high packaging density can be actualized.
    Type: Grant
    Filed: April 21, 1992
    Date of Patent: May 17, 1994
    Assignee: Seiko Epson Corporation
    Inventor: Hisanobu Ishiyama
  • Patent number: 5307559
    Abstract: A capacitor is disposed within a semiconductor device assembly atop a plastic layer pad, beneath which passes a pair of leads connected to a semiconductor device. The capacitor is connected to the pair of leads, such as by soldering, spot welding or conductive epoxy through cutouts in the pad. In one embodiment, the cutouts extend into the pad from inner and outer edges thereof. In another embodiment, the cutouts are holes through the pad. A plurality, such as four, capacitors are conveniently disposed atop a corresponding plurality of pads, and are connected to a corresponding plurality of pairs of leads within the semiconductor device assembly. By positioning the capacitor(s) as closely to the semiconductor device as possible, the efficacy of the capacitor(s) is maximized. Method and apparatus are disclosed.
    Type: Grant
    Filed: November 20, 1992
    Date of Patent: May 3, 1994
    Assignee: LSI Logic Corporation
    Inventor: Jon Long
  • Patent number: 5307929
    Abstract: A lead arrangement is provided having a number of leads to be mechanically and electrically connected to a substrate. Retaining means are also provided integral with the lead arrangement to hold the substrate against the leads, as during soldering. The retaining means may be disengaged from the substrate separately or simultaneously with the trimming of the leads from the lead arrangement after connecting to the substrate.
    Type: Grant
    Filed: September 16, 1992
    Date of Patent: May 3, 1994
    Assignee: North American Specialties Corporation
    Inventor: Jack Seidler
  • Patent number: 5301420
    Abstract: A method for making a light weight circuit module includes steps of providing a substrate, drilling through holes in the substrate and plating the through holes with a metal. The substrate is a rigid planar substrate and having metallization on both sides. The method also includes steps of drilling through holes in the substrate and plating the through holes with a metal. The method also includes steps of preparing a patterned photoresist layer on at least one of the two sides, etching the metallization on the at least one side in accordance with the patterned photoresist layer, drilling support holes, filling the support holes with a material chemically distinct from the substrate, stripping the patterned photoresist layer from the at least one side and chemically removing the substrate from the metallization.
    Type: Grant
    Filed: July 6, 1993
    Date of Patent: April 12, 1994
    Assignee: Motorola, Inc.
    Inventors: Frederick Y. Cho, Russell J. Elias, James F. Landers
  • Patent number: 5299097
    Abstract: An electronic part mounting board and a semiconductor device which may be easily fabricated and have high reliability by preventing deterioration due to heat at the time of fabrication and the occurrence of internal stress. In the electronic part mounting board and the semiconductor device using such electronic part mounting device: a board fixing pin is provided on a lead frame which is provided to surround a circuit board and which has a plurality of leads, in a manner extended from the frame to be coupled to the circuit board to support the circuit board with respect to the frame; and the circuit board and the board fixing pin are coupled to each other by a fitting pin for connecting the two members. Since the circuit board and the lead frame are coupled, heating and caulking are not required. The thermal deterioration of the resin board to be used and internal stress due to heat between the board and the lead frame do not occur.
    Type: Grant
    Filed: March 31, 1993
    Date of Patent: March 29, 1994
    Assignee: Ibiden Co., Ltd.
    Inventors: Mitsuhiro Kondo, Katsumi Sagisaka
  • Patent number: 5299091
    Abstract: A packaged semiconductor device has, according to one embodiment of the present invention, a semiconductor pellet having an electronic circuit therein and electrode pads formed on a principal surface of the pellet, a plurality of electrical connection bumps provided on the electrode pads, a plurality of heat dissipation bumps provided at the principal surface of the pellet and electrically insulated from the electronic circuit and the electrode pads, electrical connection leads for the electronic circuit, heat dissipators for the electronic circuit and a packaging material for sealing pellet, the electrical connection bumps, the heat dissipation bumps and parts of the electrical connection leads and the heat dissipator. One or more of the heat dissipation bumps are arranged relatively nearer to the electronic circuit than the electrical connection bumps for thermal coupling to the electronic circuit.
    Type: Grant
    Filed: March 19, 1992
    Date of Patent: March 29, 1994
    Assignees: Hitachi, Ltd., Hitachi Tohbu Semiconductor, Ltd.
    Inventors: Akio Hoshi, Yukihiro Sato, Toyomasa Koda, Isao Yoshida, Kouzou Sakamoto
  • Patent number: 5295297
    Abstract: In surface packaging of thin resin packages such as resin molded memory ICs or the like, cracks of the package occur frequently at a solder reflow step where thermal impact is applied to the package because the resin has absorbed moisture before packaging.To solve this problem, the devices are packaged moisture-tight at an assembly step of the resin molded devices where the resin is still dry, and are taken out from the bags immediately before the execution of surface packaging.
    Type: Grant
    Filed: July 20, 1992
    Date of Patent: March 22, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Wahei Kitamura, Gen Murakami, Kunihiko Nishi
  • Patent number: 5295298
    Abstract: A semiconductor device of the SOP type packaged on a lead frame and separated individually is fed into a lead-forming position by a holder, and the distal ends of leads arrayed on one side of the semiconductor device are imaged by a camera. The image data from the camera is processed by a recognition unit, which outputs the actual position of the semiconductor device. If the recognized actual position is different from the position to start forming leads, then a controller actuates the holder to eliminate the positional error and to position the semiconductor accurately in the lead-forming position. Based on data corresponding to the type of the semiconductor device, the lead bases of the leads are held by a lead-fixing finger assembly, and the distal end portions of the leads are bent arcuately by a lead-forming finger assembly, thereby forming the leads to a predetermined shape.
    Type: Grant
    Filed: April 27, 1993
    Date of Patent: March 22, 1994
    Assignee: NEC Corporation
    Inventor: Hideo Sakamoto
  • Patent number: 5295296
    Abstract: The invention is concerned with a method and an apparatus for working a clad material used as a reed frame for a flat package type integrated circuit. When metal foils of a predetermined size is superimposed at a predetermined position on a strip-like material, press contacted and rolled to produce a continuous clad material, and reference holes are bored in the clad material, not only the relative position between the reference holes but also the relative position between the reference holes and the metal foils previously applied to the clad material may be set accurately. Even if the pitch distances between the reference holes provided in the clad material differ from one another, press working by the metal mold may be continuously performed using these reference holes.
    Type: Grant
    Filed: August 27, 1992
    Date of Patent: March 22, 1994
    Assignees: Citizen Watch Co., Ltd., Sumitomo Special Metals Co., Ltd.
    Inventors: Katsumi Hagiwara, Akihiro Tanaka, Kou Sasaki, Kiyohito Nagasawa, Shin Nemoto, Kazuhiro Yamamoto
  • Patent number: 5286342
    Abstract: The thickness of a portion of a metal plate for constituting a lead frame, which corresponds to a tip portion of respective lead terminals of the lead frame, is partially made thin by way of an etching treatment. Subsequently, the respective lead terminals of the lead frame are formed by a punching process or an etching process.
    Type: Grant
    Filed: October 5, 1992
    Date of Patent: February 15, 1994
    Assignee: Rohm Co., Ltd.
    Inventor: Masahiro Tsuji
  • Patent number: 5284725
    Abstract: Disclosed are photo-masks for use in two exposure steps to be effected for forming a ground metal layer on the back surface of a substrate in manufacture of a two-layer: TAB in which a metal layer is formed on one surface or both surfaces of an insulating resin substrate without an adhesive, determined metal leads are formed on the top surface of the substrate, via holes are formed on the determined positions of the substrate, a ground metal layer is formed on the back surface of the substrate, and a part of the leads as formed on the top surface of the substrate are electrically connected with the ground metal layer as formed on the back surface of the same via the via holes; the photo-masks being characterized in that the photo-mask to be used in the first exposure step for forming the via holes to the back surface of the substrate is provided with alignment marks in the determined plural positions thereof and that the photo-mask to be used in the second exposure step for forming the ground metal layer on t
    Type: Grant
    Filed: November 13, 1991
    Date of Patent: February 8, 1994
    Assignee: Sumitomo Metal Mining Co., Ltd.
    Inventor: Akio Takatsu
  • Patent number: 5283946
    Abstract: The excise and lead form of TAB leads bonded to an integrated circuit chip. Leads extending beyond a sidewall are clamped between a first clamp and a form anvil at a first portion spaced from the chip. The leads are also clamped between an excise/form tool and a second clamp at a second portion spaced further from the chip than the first portion. An excise blade cuts the leads outside the second portion. Then the excise/form tool, second clamp and excise blade move downwards in a curved path toward the chip to form a first lead corner against the form anvil and a second lead corner against the excise/form tool without splaying or galling the leads.
    Type: Grant
    Filed: May 17, 1993
    Date of Patent: February 8, 1994
    Assignee: Microelectronics And Computer Technology Corporation
    Inventors: Richard L. Simmons, James D. Wehrly, Jr., Michael J. Bertram
  • Patent number: 5281772
    Abstract: A method of forming solder stops on a thick film, comprising a conductive metal and an inorganic oxide, including the step of directing a laser beam onto the film to form a surface consisting essentially of fused inorganic oxides which acts as a solder stop.
    Type: Grant
    Filed: October 28, 1991
    Date of Patent: January 25, 1994
    Assignee: Delco Electronics Corporation
    Inventors: Bruce A. Myers, John K. Isenberg, Christine R. Coapman, James A. Blanton
  • Patent number: 5276961
    Abstract: A Demountable Tape-Automated Bonding System for providing connections to a chip is disclosed. The chip is attached to or is held in place on a TAB frame that includes a generally flexible dielectric film which bears a pattern of conductive traces. A multitude of closely-spaced contacts which protrude downward from the chip contact the conductive traces on the TAB frame. The chip may be maintained in its proper location on the TAB frame by either a bonding agent or by compressive forces supplied by a cap which is fastened to the TAB frame and to a substrate, such as a printed circuit board, below the TAB frame. The substrate carries an array of conductive traces around the edges of the substrate. These traces match the traces on the TAB frame. The conductor traces on the TAB frame and on the substrate are held in contact with each other by compressive forces supplied by the cap which is fastened to the TAB frame and to the substrate.
    Type: Grant
    Filed: April 28, 1992
    Date of Patent: January 11, 1994
    Assignee: Hewlett-Packard Company
    Inventors: Farid Matta, Kevin C. Douglas
  • Patent number: 5274911
    Abstract: An electrical device includes an electrical component encased in encasement material with leads electrically coupled to the component and extending through the encasement material for attachment to an electrical circuit. The leads include an internal region plated with solder for attachment to the component, an external region plated with solder for electrically coupling the component to a circuit board, and an intermediate region between the internal and external regions which is devoid of solder and which is positioned to be in contact with the encasement material to define an unplated interface between the lead and the encasement material.
    Type: Grant
    Filed: October 21, 1991
    Date of Patent: January 4, 1994
    Assignee: American Shizuki Corporation
    Inventor: Joseph A. Toro
  • Patent number: 5274531
    Abstract: A lead frame for mounting a circuit component includes plural terminal legs for connection with a circuit. At least two of the terminal legs have pads for connection with the circuit component which has wire leads. The lead frame pads and wire leads are of materials which are incompatible for welding. A rivet of a material compatible for welding with the component lead wires is mounted in the pad of each terminal leg for connection with the circuit element. A weld secures each component lead wire with one of the rivets.
    Type: Grant
    Filed: June 17, 1991
    Date of Patent: December 28, 1993
    Assignee: The Intec Group, Inc.
    Inventor: Stanley M. Perlman
  • Patent number: 5271147
    Abstract: An outer bonding tool is used for bonding outer leads of a tape carrier on corresponding pads which are formed on a circuit substrate by solder after bonding inner leads of the tape carrier and electrodes of a generally rectangular semiconductor chip. The outer bonding tool includes a main body having a bottom surface, a pressing surface provided at the bottom surface of the main body for pressing against the outer leads of the tape carrier, where the pressing surface has a generally rectangular frame shape, and a groove formed in the pressing surface and extending generally perpendicularly to a corresponding group of outer leads extending from one side of the semiconductor chip. A width of the groove taken in a direction in which the corresponding group of outer leads extend is smaller than a length of the outer leads.
    Type: Grant
    Filed: June 9, 1992
    Date of Patent: December 21, 1993
    Assignee: Fujitsu Limited
    Inventor: Kinuko Ogata
  • Patent number: 5271146
    Abstract: An apparatus for supplying an electronic component to a mounting head of an electronic component mounting machine in such a manner that a lead guard interconnecting the front ends of leads of the electronic component is separated from a body of the electronic component before the electronic component is picked up by the mounting head. The apparatus includes a lower mold movable between a receiving position in which an electronic component having a lead guard is received on a die on the lower mold, a punching position in which the lead guard is separated from the body of the electronic component by a punch cooperating with the die and a picking-up position in which the electronic component devoid of the lead guard is picked up from the die. The electronic component supplied from a chute to a component rest is delivered by a transfer unit to the die while at rest in the receiving position. The transfer unit may include a vacuum nozzle for releasably holding the electronic component.
    Type: Grant
    Filed: September 18, 1992
    Date of Patent: December 21, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Yasuhiro Kashiwagi
  • Patent number: 5271148
    Abstract: A leadframe includes a dambar separated from the to be formed molded package edge by temporary slugs. The temporary slugs are partially stamped through the thickness of the leadframe and are then pushed back into position. During encapsulation, unwanted encapsulation or flash flow is prevented from flowing farther than the closest edge of the temporary slugs. In a subsequent operation, the dambar and slugs are punched away in a single operation.
    Type: Grant
    Filed: November 5, 1992
    Date of Patent: December 21, 1993
    Assignee: National Semiconductor Corporation
    Inventors: Alphee J. Desrochers, Gary R. Hamming
  • Patent number: 5267379
    Abstract: A crystal controlled clock oscillator resin encapsulated in a surface mount device (SMD) package incorporates on a lead frame a crystal oscillator, an integrated circuit, a power supply filter capacitor and, optionally, a feedback resistor. In the fabrication of the device, resin is injected at a position and in a direction relative to the components so as to minimize disturbance of the lead frame and the components mounted thereon.
    Type: Grant
    Filed: March 1, 1993
    Date of Patent: December 7, 1993
    Assignee: AVX Corporation
    Inventor: Hoklay Pak
  • Patent number: 5263242
    Abstract: An improved semiconductor package (10) having a segmented lead frame (14) and (514) is disclosed. The preferred segmented lead frame (14) is divided into essentially identical segments (27) which have planes (22) attached to at least some of the associated individual leads (28). Segmentation of the lead frame (14) allows for the use of planes in inexpensive plastic and ceramic packages. Segmentation further allows the use of inexpensive aluminized stripes (42) to aluminize portions of individual leads (28) even in quad package configurations. An alternate equally preferred segmented lead frame (514) is provided for those applications wherein asymmetrical lead frames are required. Segmentation of the alternate segmented lead frame (514) permits the use of planes (522) and (552), while also limiting the cost of producing the alternate lead frame (514) especially when the etching method of production is required.
    Type: Grant
    Filed: January 4, 1993
    Date of Patent: November 23, 1993
    Assignee: CN Industries Ltd.
    Inventors: Narendra N. Singh Deo, Alexander H. C. Chang
  • Patent number: 5263241
    Abstract: A carrier frame has cells with inwardly extending thin flexible tabs. Pressure sensor housings are molded into the frame cells such that only the tips of the tabs penetrate the housing wall and after processing the housings are readily pushed out of the frame. A lead frame is insert molded at the same time. During molding the cells of the frame are open ended and after molding a reinforcing tie bar is attached across the open side of the frame to close the cells. A flange is bent up on the opposite side to lend rigidity to the frame. Preformed code flags are provided in the frame and selectively bent out for coding.
    Type: Grant
    Filed: April 6, 1992
    Date of Patent: November 23, 1993
    Assignee: Delco Electronics Corporation
    Inventors: John M. Hart, Jr., John M. Matly
  • Patent number: 5260168
    Abstract: A method for patterning a tape to which an integrated circuit may be bonded including providing a tape having a top layer of unexposed film which, when exposed in an interconnection pattern and developed, acts as a mask for processing a photoprocessable layer of the tape to provide conductive portions in an interconnection pattern on the tape.
    Type: Grant
    Filed: June 19, 1992
    Date of Patent: November 9, 1993
    Assignee: The Foxboro Company
    Inventor: Robert D. Vernon
  • Patent number: 5258575
    Abstract: A ceramic-glass integrated circuit package utilizing low temperature sealing glass and having reduced lead to lead capacitance. The inventive package includes a cap and a base. The base includes a ceramic base substrate, a first layer of conductive material adjacent the ceramic base substrate to serve as a ground plane, and a second layer of conductive material adjacent the ceramic base to serve as a power plane. A glass material is selectively deposited on the base substrate to form at least one discrete void for housing an integrated circuit chip, and a lead frame having a plurality of leads is embedded in the glass material and electrically connected to the ground and power planes but physically separated therefrom. In one embodiment, integral decoupling capacitors are further included on the base substrate. Incorporation of ground and power planes and decoupling capacitors into a ceramic-glass integrated circuit package adapts these low cost packages to high-speed applications.
    Type: Grant
    Filed: April 22, 1991
    Date of Patent: November 2, 1993
    Assignee: Kyocera America, Inc.
    Inventors: Henry Beppu, Toshi Kusuhara, Aki Nomura
  • Patent number: 5255430
    Abstract: A card-independent method of forming a module for subsequent attachment to a card body includes increasing both the area and the height of contact pads on an integrated circuit die and includes forming a leadframe in which contact sites are electrically connected to the contact pads of the die by Z-axis epoxy. The epoxy is unidirectionally conductive, so that the epoxy as a mechanical link, an electrical link, and acts as an overcoating of the active side of the die A die-alignment layer having a center cavity properly positions the contact pads of the die relative to contact sites of the leadframe.
    Type: Grant
    Filed: October 8, 1992
    Date of Patent: October 26, 1993
    Assignee: Atmel Corporation
    Inventor: Kent A. Tallaksen
  • Patent number: 5253415
    Abstract: A lead assembly and method for forming electrical connections between pads on an integrated circuit chip and pads on a circuit board includes small diameter wires adhesively bonded to a supporting tape. The wires may be inwardly fanned to form connections between relatively widely spaced circuit board pads and relatively closely spaced chip pads.
    Type: Grant
    Filed: September 14, 1992
    Date of Patent: October 19, 1993
    Assignee: Die Tech, Inc.
    Inventor: Richard K. Dennis
  • Patent number: 5251372
    Abstract: A fully automated TAB framer includes a pair of vertically-oriented pneumatic rams having vacuum operated pick up heads on the lower ends thereof. A cutting assembly cuts TAB segments from a roll of film having a number of such segments thereon. The rams are laterally shiftable between two positions for picking up TAB segments, placing a segment in a carrier body, picking up a retainer member and inserting the retainer member into the carrier body thereby forming a framed TAB segment.
    Type: Grant
    Filed: March 5, 1991
    Date of Patent: October 12, 1993
    Inventors: Jon C. Houghton, Chester H. Petry, Jr.
  • Patent number: 5251679
    Abstract: The present invention is directed to a method and apparatus for bending and cutting outboard terminals, or leads, of surface mountable integrated modules applied to a carrier frame wherein slots are cut in the carrier frame so that retaining webs remain between the slots and the circuit modules. Each of the retaining webs interconnects the outboard terminals along one side of the circuit module to stabilize the terminals during a subsequent bending of the leads. A combination cutting and bending die is moved downward to cut the retaining webs free from one another and to bend the leads into their desired shape. The retaining webs and any excess length of the outboard terminals is then trimmed off, all while the circuit module is held in a hold-down part so that no stresses are transferred to the chip module during bending.
    Type: Grant
    Filed: June 8, 1992
    Date of Patent: October 12, 1993
    Assignee: Siemens Nixdorf Informationssysteme AG
    Inventor: Matthias Schweizer
  • Patent number: 5249354
    Abstract: A method of making a semiconductor integrated circuit package (20) containing a chip (25)--and/or other active or passive electronic component(s)--enclosed in an encapsulation layer (24) can be made thinner by abandoning the limitation of equality of thicknesses of electrically conductive lead frame fingers (21) and paddle (mounting pad, 22)--the latter of which supports the chip (25) during fabrication of the package prior to encapsulation. As a result, a desired downset d of the paddle (22) with respect to inner portions (21.1) of the conductive fingers (21) automatically occurs without any bending of any die paddle support fingers--the latter of which support the paddle during fabrication of the package. The paddle (22) advantageously is made by preparing a metallic pad sheet having a thickness equal to that of the paddle (22), and then dividing it into a multiplicity of pieces, each of the pieces having a contour such that the piece is suitable for use as the paddle (22).
    Type: Grant
    Filed: April 24, 1992
    Date of Patent: October 5, 1993
    Assignee: American Telephone & Telegraph Co.
    Inventor: Russell M. Richman
  • Patent number: 5248075
    Abstract: The present invention relates to integrated circuits (ICs) fabrication and testing. Particularly, there is an IC pin/lead trimming and forming machine that is adapted to electrically test ICs for electrical defects. Uniquely, the IC testing can occur at any pin forming station after the IC pins or leads have been electrically isolated from each other and from other ICs on a lead frame. This arrangement will allow for testing of the individual ICs much sooner than has hereinbefore existed after undertaking the encapsulation process.
    Type: Grant
    Filed: December 11, 1992
    Date of Patent: September 28, 1993
    Assignee: Micron Technology, Inc.
    Inventors: Jerry A. Young, Steven L. Mitchell, Steven W. Heppler
  • Patent number: 5241740
    Abstract: An automated excise-form and shuttle system and apparatus for surface mount electronic components. The apparatus comprises an electronic stepper motor which turns a lead screw to move a die shuttle mounted on a rail on the base. The shuttle has a precision lead screw nut mounted thereon which allows the shuttle to move by turning the lead screw. The shuttle rides on ball bearings which are mounted inside the shuttle with the shuttle and ball bearings moveable secured to the rail. A die shuttle utilizing a mechanical elevating and retracting cam system drives a load arm attached to a die plate to shuttle the component to a die assembly for trim and form functions. The lead screw slideably moves the excised component from a present station where a pick-up device removes the component.
    Type: Grant
    Filed: August 24, 1992
    Date of Patent: September 7, 1993
    Inventor: John H. Kettler
  • Patent number: 5239806
    Abstract: A semiconductor package includes a lead frame with a die or chip mounted on a die pad, a base made of a thermoplastic material and having a cavity, and a lid made of thermoplastic material ultrasonically welded to the base to cover the cavity and protect the electronic device in the package. The package may include a substrate with conductive traces.A method of attaching a lid to a semiconductor package base includes the steps of providing a semiconductor package base having an open cavity, providing a thermoplastic lid that covers the open cavity, placing the lid on the semiconductor package base so that the lid covers the open cavity, applying pressure to hold the lid and body together, and attaching the lid to the base by ultrasonically welding them together.
    Type: Grant
    Filed: November 17, 1992
    Date of Patent: August 31, 1993
    Assignee: AK Technology, Inc.
    Inventor: William H. Maslakow
  • Patent number: 5235245
    Abstract: A metallic frame for use in a fluorescent display panel having a CIG (chip in glass) structure and containing a driver IC chip in a vacuum chamber. The metallic frame includes a box-type metallic shield covering the IC chip, metallic external leads, and a deformable part coupled between the box-type metallic shield and the metallic external leads. The deformable part deforms more easily than the metallic shield and the leads upon receiving a tensile force. The deformable part is preferably formed at a bent section of the metallic shield or near a shield side end of the metallic external leads. The deformable part preferably consists of two bent or curved elements which are positioned to form a circle, ellipse, or polygon.
    Type: Grant
    Filed: October 21, 1991
    Date of Patent: August 10, 1993
    Assignee: NEC Corporation
    Inventors: Takeshi Uchimura, Masaharu Satonaka
  • Patent number: 5233134
    Abstract: In the disclosed semiconductor device mounting arrangement, an integrated circuit has an elastic body on one surface and protruding electrodes on the opposite surface and a support frame includes a pressing member to engage the elastic body directly so as to force the protruding electrodes into engagement with a wiring pattern formed on a substrate. In the disclosed semiconductor device mounting method, a liquid crystal display panel having an integrated circuit with protruding electrodes is placed on a wiring pattern and an elastic body is provided on the surface of the integrated circuit which is opposite from the protruding electrodes. The assembled components are positioned between a pressing portion and a base member of a support frame so that the elastic body is compressed and the reaction from the compression is utilized to engage the protruding electrodes with the wiring pattern.
    Type: Grant
    Filed: June 5, 1992
    Date of Patent: August 3, 1993
    Assignee: Rohm Co., Ltd.
    Inventor: Minoru Hirai
  • Patent number: 5231755
    Abstract: A method of fabricating a lead frame inner connection assembly includes forming a lead frame having conductive fingers with inner lead ends connected to an electronic component, such as an integrated circuit die. Fluid-soluble alignment bars are deposited and cured within the areas between the conductive fingers. Preferably, the alignment bars are water soluble and are deposited using silk screen techniques. In a subsequent step of encapsulating the electronic component and inner lead ends, the alignment bars function as dams to prevent the flow of material beyond the desired extent of the encapsulation. At the ends of the alignment bars opposite to the electronic component a molded carrier ring may be formed, with the alignment bars again acting as dams to limit the flow of material. Conductive material can be contained within fluid-soluble material, thereby providing some degree of electrical connection between adjacent conductive fingers via the alignment bars.
    Type: Grant
    Filed: December 30, 1992
    Date of Patent: August 3, 1993
    Assignee: Emanuel Technology, Inc.
    Inventor: Norbert T. Emanuel
  • Patent number: 5233131
    Abstract: To bridge the gap between a semiconductor die and the leads of a leadframe, an insulating bridging and support member is used to support the die. The member has thereon conductive traces connected to the die. Provided in the interior portion of the member away from its edges are connecting structures such as holes, slots or grooves. The leads have bent end portions engaging the holes, slots or grooves. The bent end portions are soldered or otherwise connected to the inner surfaces of the holes, slots or grooves by soldering to electrically connect the leads to the traces and to physically attach the member to the leadframe. The above-described structure permits the bonding sites between adjacent leads to the member to be greater than lead spacing of the leadframe. The leads are in the shape of elongated rods of uniform cross-section to maximize the lead density possible around the bridging and support member.
    Type: Grant
    Filed: September 16, 1991
    Date of Patent: August 3, 1993
    Assignee: VLSI Technology, Inc.
    Inventors: Louis H. Liang, Jon M. Long
  • Patent number: 5230144
    Abstract: A lead frame having inner leads which secures predetermined mechanical strength and which has no possibility of generation of twisting or the like through working, and a method of producing such a lead frame.
    Type: Grant
    Filed: March 16, 1992
    Date of Patent: July 27, 1993
    Assignee: Seiko Epson Corporation
    Inventor: Tetsuya Ootsuki
  • Patent number: 5228192
    Abstract: A stacked packaging assembly for a plurality of integrated circuit devices employs a web of flexible interconnect material folded into a `layered` arrangement of parallel web fingers onto which a plurality of integrated circuit devices are surface-mounted. The leads of the integrated circuit devices are attached to interconnect links of the flexible interconnect web. A plurality of heat sink plates are interleaved with the folded web fingers of the stack, so as to engage the integrated circuit devices mounted on the web fingers. The heat sink plates are retained by thermally conductive spacer blocks along their edges. The spacer blocks are clamped together in a compact laminate structure, so as to form a rigid support which relieves mechanical stresses at the folds of the web fingers.
    Type: Grant
    Filed: January 24, 1992
    Date of Patent: July 20, 1993
    Assignee: Harris Corporation
    Inventor: Matthew M. Salatino
  • Patent number: 5226226
    Abstract: A tube-shaped tray that comprises adjacent compartments for semiconductor devices disposed linearly along the length of the tray. Each compartment consists of a die-shaped bottom container having a supporting structure conforming to the specified geometry of the leads in the formed semiconductor device. A film of protective and lubricating material is provided for placement on top of the device in each compartment, so that a forming tool can freely and safely cooperate with the supporting structure of the die-shaped bottom container to form the leads of the semiconductor device according to the desired specifications. The tray also includes a slidable retaining cover to prevent spillage and damage of the packaged devices.
    Type: Grant
    Filed: May 15, 1992
    Date of Patent: July 13, 1993
    Inventor: Richard H. J. Fierkens
  • Patent number: 5225633
    Abstract: A bridge chip interconnect system is used for electrically interconnecting first and second semiconductor chip devices. The first and second semiconductor chip devices each are mounted adjacent to each other with a space therebetween and respectively have first and second row of ohmic contact pads on their top surfaces. The bridge chip interconnect system includes a rigid bridge base which has a top surface and which is placed in the space between the first and second semiconductor chip devices; and a plurality of conducting beams which are fixed to the top surface of the rigid bridge base and which have dimensions to enable each of them to make contact with one of the ohmic contact pads form each of the first and second row of ohmic contact pads.
    Type: Grant
    Filed: October 4, 1991
    Date of Patent: July 6, 1993
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: Stewart C. Wigginton
  • Patent number: 5224264
    Abstract: A process for producing a film carrier having a superior lead strength, which comprises removing from a film carrier body of a two-layer structure consisting of a metal conductor layer and an organic resin insulating layer snch as a polyimide resin layer, a definite portion of the organic resin insulating layer, or alternatively removing from a film carrier body of a three-layer structure consisting of a metal conductor layer, an organic resin insulating layer and an adhesive layer therebetween, definite portions of the organic resin insulating layer and the adhesive layer, by means of a cutting machine, to form an opening part, and also cutting a portion of the metal conductor layer under the opening part, to reduce the thickness of the metal conductor layer.
    Type: Grant
    Filed: April 2, 1992
    Date of Patent: July 6, 1993
    Assignee: Chisso Corporation
    Inventors: Akio Takahashi, Shigenori Tokunaga, Hidenori Furukawa, Haruo Kato
  • Patent number: 5223321
    Abstract: A tape for use in tape-automated-bonding of integrated circuits is disclosed. A series of interconnection arrays ("frames") are arranged along the tape, each array being formed by a number of interconnection beams 3. A terminal ("bump") 6 is located on each beam 3 for bonding to a respective interconnection pad 7 of an integrated circuit 8. Conventional bumps are made of gold-plated copper and have uneven and unyielding bonding surfaces which can fail to provide consistent bonds. The bumps 6 of the tape disclosed comprise a conductive material having a Vickers hardness number of 55 or less, and thus have a compliance which facilitates more even bonding. A method of producing the tape is also disclosed.
    Type: Grant
    Filed: October 15, 1991
    Date of Patent: June 29, 1993
    Assignee: British Telecommunications plc
    Inventors: F. Nihal Sinnadurai, David J. Small, Alexander A. Blain, Kenneth Cooper
  • Patent number: 5223063
    Abstract: Method for bonding inner leads installed on a tab tape, which is fed in one direction in a bonding line, to electrodes of semiconductor elements via ultrasonic vibrations applied to a bonding tool mounted at one end of horn is performed in such a manner that the direction in which the ultrasonic vibrations are applied to the bonding tool is in the range of 30 to 60 degrees, preferably 45 degrees, with respect to the direction in which the tab tape is fed so that the bonding tool oscillates in such angles.
    Type: Grant
    Filed: June 17, 1992
    Date of Patent: June 29, 1993
    Assignee: Kabushiki Kaisha Shinkawa
    Inventors: Nobuto Yamazaki, Akihiro Nishimura
  • Patent number: 5221428
    Abstract: A method for producing a lead frame which comprises selectively forming a photoresist film on both sides of a lead frame material of three-layered structure, with an etching stop layer interposed between two metal layers, etching both sides thereof using the photoresist film as a mask, and removing the unnecessary part of the etching stop layer.
    Type: Grant
    Filed: September 6, 1991
    Date of Patent: June 22, 1993
    Assignee: Sony Corporation
    Inventors: Kenji Ohsawa, Akira Kojima, Hideyuki Takahashi
  • Patent number: 5216803
    Abstract: Removing welded outer lead bonds of TAB tape leads to contacts on a substrate. The method includes separating the electrical leads adjacent the weld bonds leaving a remnant, engaging the remnant with a shear tool, and moving the tool and bond relative to each other shearing the remnant. In some cases the tool is ultrasonically vibrated in a direction transversely to the relative movement of the tool and bond.
    Type: Grant
    Filed: December 11, 1991
    Date of Patent: June 8, 1993
    Assignee: Microelectronics And Computer Technology Corporation
    Inventors: Ernest R. Nolan, David H. Carey, Thomas A. Bishop
  • Patent number: 5216806
    Abstract: A method of packaging an integrated circuit chip having an active surface with a pattern of input/output pads. A package member is positioned to frame the integrated circuit chip, leaving a gap between the active chip surface and an interconnect support surface of the package member. A filler material is deposited within the gap, simultaneously fixing the chip to the package member and providing a bridge that is coplanar with the active and interconnect support surfaces. A pattern of conductive printed circuit interconnects is preferably photolithographically formed from the input/output pads to an edge of the package member. The resulting structure can then be electrically connected to a substrate, such as a printed circuit board, by bonding the interconnects to contact sites on the substrate. Optionally, a number of integrated circuit chips can be connected to a single package member to form a multi-chip module.
    Type: Grant
    Filed: September 1, 1992
    Date of Patent: June 8, 1993
    Assignee: Atmel Corporation
    Inventor: Ken Lam
  • Patent number: 5214846
    Abstract: A semiconductor device is fabricated by placing a semiconductor chip in a lead frame which has no die pad. Electrodes of the chip are connected by bonding wires to respective lead fingers. Additionally, the lead frame has movement restricting fingers which limit horizontal movement of the chip within the lead frame during injection of resin into a mold surrounding the chip. Furthermore, the mold has horizontal movement restricting projections to limit vertical movement of the chip within the mold cavity. The restriction on horizontal and vertical movement of the chip reduces the risk of the bonding wires being broken or short circuited during the resin injection process.
    Type: Grant
    Filed: August 30, 1991
    Date of Patent: June 1, 1993
    Assignee: Sony Corporation
    Inventors: Yukio Asami, Hiroyuki Fukasawa, Akira Kojima
  • Patent number: 5210936
    Abstract: The excise and lead form of TAB leads bonded to an integrated circuit chip. Leads extending beyond a sidewall are clamped between a first clamp and a form anvil at a first portion spaced from the chip. The leads are also clamped between an excise/form tool and a second clamp at a second portion spaced further from the chip than the first portion. An excise blade cuts the leads outside the second portion. Then the excise/form tool, second clamp and excise blade move downwards in a curved path toward the chip to form a first lead corner against the form anvil and a second lead corner against the excise/form tool without splaying or galling the leads.
    Type: Grant
    Filed: January 6, 1992
    Date of Patent: May 18, 1993
    Assignee: Microelectronics And Computer Technology Corporation
    Inventors: Richard L. Simmons, James D. Wehrly, Jr., Michael J. Bertram
  • Patent number: 5206188
    Abstract: A method for mounting an electronic component comprising providing an electrically insulating substrate having a recess for mounting the electronic component therein, a plurality of first leads disposed in the substrate side-by-side with a space therebetween and a plurality of second leads disposed between the first leads. Each first lead has an outer end projecting outwardly from the substrate and an inner end embedded within the substrate. Each second lead has an outer end outwardly extending from the substrate and an inner end exposed within the recess so that an electrical connection to the electronic component can be provided. One surface of the substrate has attached thereto a plurality of conductors, each having an outer end and an inner end disposed close to the recess for electrical connection to the electronic component. The inner ends of the first leads are connected to the outer ends of the conductors by through-hole conductors which penetrate the substrate.
    Type: Grant
    Filed: May 15, 1991
    Date of Patent: April 27, 1993
    Assignee: Ibiden Co., Ltd.
    Inventors: Atsushi Hiroi, Mitsuhiro Kondo, Kinya Ohshima