Assembling Formed Circuit To Base Patents (Class 29/831)
  • Patent number: 11943980
    Abstract: A display device includes a display panel, a circuit board, a first conductive film, first and second lower films, and first and second adhesive layers. The display panel includes a display area and a pad area which includes a first pad part. The circuit board is attached on the display panel and includes a lead part overlapping the first pad part. The first conductive film is between the display panel and the circuit board and electrically connects the first pad part and the lead part to each other. The first and second lower films are attached to the display panel to respectively correspond to the display area and the pad area. A thickness of the second adhesive layer between the display panel and the second lower film is less than a thickness of the first adhesive layer between the display panel and the first lower film.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: March 26, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Hayoung Choi
  • Patent number: 11877079
    Abstract: A pixel for an image sensor includes a photon sensor, a memory, and an accumulator. The photon sensor element portion outputs a signal to an accumulator, which then may add value stored in memory together and may transfer the result to the memory of another pixel. The pixel may be analog or digital and may be used in a pixel array for compressed sensing imaging. During imaging, a pseudo-random mask may also be used. The data collected during imaging may be used in compressed sensing and may be sent to an offline storage to be processed.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: January 16, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yibing Michelle Wang, Lilong Shi, Kwang Oh Kim
  • Patent number: 11631836
    Abstract: A display module includes a display panel, a first backplate, a super clear foam (SCF) assembly and a reinforcement plate. The first backplate is disposed on a side of a display panel opposite to a light emission surface. The SCF assembly and the reinforcement plate are disposed on a side of the first backplate opposite to the display panel. A receiving slot is defined in a side of the SCF assembly opposite to display panel. At least one part of the reinforcement plate is received in the receiving slot, and a driver chip is located on a side of the reinforcement plate opposite to the display panel.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: April 18, 2023
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Hao Xia
  • Patent number: 11488515
    Abstract: A foldable display device includes a display panel. The display panel includes a plurality of display areas divided by at least one or more folding lines. A plurality of data integrated circuits is configured to output a data voltage to the plurality of display areas. Each of the plurality of data integrated circuits includes at least one or more gamma voltage generators that are configured to output a plurality of gamma voltages. The at least one or more gamma voltage generators are connected by an external gamma line, so that boundaries between the display areas may be minimized or reduced.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: November 1, 2022
    Assignee: LG Display Co., Ltd.
    Inventor: JungMin Seo
  • Patent number: 11465417
    Abstract: A method of manufacturing a liquid discharge head substrate is provided. The method includes forming a first substrate that includes a semiconductor element and a first wiring structure; forming a second substrate that includes a liquid discharge element and a second wiring structure; and bonding the first wiring structure and the second wiring structure such that the semiconductor element and the liquid discharge element are electrically connected to each other after the forming the first substrate and the second substrate.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: October 11, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Toru Eto, Keiichi Sasaki
  • Patent number: 11401966
    Abstract: A fastener structure includes a body portion and a fastening body. The body portion has a solderable layer, and the solderable layer is soldered to a plate body. The fastening body combines movably with the body portion. The fastening body has a head and a fastening portion. The body portion or the fastening body, or both the body portion and the fastening body is provided on the plate body for soldering after it is picked up by a tool so that the body portion can combine with the plate body. Also, the body portion or the fastening body, or both the body portion and the fastening body combines with a assisting pickup unit, and the fastener structure is provided on the plate body for soldering after it is picked up by a tool through the assisting pickup unit so that the body portion can combine with the plate body.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: August 2, 2022
    Assignee: FIVETECH TECHNOLOGY INC.
    Inventor: Ting-Jui Wang
  • Patent number: 11346537
    Abstract: A junction hub may include a fixture body include a top portion and a bottom portion. The junction hub may further include a connector device for operably coupling a mounting structure to the fixture body. The junction hub may even further include a terminal block disposed in the fixture body for facilitating the connection of a power source to at least one lighting fixture.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: May 31, 2022
    Assignee: Volt, LLC
    Inventors: Michael Grant Breedlove, Sr., Jesse Daniel Harper
  • Patent number: 11310921
    Abstract: A method may include forming a plurality of multilayer cores wherein each multilayer core comprises a sheet of cured dielectric material having a layer of metal on each side of the sheet of cured dielectric material, patterning each layer of metal in the plurality of multilayer cores to form wiring traces in each layer of metal, embedding a solder element in at least one sheet of a plurality of sheets of uncured dielectric material, wherein the solder element having a melting point temperature within a temperature range of a curing temperature of the uncured dielectric material, forming a printed circuit board by alternately stacking the plurality of multilayer cores with the plurality of sheets of uncured dielectric material between each multilayer core, laminating the stack of multilayer cores and sheets of uncured dielectric material to cause curing of the sheets of uncured dielectric material and melting of the solder element.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: April 19, 2022
    Assignee: International Business Machines Corporation
    Inventors: Kyle Indukummar Giesen, Matteo Cocchini, Sylvain Pharand
  • Patent number: 11116119
    Abstract: A conveyance device used in a mounting system including a mounting-related device for applying a viscous liquid to and/or arranging a member on a processing target. This conveyance device uses a pallet having a pallet-side attachment section that holds a processing target. In addition, the conveyance device includes having a robot-side attachment section arranged at a distal end section of the conveyance robot for mounting the pallet-side attachment section and the conveyance robot is configured to convey the pallet in a mounted state between a loading position and a discharge position.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: September 7, 2021
    Assignee: FUJI CORPORATION
    Inventors: Tsuyoshi Hamane, Shinji Ichino
  • Patent number: 10820412
    Abstract: A circuit wire crossing structure, comprising a substrate with a supporting surface, an electrical circuit disposed on the supporting surface of the substrate, with the electrical circuit comprising, two lateral wires with one of the wires having a first terminal and a second terminal and another one of the lateral wires having a second terminal, wherein the first terminal and the second terminal are spaced apart from each other, and a central wire, disposed between and apart from the first terminal and the second terminal, and an electronic component arranged above the supporting surface and two terminals of the electronic component connecting with the first terminal and the second terminal, wherein the electronic component has an insulating shell facing the central wire, and an orthographic projection of the electronic component to the supporting surface extends across an orthographic projection of the central wire to the supporting surface.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: October 27, 2020
    Assignee: CYMMETRIK ENTERPRISE CO., LTD.
    Inventors: Shan-Jen Kuo, Frank Shang-Teng Chan, Yosephine Yulia Margaretha, Jung-Da Cheng, Jen-Chieh Wei
  • Patent number: 10694620
    Abstract: The present disclosure relates to a printed circuit board (PCB) device and methods for fabricating a PCB device. In some aspects, the PCB device can comprise a surface or internal layer including one or more electrically conductive traces configured to carry a signal or power plane. The PCB device can also comprise at least one thin film comprising an electrically insulating material disposed on the surface or the internal layer. Additionally, the PCB device can comprise one or more electrically conductive layers on the at least one thin film. In some aspects, the one or more electrically conductive layers and the one or more electrically conductive traces can be separated by the at least one thin film in a configuration that defines a capacitive frequency response between the one or more electrically conductive layers and the one or more electrically conductive traces.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: June 23, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Andrew James Hillenius, Jason Allen Harrigan
  • Patent number: 10609824
    Abstract: A multi-layer circuit board including a plurality of insulation bumps, a first conductive layer, and a second conductive layer is provided. The plurality of insulation bumps are disposed between a first substrate and a second substrate. A top portion of the plurality of insulation bumps is served as a circuit connection point. The first conductive layer is disposed on the first substrate and connected to the circuit connection point. The second conductive layer is disposed on the second substrate and connected to the circuit connection point.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: March 31, 2020
    Assignee: Winbond Electronics Corp.
    Inventor: Yu-Ming Chen
  • Patent number: 10594204
    Abstract: A circuit board accommodates a plurality of different source voltages. On the circuit board, a printed wire which constitutes a circuit is formed, a first circuit component used for a board which meets specifications for a first voltage or a second circuit component used for a board which meets specifications for a second voltage higher than the first voltage, is mounted, and spacing between adjacent printed wires is equal to or larger than a distance which secures an insulation distance when the second voltage is input.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: March 17, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenji Iwazaki, Yosuke Shinomoto, Kazunori Hatakeyama
  • Patent number: 10582865
    Abstract: Provided are a neural electrode for measuring a neural signal, and a method for manufacturing the same. The method for manufacturing the same includes forming an ITO electrode on a substrate, forming a passivation layer for exposing a portion of the ITO electrode, forming ITO nanowires on the ITO electrode, and forming a metal oxide on the ITO nanowires.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: March 10, 2020
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Hee Kim, Sang Don Jung
  • Patent number: 10507644
    Abstract: A liquid ejecting head including a print element substrate including an ejection opening for ejecting a liquid, a wiring member including wiring electrically connected to the print element substrate, a connection electrically connecting the print element substrate to the wiring member, a support member supporting the wiring member, a sealing material sealing the connection, and a cover member provided on the support member. In the liquid ejecting head, the wiring member is a strip-shaped member, and a portion of the wiring member provided on a surface of the support member that supports the wiring member is covered by the sealing material and the cover member.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: December 17, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shogo Kawamura, Toshiaki Hirosawa, Genji Inada, Hiromasa Amma, Yasuhiko Osaki, Takuya Iwano, Shin Ishimatsu
  • Patent number: 10413650
    Abstract: A molded interconnect device can carry a Hall sensor for transducing a position of a rotor of the implantable blood pump. The molded interconnect device includes one or more integrated electronic circuit traces configured to electrically connect the hall sensor with a printed circuit board of the implantable blood pump, and the molded interconnect device is configured to be mounted to the printed circuit board.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: September 17, 2019
    Assignee: TC1 LLC
    Inventors: Samuel Schimpf, Mark McChrystal, Joseph C. Stark, III, Andre Siebenhaar
  • Patent number: 10383236
    Abstract: A manufacturing method for circuit board on copper ceramic substrate comprises stamping a copper sheet into a copper circuit board in a shape matching a ceramic substrate, fitting the copper circuit board to the ceramic substrate and sintering the copper circuit board and the ceramic substrate together by direct bonding copper.
    Type: Grant
    Filed: July 31, 2016
    Date of Patent: August 13, 2019
    Assignee: SHUNSIN TECHNOLOGY (ZHONG SHAN) LIMITED
    Inventor: Fei Ren
  • Patent number: 10207103
    Abstract: Implementations described and claimed herein provide thin film devices and methods of manufacturing and implanting the same. In one implementation, a shaped insulator is formed having an inner surface, an outer surface, and a profile shaped according to a selected dielectric use. A layer of conductive traces is fabricated on the inner surface of the shaped insulator using biocompatible metallization. An insulating layer is applied over the layer of conductive traces. An electrode array and a connection array are fabricated on the outer surface of the shaped insulator and/or the insulating layer, and the electrode array and the connection array are in electrical communication with the layer of conductive traces to form a flexible circuit. The implantable thin film device is formed from the flexible circuit according to the selected dialectic use.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: February 19, 2019
    Assignee: PACESETTER, INC.
    Inventors: John R. Gonzalez, Jeffrey Urbanski, Tommy Cushing
  • Patent number: 10101367
    Abstract: A microelectronic test device comprising an organic substrate, a probe holder, and an interposer disposed between the organic substrate and the probe holder, wherein the interposer has a coefficient of thermal expansion that is less than a coefficient of thermal expansion of the organic substrate. The interposer may effectively decouple the organic substrate from probes in the probe holder, which may substantially reduce or eliminate probe misalignment due to the coefficient of thermal expansion mismatch between the organic substrate and other components of the microelectronic test device and to provide require stiffness to the organic substrate.
    Type: Grant
    Filed: April 10, 2015
    Date of Patent: October 16, 2018
    Assignee: Intel Corporation
    Inventors: Jin Pan, Jin Yang, Erkan Acar
  • Patent number: 9817029
    Abstract: A testing probe structure for wafer level testing semiconductor IC packaged devices under test (DUT). The structure includes a substrate, through substrate vias, a bump array formed on a first surface of the substrate for engaging a probe card, and at least one probing unit on a second surface of the substrate. The probing unit includes a conductive probe pad formed on one surface of the substrate and at least one microbump interconnected to the pad. The pads are electrically coupled to the bump array through the vias. Some embodiments include a plurality of microbumps associated with the pad which are configured to engage a mating array of microbumps on the DUT. In some embodiments, the DUT may be probed by applying test signals from a probe card through the bump and microbump arrays without direct probing of the DUT microbumps.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: November 14, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Mill-Jer Wang, Ching-Fang Chen, Sandeep Kumar Goel, Chung-Sheng Yuan, Chao-Yang Yeh, Chin-Chou Liu, Yun-Han Lee, Hung-Chih Lin
  • Patent number: 9595453
    Abstract: The present disclosure relates to a chip package method and a package assembly. A metal plate is micro-etched to form trenches having a predetermined depth. A metallic conductor is formed as a leadframe by filling the trenches with a material having relatively small adhesion with the metal plate. In such manner, the metal plate can be peeled off from a package body after the chip is electrically coupled to the metallic conductor and encapsulated by a molding process. A bottom of the metallic conductor is exposed from the package body. A chip package is thus completed. It simplifies a manufacture process for forming a chip package, reduces manufacture cost, and increases reliability of the chip package.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: March 14, 2017
    Assignee: Silergy Semiconductor Technology (Hangzhou) Ltd.
    Inventors: Xiaochun Tan, Jiaming Ye
  • Patent number: 9579436
    Abstract: Techniques for mounting a sensor are disclosed. In some implementations, a molded interconnect device carries a sensor for transducing a position of a rotor of the implantable blood pump. The molded interconnect device includes one or more integrated electronic circuit traces configured to electrically connect the Hall sensor with a printed circuit board of the implantable blood pump, and the molded interconnect device is configured to be mounted to the printed circuit board.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: February 28, 2017
    Assignee: THORATEC CORPORATION
    Inventors: Mark McChrystal, Joseph C. Stark, III
  • Patent number: 9543255
    Abstract: A laminate structure includes a conductive layer and a dielectric layer in contact with the conductive layer, the dielectric layer comprises a selectively patterned high-modulus dielectric material that balances a differential stress between the conductive layer and the dielectric layer to mechanically stiffen the laminate structure and reduce warpage.
    Type: Grant
    Filed: February 15, 2016
    Date of Patent: January 10, 2017
    Assignee: International Business Machines Corporation
    Inventors: Mark C. Lamorey, Shidong Li, Janak G. Patel, Douglas O. Powell, David J. Russell, Peter Slota, Jr., David B. Stone
  • Patent number: 9530831
    Abstract: A flexible display device and a method of manufacturing the same are provided. The flexible display device comprises a first flexible substrate including a display area including an organic light emitting layer, and a peripheral circuit area, and a second flexible substrate coming in contact with the first flexible substrate and including a pattern for facilitating bending thereof, wherein the second flexible substrate has a certain shape according to the pattern, and the first flexible substrate has a shape corresponding to the certain shape. Various embodiments of the present invention provide a flexible display device capable of realizing a narrow bezel-type or bezel-free display device and simultaneously realizing improved types of design, facilitating bending of a bezel area so as to realize a narrow bezel-type or bezel-free display device, and minimizing damage to an area to be bent.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: December 27, 2016
    Assignee: LG Display Co., Ltd.
    Inventors: Chanwoo Lee, JongHyun Park, TaeWoo Kim, Jaekyung Choi, Sangcheon Youn, SungJoon Min, SeYeoul Kwon, KwonHyung Lee
  • Patent number: 9492599
    Abstract: A molded interconnect device can carry a Hall sensor for transducing a position of a rotor of the implantable blood pump. The molded interconnect device includes one or more integrated electronic circuit traces configured to electrically connect the hall sensor with a printed circuit board of the implantable blood pump, and the molded interconnect device is configured to be mounted to the printed circuit board.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: November 15, 2016
    Assignee: THORATEC CORPORATION
    Inventors: Samuel Schimpf, Mark McChrystal, Joseph C. Stark, III, Andre Siebenhaar
  • Patent number: 9414501
    Abstract: The present invention provides systems and methods for creating interlayer mechanical or electrical attachments or connections using filaments within a three-dimensional structure, structural component, or structural electronic, electromagnetic or electromechanical component/device.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 9, 2016
    Assignee: Board of Regents, The University of Texas System
    Inventors: Ryan B. Wicker, Francisco Medina, Eric MacDonald, Danny W. Muse, David Espalin
  • Patent number: 9396972
    Abstract: An IC assembly includes multiple microelectronic dies embedded in a substrate material using capillary forces such that the contact surface of each microelectronic die is coplanar with a planar upper surface of the substrate material. The substrate material is deposited as a layer of uncured polymer in a paste (or other solid form) on a base chip, and then the microelectronic dies are mounted on the layer surface in a predefined pattern. The uncured polymer is then heated until becomes a flowable liquid, causing the microelectronic dies to be pulled into the liquid polymer by capillary forces until the contact surface of each microelectronic die is coplanar with the upper liquid polymer surface. The liquid polymer is then cured to form the substrate material as a cross-linked robust solid film that fixedly secures the microelectronic dies in the predefined pattern. The microelectronic dies are then interconnected using standard metallization techniques.
    Type: Grant
    Filed: February 11, 2014
    Date of Patent: July 19, 2016
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Gregory L. Whiting, Rene A. Lujan
  • Patent number: 9332657
    Abstract: A method for manufacturing a multilayer printed wiring board includes preparing a metal layer having metal member portions and connector portions connecting the metal member portions, forming laminated multilayer structures having electronic components and the metal member portions, respectively, forming cut penetrating holes in the connector portions of the metal layer, respectively, such that the connector portions of the metal layer are cut, and forming interlayer insulation layers on the laminated multilayer structures such that the laminated multilayer structures are interposed between the interlayer insulation layers. The forming of the interlayer insulation layers includes filling the cut penetrating holes with a resin derived from one or more interlayer insulation layers on the laminated multilayer structures.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: May 3, 2016
    Assignee: IBIDEN Co., Ltd.
    Inventors: Toshiki Furutani, Yukinobu Mikado, Mitsuhiro Tomikawa, Tomoya Terakura
  • Patent number: 9296056
    Abstract: An apparatus includes a top plate sized to cover components for a PCB in a solder operation to attach the components to a top surface of the PCB. The apparatus may include heat shielding devices and/or heat attracting devices. Each heat shielding device reduces heat transfer to a component to be soldered to the PCB and is positioned in the top plate to decrease heat to the component corresponding to the heat shielding device. Each heat attracting device increases heat transfer to a component to be soldered to the PCB and each heat attracting device is positioned in the top plate to increase heat to the component under the heat attracting device. The top plate is coupled to the heat shielding and/or heat attracting devices and includes a recess for each component configured with a heat shielding device or a heat attracting device.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: March 29, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel James Buschel, Michael J Fisher, James Edward Tersigni
  • Patent number: 9258907
    Abstract: A method for making conformal non-planar multi-layer circuitry is described. The method can include providing a substrate having a non-planar surface and depositing a first conformal dielectric layer on the substrate, the first conformal dielectric layer conforming to the non-planar surface of the substrate and having a non-planar surface. The method can also include applying a first conformal circuitry layer on the first conformal dielectric layer. The method can include depositing a second conformal dielectric layer on the first conformal circuitry layer, the second conformal dielectric layer conforming to a non-planar surface of the first conformal circuitry layer, and applying a second conformal circuitry layer on the second conformal dielectric layer. Successive layers can be sequentially deposited. Microvias may provide electrical connections between circuit layers.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: February 9, 2016
    Assignee: Lockheed Martin Corporation
    Inventors: Stephen Gonya, Kenn Twigg, Jim Patterson
  • Patent number: 9244099
    Abstract: Probe head assemblies, components of probe head assemblies, test systems including the probe head assemblies and/or components thereof, and methods of operating the same. The probe head assemblies are configured to convey a plurality of test signals to and/or from a device under test and include a space transformer, a contacting assembly, and a riser that spatially separates the space transformer from the contacting assembly and conveys the plurality of test signals between the space transformer and the contacting assembly. The contacting assembly may include a frame that defines an aperture and has a coefficient of thermal expansion that is within a threshold difference of that of the device under test, a flexible dielectric body that is attached to the frame, maintained in tension by the frame, and extends across the aperture, and a plurality of conductive probes. The plurality of conductive probes may include a dual-faceted probe tip.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: January 26, 2016
    Assignee: Cascade Microtech, Inc.
    Inventors: Koby Duckworth, Eric Hill
  • Patent number: 9198304
    Abstract: A method for manufacturing a rigid-flexible printed circuit board includes following steps. First, a flexible PCB is provided. The flexible PCB includes a base and an electrical trace layer on the base. The flexible PCB includes a first region and a second region connected to the first region. The first and second regions define a borderline. Second, a protective film and a peelable layer are sequentially formed on the electrical trace layer in the first region and part of the second region. Third, a copper coil, an adhesive tape and the flexible circuit board are laminated together. Fourth, the copper coil in the second region is etched to form an outer electrical trace layer. Last, the copper coil in the first region is removed and the peelable layer and the adhesive tape are peeled off, thereby obtaining an R-F PCB.
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: November 24, 2015
    Assignees: FuKui Precision Component (Shenzhen) Co., Ltd., Zhen Ding Technology Co., Ltd.
    Inventor: Biao Li
  • Patent number: 9150412
    Abstract: A method for producing a functional unit with a gas converter (1) and a flame ionization detector (10) is produced with the gas converter (1) and the flame ionization detector (10) being connected together as parts of a multi-layer ceramic (6).
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: October 6, 2015
    Assignee: KROHNE Messtechnik GmbH
    Inventor: Winfred Kuipers
  • Publication number: 20150135525
    Abstract: A method for selectively transferring active components from a source substrate to a destination substrate includes providing a source substrate having a process side including active components and a back side opposite the process side, the active components having respective primary surfaces including electrical connections thereon adjacent the process side and respective secondary surfaces opposite the primary surfaces and facing the back side; pressing a first stamp having first pillars protruding therefrom against the active components on the process side of the source substrate to adhere the respective primary surfaces of the active components including the electrical connections thereon to respective transfer surfaces of the first pillars; pressing a second stamp having second pillars protruding therefrom against the active components on the first pillars of the first stamp to adhere the respective secondary surfaces of the active components to respective transfer surfaces of the second pillars, wherei
    Type: Application
    Filed: November 14, 2014
    Publication date: May 21, 2015
    Inventor: Christopher Bower
  • Patent number: 9032608
    Abstract: In a method for manufacturing at least one mechanical-electrical energy conversion system including multiple individual parts, and a mechanical-electrical energy conversion, multiple different individual parts are positioned in an assembly device and joined in joining areas assigned to the individual parts in the assembly device, the individual parts including at least one piezoelectric element, one support structure and one seismic mass.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: May 19, 2015
    Assignee: ROBERT BOSCH GMBH
    Inventors: Franz Laermer, Thorsten Pannek, Ralf Reichenbach, Marian Keck
  • Publication number: 20150131136
    Abstract: A micromechanical component is described having a first substrate that has a first front side a first rear side facing away from the first front side; first printed conductors that are fashioned on the first front side of the first substrate; a plurality of actuator devices that are fashioned on and/or in the first substrate and that are electrically bonded to the first printed conductors, the actuator devices each having at least one stator electrode and each having at least one actuator electrode that works together with the at least one stator electrode, which are fashioned such that a voltage can be applied between the actuator electrode and cooperating stator electrode in such a way that the actuator electrode can be displaced relative to the stator electrode
    Type: Application
    Filed: November 11, 2014
    Publication date: May 14, 2015
    Inventors: Hans ARTMANN, Jochen REINMUTH
  • Patent number: 9027242
    Abstract: A method of manufacturing an electrical device comprises the steps of providing a substrate, providing an electrical component on the substrate, providing a first electrical contact on the substrate that is electrically connected to the electrical component, and providing an electrochemical cell on or integrating the substrate for providing electrical energy to said electrical component. The electrochemical cell comprises at least one electrochemical layer comprising a cured or dried ink and a first electrode contact electrically connected to said at least one electrochemical layer. The method further includes the step of securing the electrochemical cell to the substrate through an electrically conductive connection that provides both a structural connection and an electrical connection between the first electrical contact and the first electrode contact.
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: May 12, 2015
    Assignee: Blue Spark Technologies, Inc.
    Inventor: Gary R. Tucholski
  • Patent number: 9027240
    Abstract: For the production of a flexible circuit configuration, which contains a layer sequence and a film connected thereto, for the creation of through contacts through the film up to terminal surfaces of the layer sequence, it is proposed that the film be connected unstructured to the layer sequence provided in a defined position on the substrate and then, while the composite of layer sequence and film remains on the substrate, perforations be created through the film up to terminal surfaces of a conductive layer of the layer sequence and contact metal be deposited in structured form on the film and in the perforations as through contacts.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: May 12, 2015
    Assignee: Cicor Management AG
    Inventors: Ernst Feurer, Bruno Holl, Alexander Kaiser, Karin Ruess
  • Publication number: 20150126134
    Abstract: Devices and methods related to packaging of radio-frequency (RF) devices on ceramic substrates. In some embodiments, a packaged electronic device can include a ceramic substrate configured to receive one or more components. The ceramic substrate can include a conductive layer in electrical contact with a ground plane. The packaged electronic device can further include a die having an integrated circuit and mounted on a surface of the ceramic substrate. The packaged electronic device can further include a conformal conductive coating implemented over the die to provide shielding functionality. The packaged electronic device can further include an electrical connection between the conformal conductive coating and the conductive layer.
    Type: Application
    Filed: October 30, 2014
    Publication date: May 7, 2015
    Inventors: Anthony James LOBIANCO, Howard E. CHEN, David Scott WHITEFIELD
  • Patent number: 9021689
    Abstract: A method of forming a dual port pressure sensor includes forming a first opening and a second opening in a flag of a lead frame. An encapsulant is molded to hold the lead frame in which the encapsulant is over a top of the flag and a bottom of the flag is uncovered by the encapsulant. A first opening in the encapsulant is aligned with and larger than the first opening in the flag and a second opening in the encapsulant aligned with the second opening in the flag. A pressure sensor transducer is attached to the bottom of the flag to cover the first opening in the flag, wherein the pressure sensor transducer provides an electrically detectable correlation to a pressure differential based on a first pressure received on its top side and a second pressure received on its bottom side. An integrated circuit is attached to the bottom of the flag. The integrated circuit is electrically coupled to the pressure sensor. A lid is attached to the encapsulant to form an enclosure around the bottom of the flag.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: May 5, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Stephen R. Hooper, William G. McDonald
  • Patent number: 9021691
    Abstract: A method for introducing electrical insulations in a printed circuit board includes selectively introducing groove-shaped recesses between different regions of an electrically conductive layer on a substrate along a machining path using a thermal energy input such that end portions of each of the recesses or different ones of the recesses are joined to one another. The end portions are introduced parallel to one another without overlap such that a strip-shaped region of the conductive layer is initially retained between the end portions so as to insulate the different regions.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: May 5, 2015
    Assignee: LPKF Laser & Electronics AG
    Inventor: Jan van Aalst
  • Publication number: 20150116972
    Abstract: A DC-DC converter assembly includes a board having a first side and a second side opposite the first side, a power stage die of a DC-DC converter attached to the first side of the board, and an output inductor electrically connected to an output of the power stage die and disposed over the power stage die on the first side of the board. The output inductor includes a magnetic core and an electrical conductor having first and second terminals attached to the first side of the board. The output inductor accommodates the power stage die under the magnetic core so that the power stage die is interposed between the magnetic core and the board. A corresponding method of manufacturing the DC-DC converter assembly and method of manufacturing the output inductor are also disclosed.
    Type: Application
    Filed: October 28, 2013
    Publication date: April 30, 2015
    Inventors: Emil Todorov, Brian Molloy
  • Patent number: 9015931
    Abstract: A retention-extraction device is provided for a removable card in a chassis. The device includes an actuation rod having a cam slot, the actuation rod configured to provide linear movement along the length of the actuation rod, and an extraction lever operatively connected to a proximal end of the actuation rod and pivotally secured to the chassis. The device also includes a bell crank with a cam follower that is configured to ride in the cam slot and a latch hook that pivots between an open and closed position based on the motion of the bell crank. The linear movement of the actuation rod causes the extraction lever to apply a force to a portion of the card and causes the latch hook to pivot to an open position to allow removal of the card.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: April 28, 2015
    Assignee: Juniper Networks, Inc.
    Inventor: Kenneth D. Boetzer
  • Publication number: 20150109750
    Abstract: An electronic system includes a printed circuit board (PCB), and a heat dissipating element. The PCB includes one or more first electronic components mounted on a first side of the PCB, and one or more second electronic components mounted on a second side of the PCB. The first electronic components have a power consumption that is greater than a threshold and have a height over the first side of the PCB that is higher than any other electronic components mounted on the first side of the PCB. At least one of the second electronic components has a height over the second side of the PCB that is higher than the height of the first electronic components. The heat dissipating element is adjacent to the first electronic components so as to provide a thermal coupling for dissipating heat generated by the first electronic components.
    Type: Application
    Filed: January 5, 2015
    Publication date: April 23, 2015
    Applicant: Marvell Israel (M.I.S.L) Ltd.
    Inventors: Daniel ELKASLASSY, Daniel KALMANOVIZ
  • Patent number: 9009954
    Abstract: A method for manufacturing a Z-directed component for insertion into a mounting hole in a printed circuit board according to one example embodiment includes forming the Z-directed component in a cavity formed by a constraining material that defines the outer shape of the Z-directed component. The constraining material is dissipated to release the Z-directed component from the constraining material and the Z-directed component is fired.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: April 21, 2015
    Assignee: Lexmark International, Inc.
    Inventors: Keith Bryan Hardin, Paul Kevin Hall, Zachary Charles Nathan Kratzer, Qing Zhang
  • Patent number: 9009956
    Abstract: Systems and methods are described that provide multilevel inverters having a plurality of levels using a simplified topology. For single phase systems, embodiments provide a full-bridge topology using bidirectional switching interconnections.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: April 21, 2015
    Assignee: Siemens Aktiengesellschaft
    Inventors: Yaosuo Xue, Madhav Manjrekar
  • Patent number: 9003651
    Abstract: Various pattern transfer and etching steps can be used to create features. Conventional photolithography steps can be used in combination with pitch-reduction techniques to form superimposed, pitch-reduced patterns of crossing elongate features that can be consolidated into a single layer. Planarizing techniques using a filler layer and a protective layer are disclosed. Portions of an integrated circuit having different heights can be etched to a common plane.
    Type: Grant
    Filed: July 5, 2013
    Date of Patent: April 14, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Mirzafer Abatchev, David Wells, Baosuo Zhou, Krupakar Murali Subramanian
  • Patent number: 8997339
    Abstract: A method for fabricating thin DITO or SITO touch sensor panels with a thickness less than a minimum thickness tolerance of existing manufacturing equipment. In one embodiment, a sandwich of two thin glass sheets is formed such that the combined thickness of the glass sheets does not drop below the minimum thickness tolerance of existing manufacturing equipment when thin film process is performed on the surfaces of the sandwich during fabrication. The sandwich may eventually be separated to form two thin SITO/DITO panels. In another embodiment, the fabrication process involves laminating two patterned thick substrates, each having at least the minimum thickness tolerance of existing manufacturing equipment. One or both of the sides of the laminated substrates are then thinned so that when the substrates are separated, each is a thin DITO/SITO panel having a thickness less than the minimum thickness tolerance of existing manufacturing equipment.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: April 7, 2015
    Assignee: Apple Inc.
    Inventors: Shih Chang Chang, John Z. Zhong, Lili Huang, Seung Jae Hong, Lynn Youngs
  • Patent number: 8998450
    Abstract: A light module (1; 14), comprising a carrier (8, 10) for mounting at least one semiconductor source (5), in particular a light emitting diode, wherein: the carrier (8, 10) has a flexible printed circuit board (10), the flexible printed circuit board (10) is bonded face-to face to at least one base plate, (8) and the carrier (8, 10) can be bent along at least one predetermined bending line (3; 3a-3e), the base plate (8) can be bent along the at least one bending line, (3; 3a-3e), the base plate (8) has at least one cutout (9) along the bending line (3; 3a-3e) and the flexible printed circuit board (10) has at least one strip (11; 15) which crosses at least one of the cutouts (9).
    Type: Grant
    Filed: June 16, 2010
    Date of Patent: April 7, 2015
    Assignee: OSRAM GmbH
    Inventor: Thomas Preuschl
  • Patent number: 8997346
    Abstract: In order to avoid cost for accommodating a shield wire in a housing while bending, and smoothly and readily accommodate within the housing while the shield electric wire is insulated, a conductive housing 1 including a rear wall 4 continuing to an annular wall 3, and a tube wall 5 continuing to down the rear wall 4, a method comprising the steps of: passing through a shield electric wire 2 from a lower opening 5a of the tube wall of the conductive housing to a front opening 3a of the annular wall while bending the shield electric wire; putting a shield terminal 9 movably around the shield electric wire from top of the shield electric wire; exposing a core wire 2b and a braid 2a of the shield electric wire by stripping a tip thereof; connecting an L-shaped terminal 11 to the core wire; mounting an L-shaped insulation inner housing 12 outside the L-shaped terminal; connecting the shield terminal to the braid; and accommodating a vertical part 14 of the inner housing within the conductive housing by pulling in t
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: April 7, 2015
    Assignee: Yazaki Corporation
    Inventors: Takashi Omae, Kazuki Zaitsu