Point Source Cathodes Patents (Class 313/336)
  • Patent number: 6515415
    Abstract: A triode carbon nanotube field emission display (FED) using a barrier rib structure and a manufacturing method thereof are provided. In a triode carbon nanotube FED employing barrier ribs, barrier ribs are formed on cathode lines by a screen printing method, a mesh structure is mounted on the barrier ribs, and a spacer is inserted between the barrier ribs through slots of the mesh structure, thereby stably fixing the mesh structure and the spacer within a FED panel due to support by the barrier ribs.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: February 4, 2003
    Assignee: Samsung SDI Co., Ltd.
    Inventors: In-taek Han, Jong-min Kim
  • Patent number: 6515407
    Abstract: A gated filament structure for a field emission display includes a plurality of filaments. Included is a substrate, an insulating layer positioned adjacent to the substrate, and a metal gate layer position adjacent to the insulating layer. The metal gate layer has a plurality of gates, the metal gate layer having an average thickness “s” and a top metal gate layer planar surface that is substantially parallel to a bottom metal gate layer planar surface. The metal gate layer includes a plurality of apertures extending through the gates. Each aperture has an average width “r” along a bottom planar surface of the aperture. Each aperture defines a midpoint plane positioned parallel to and equally distant from the top metal gate layer planar surface and the bottom metal gate layer planar surface. A plurality of filaments are individually positioned in an aperture. Each filament has a filament axis. The intersection of the filament axis and the midpoint plane defines a point “O”.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: February 4, 2003
    Assignee: Candescent Technologies Corporation
    Inventor: John M. Macaulay
  • Patent number: 6515414
    Abstract: According to one aspect of the invention, a field emission display is provided comprising: an anode; a phosphor screen located on the anode; a cathode; an evacuated space between the anode and the cathode; an emitter located on the cathode opposite the phosphor; wherein the emitter comprises an electropositive element both in a body of the emitter and on a surface of the emitter. According to another aspect of the invention a process for manufacturing an FED is provided comprising the steps of: forming an emitter comprising an electropositive element in the body of the tip; positioning the emitter in opposing relation to a phosphor display screen; creating an evacuated space between the emitter tip and the phosphor display screen; and causing the electropositive element to migrate to the an emission surface of the emitter.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: February 4, 2003
    Assignee: Micron Technology, Inc.
    Inventors: David A. Cathey, Surjit S. Chadha, Behnam Moradi
  • Publication number: 20030015958
    Abstract: The present invention provides an electron emission device assured to emit electrons without requiring film thickness control in the order of submicrons and production method of the electron emission device as well as a display apparatus using the electron emission device.
    Type: Application
    Filed: September 16, 2002
    Publication date: January 23, 2003
    Inventors: Ichiro Saito, Koichi Iida, Tokiko Takahashi
  • Patent number: 6509677
    Abstract: A high resolution field emission display includes a faceplate and a baseplate. The faceplate includes a transparent viewing layer, a transparent conductive layer formed on the transparent viewing layer and intersecting stripes of light-absorbing, opaque insulating material formed on the transparent conductive layer. The insulating material defines openings less than one hundred microns wide between the intersecting stripes. The faceplate also includes a plurality of localized regions of cathodoluminescent material, each formed in one of the openings. The cathodoluminescent material includes a metal oxide providing reduced resistivity in the cathodoluminescent material. Significantly, the reduced resistivity of the cathodoluminescent material together with the focusing effect of the insulating material provide increased acuity in luminous images formed on the faceplate.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: January 21, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Zhongyi Xia, Jimmy J. Browning, Charles M Watkins, David A. Cathey
  • Patent number: 6509686
    Abstract: Improved field emission display includes a buffer layer of copper, aluminum, silicon nitride or doped or undoped amorphous, poly, or microcrystalline silicon located between a chromium gate electrode and associated dielectric layer in a cathode assembly. The buffer layer substantially reduces or eliminates the occurrence of an adverse chemical reaction between the chromium gate electrode and dielectric layer.
    Type: Grant
    Filed: September 16, 1999
    Date of Patent: January 21, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Behnam Moradi, Kanwal K. Raina, Michael J. Westphal
  • Patent number: 6507145
    Abstract: A ballast layer for a field emissive device includes a very thin layer of strongly doped nanocrystalline silicon and one or more moderately doped layers of an amorphous silicon-based material.
    Type: Grant
    Filed: February 3, 2000
    Date of Patent: January 14, 2003
    Assignee: Balzers AG
    Inventors: Emmanuel Turlot, Hanh Pham, François Leblanc, Jacques Schmitt
  • Patent number: 6504292
    Abstract: In accordance with the invention, an improved conductive nanostructure assembly comprises an array of metallized nanostructures disposed on a conductive substrate. The substrate can also be metallized. Such assemblies provide continuous electron transport from the substrate to the tips of the nanostructures. Several ways of making such assemblies are described along with several devices employing the assemblies.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: January 7, 2003
    Assignee: Agere Systems Inc.
    Inventors: Kyung Moon Choi, Sungho Jin, Gregory Peter Kochanski, Wei Zhu
  • Patent number: 6504291
    Abstract: A high resolution field emission display includes a faceplate and a baseplate. The faceplate includes a transparent viewing layer, a transparent conductive layer formed on the transparent viewing layer and intersecting stripes of light-absorbing, opaque insulating material formed on the transparent conductive layer. The insulating material defines openings less than one hundred microns wide between the intersecting stripes. The faceplate also includes a plurality of localized regions of cathodoluminescent material, each formed in one of the openings. The cathodoluminescent material includes a metal oxide providing reduced resistivity in the cathodoluminescent material. Significantly, the reduced resistivity of the cathodoluminescent material together with the focusing effect of the insulating material provide increased acuity in luminous images formed on the faceplate.
    Type: Grant
    Filed: February 23, 1999
    Date of Patent: January 7, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Zhongyi Xia, Jimmy J. Browning, Charles M. Watkins, David A. Cathey
  • Patent number: 6498425
    Abstract: A field emission array includes a dielectric structure with at least two dielectric layers between the cathode and anode grid thereof. The lower dielectric layer is planarized to minimize the occurrence of electrical shorts between the cathode and anode grid of the field emission array. Thus, the upper dielectric layer is substantially free of any electrically conductive defects or imperfections that extend through the lower dielectric layer. In addition, the field emission array includes an array of emitter tips, which are laterally surrounded and may be spaced apart from the dielectric structure. The field emission array may also include a grid over the dielectric structure and the emitter tips, with the emitter tips being exposed through grid openings or apertures.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: December 24, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Ammar Derraa
  • Patent number: 6495955
    Abstract: A method and structure are provided for simultaneously fabricating polysilicon cones for a field emitter and a porous insulating oxide layer for supporting a gate material. The porous insulating oxide is fabricated by first making the polysilicon porous in the field regions by an anodic etch and then oxidation. This is a fully self-aligned process and only one masking is used. Shaping of the gate material in close proximity to the top of the cone is achieved by a lift-off technique and requires no special deposition techniques like depositions at a grazing incidence to improve the emitter.
    Type: Grant
    Filed: October 24, 2000
    Date of Patent: December 17, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Leonard Forbes, Kie Y. Ahn
  • Patent number: 6495956
    Abstract: A large-area field emission device (“FED”) which is sealed under a predetermined level of vacuum pressure and method for making same includes a large-area substrate, an emitter electrode structure disposed on the substrate such that the emitter structure is disposed over a substantial portion of the substrate, a plurality of groups of micropoints, with each group having a predetermined number of micropoints and with each group being disposed at discrete positions on the emitter electrode structure, an insulating layer disposed over the substrate, with the insulating layer having openings therethrough which have a diameter within a predetermined range, and with each openings surrounding at least a portion a micropoint, an extraction structure disposed on the insulating layer, with the extraction structure having openings therethrough which have a diameter within a predetermined range, with each openings surrounding at least a portion of a micropoint, and with the openings in the extraction structur
    Type: Grant
    Filed: May 30, 2001
    Date of Patent: December 17, 2002
    Assignee: Micron Technology, Inc.
    Inventors: David A. Cathey, Jimmy J. Browning
  • Patent number: 6492769
    Abstract: In an electron emitting device, an electron source and an image forming apparatus making use of it, and producing methods of them, an organic film is present on a pair of conductive films forming the electron emitting device. This organic film is placed in an area on the conductive films. This prevents occurrence of leak paths between the conductive films, which used to occur because of change of the organic film on the substrate into a conductor where the organic film existed on the substrate outside the area of the conductive films, and prevents decrease in electron emission efficiency.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: December 10, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hitoshi Oda, Takashi Iwaki
  • Patent number: 6489710
    Abstract: An electron emitting apparatus having excellent mechanical strength and capable of satisfactorily emitting electrons even if a high electric field is applied and a manufacturing method therefor are disclosed. The electron emitting apparatus according to the present invention incorporates a first gate electrode formed on a substrate, a cathode formed on the first gate electrode through a first insulating layer and having a projection projecting over the first insulating layer and a second gate electrode formed on the cathode through a second insulating layer. The electron emitting apparatus has the cathode structured such that the projection has an inclined surface, the thickness of which is reduced toward the leading end.
    Type: Grant
    Filed: January 15, 1999
    Date of Patent: December 3, 2002
    Assignee: Sony Corporation
    Inventors: Masami Okita, Yuichi Iwase, Jiro Yamada
  • Publication number: 20020175607
    Abstract: An apparatus for stabilizing the threshold voltage in an active matrix field emission device. The apparatus includes the formation of radiation-blocking elements between a cathodoluminescent display screen of the FED and semiconductor junctions formed on a baseplate of the FED.
    Type: Application
    Filed: July 8, 2002
    Publication date: November 28, 2002
    Inventors: James J. Hofmann, John K. Lee, David A. Cathey, Glen E. Hush
  • Patent number: 6486599
    Abstract: A field emission display panel that utilizes nanotube emitters as electron sources and is equipped with two cathodes i.e. a primary cathode and an auxiliary cathode, and an anode is provided. The nanotube emitters can be suitably formed by nanometer-dimensioned hollow tubes of carbon, diamond or diamond-like carbon mixed in a polymeric-based binder. The nanotube emitters are formed in two parallelly-positioned, spaced-apart rows on top of an electrode layer such as a silver paste by a thick film printing technique. Since both the primary cathode and the anode are formed on the bottom glass plate, the operating voltage can be controlled by the thickness of the dielectric layer that is used in forming the nanotube emitter stacks. An auxiliary cathode formed of an electrically conductive material is coated on the interior surface of a top glass plate to further repel electrons in a downward direction toward the anode on the bottom glass plate.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: November 26, 2002
    Assignee: Industrial Technology Research Institute
    Inventors: Wen-Chun Wang, Cheng-Chung Lee, Feng-Yu Chuang, Jen-Hui Liao, Chi-Yun Hsu, Chung-Shan Han
  • Patent number: 6479939
    Abstract: A carbon film having an area of insulating material surrounded by an area of conducing material, and an area of material between the area of insulating material and the area of conducting material having a graded dielectric constant which varies from high to low from the area of insulating material to the area of conducting material.
    Type: Grant
    Filed: December 2, 1999
    Date of Patent: November 12, 2002
    Assignee: SI Diamond Technology, Inc.
    Inventors: Zvi Yaniv, Richard Lee Fink, Zhidan Li Tolt
  • Publication number: 20020163287
    Abstract: The present invention proposes a field emitting display, wherein a field emitting array is formed on a glass substrate. The field emitting array comprises a plurality of arrays of thin film transistors and a plurality of carbon nanotubes used as field emitting cathodes. The magnitude and stability of the field-emitted current of the carbon nanotubes are controlled by using the thin film transistors. The present invention has the characteristics of high quality, large area, and low cost.
    Type: Application
    Filed: May 2, 2001
    Publication date: November 7, 2002
    Inventors: Huang Chung Cheng, Fu-Guo Tarntair
  • Patent number: 6476548
    Abstract: A display includes a substrate and an emitter formed on the substrate. A first dielectric layer is formed on the substrate to have a thickness slightly less than a height of the emitter above the planar surface and includes an opening formed about the emitter. The display also includes a conductive extraction grid formed on the first dielectric layer. The extraction grid includes an opening surrounding the emitter. The display further includes a second dielectric layer formed on the extraction grid and a focusing electrode formed on the second dielectric layer. The focusing electrode is electrically coupled to the emitter through an impedance element. The focusing electrode includes an opening formed above the apex. The focusing electrode provides enhanced focusing performance together with reduced circuit complexity, resulting in a superior display.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: November 5, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Zhongyi Xia
  • Patent number: 6472802
    Abstract: A triode-type field emission device includes an insulating substrate; a cathode formed on the insulating substrate; a field emitter aligned on the cathode, wherein the field emitter includes a plurality of emitter tips and each emitter tip has the diameter of nanometers; an insulating layer positioned around the field emitter for electrically isolating the field emitter; and a gate electrode formed on the insulating layer, wherein the gate electrode is closed to an upper portion of the field emitter. Therefore, the triode-type field emission device may be operable in a low voltage.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: October 29, 2002
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung-Yool Choi, Mun-Cheol Paek, Kyoung-Ik Cho, Jeen Hur, Gi-Pyung Han
  • Patent number: 6472813
    Abstract: This invention discloses an image forming apparatus having an electron source on which a plurality of electron-emitting devices are arranged, an image forming member on which an image is formed by electrons emitted by the electron-emitting devices, and a structure for maintaining an interval between the electron source and the image forming member, in which an interval between two electron-emitting devices adjacent to each other via the structure is larger than an interval between two electron-emitting devices adjacent to each other without the mediacy of the structure, and electrons emitted by the electron-emitting devices are deflected toward the structure.
    Type: Grant
    Filed: March 25, 1998
    Date of Patent: October 29, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideaki Mitsutake, Hidetoshi Suzuki, Naoto Nakamura
  • Patent number: 6465950
    Abstract: The microtips of charge emitting material, which define the cathode of the flat FED screen and face the grid of the screen, are tubular and have portions with a small radius of curvature. The microtips are obtained by forming openings in the dielectric layer separating the cathode connection layer from the grid layer, depositing a conducting material layer to cover the walls of the openings, and anisotropically etching the layer of conducting material to form inwardly-inclined surfaces with emitting tips. Subsequently, the portions of the dielectric layer surrounding the microtips are removed.
    Type: Grant
    Filed: January 13, 2000
    Date of Patent: October 15, 2002
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Livio Baldi, Maria Santina Marangon
  • Patent number: 6462467
    Abstract: Electrophoretic deposition provides an inexpensive, efficient process for manufacturing a field emission cathode. Particles of a resistive material are deposited by electrophoretic deposition on a conducting layer overlying an insulating layer. An electron emitting layer is then applied over the resistive material to produce the cathode. By controlling the composition of the deposition bath, an electrophoretic deposition process can be used to efficiently produce field emission cathodes that provide a spatially and temporally stable emission field. The deposition bath for the field emission cathode includes an alcohol, a charging salt, water, and a dispersant. The field emission cathodes can be used as an electron source in a field emission display device.
    Type: Grant
    Filed: August 11, 1999
    Date of Patent: October 8, 2002
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventor: Benjamin E. Russ
  • Publication number: 20020140335
    Abstract: Electron emission structures formed using standard semiconductor processes on a substrate first prepared with a topographical feature are disclosed. At least one layer of a first material is concurrently deposited on the substrate and etched from the substrate to form an atomically sharp feature. An at least one layer of a second material is deposited over the atomically sharp feature. A conductive layer is deposited over the at least one layer of the second material. A selected area of material is removed from the conductive layer and the at least one layer of second material to expose the atomically sharp feature. Finally, electrical connectivity is provided to elements of the electron emission structure.
    Type: Application
    Filed: March 28, 2001
    Publication date: October 3, 2002
    Inventors: Michael A. Maxim, Oleh Karpenko, Farshid Adibi-rizi, Brett E. Huff
  • Patent number: 6455989
    Abstract: An electron emission source includes a plurality of strip-like cathode electrode lines formed on a lower substrate, an insulating layer formed on the cathode electrode lines; and a plurality of strip-like gate electrode lines formed on the insulating layer in such a manner as to intersect the cathode electrode lines, wherein a number of fine holes are formed in each of intersections between the cathode electrode lines and the gate electrode lines. The intersection forms a pixel region corresponding to one pixel of a display. The fine holes pass through the gate electrode lines and the insulating layer and reach the cathode electrode lines. A metal made projecting structure having a trapezoidal shape in cross-section is formed in each of the fine holes in such a manner as to project from the bottom of the fine hole. An electron emission portion on the surface of which carbon nano-tubes are erected is formed on the upper surface of the projecting structure.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: September 24, 2002
    Assignee: Sony Corporation
    Inventors: Satoshi Nakada, Eisuke Negishi
  • Publication number: 20020125805
    Abstract: The present invention discloses a new field emitter cell and array consisting of groups of nanofilaments forming emitter cathodes. Control gates are microprocessed to be integrally formed with groups of nanofilament emitter cathodes on a substrate. Groups of nanofilaments are grown directly on the substrate material. As a result, the control gates and groups of nanofilaments are self-aligned with one another.
    Type: Application
    Filed: March 9, 2001
    Publication date: September 12, 2002
    Inventor: David S. Y. Hsu
  • Patent number: 6448700
    Abstract: The present invention provides a “solid” diamond, i.e. greater than 5&mgr; thick, electron emitter that has been “machined” using non-contact techniques to a point having a radius of less than about 100&mgr;, preferably below about 10&mgr; and most preferably between about 3 angstroms and about 3&mgr;. The solid diamond electron emitters of the present invention can perform, even at these small radii, as multi-point emitters depending upon the radius and roughness of the pointed tip and can be used in arrays to obtain relatively large area field emitters for applications where such larger field emissions are necessary. Production of the solid diamond emitters of the present invention is preferably accomplished using non-contact electron or ion beam machining techniques. Residual gas analyzers (RGA) and field emitter extractor gauge analyzers (FERGA) that use the solid diamond emitters are also described.
    Type: Grant
    Filed: October 25, 1999
    Date of Patent: September 10, 2002
    Assignee: Southeastern Universities Res. Assn.
    Inventors: Mool Chand Gupta, Ganapati Rao Myneni
  • Patent number: 6448701
    Abstract: The present invention discloses a new field emitter cell and array consisting of groups of nanofilaments forming emitter cathodes. Control gates are microprocessed to be integrally formed with groups of nanofilament emitter cathodes on a substrate. Groups of nanofilaments are grown directly on the substrate material. As a result, the control gates and groups of nanofilaments are self-aligned with one another.
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: September 10, 2002
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: David S. Y. Hsu
  • Patent number: 6448709
    Abstract: The field emission display panel is constructed by a first glass plate that has a plurality of emitter stacks formed on a top surface, each of the emitter stacks is formed parallel to a transverse direction of the glass plate and includes a layer of electrically conductive material and a layer of nanotube emitter on top, the first glass plate further has a plurality of rib sections formed of an insulating material inbetween the plurality of emitter stacks to provide electrical insulation, a second glass plate that is positioned over and spaced-apart from the first glass plate wherein an inside surface of the second glass plate has coated thereon a layer of an electrically conductive material such as indium-tin-oxide on the inside surface, and a multiplicity of fluorescent powder coating strips formed on the ITO layer each for emitting a red, green or blue light when activated by electrons emitted from the plurality of emitter stacks.
    Type: Grant
    Filed: September 15, 1999
    Date of Patent: September 10, 2002
    Assignee: Industrial Technology Research Institute
    Inventors: Feng-Yu Chuang, Wen-Chun Wang
  • Patent number: 6448708
    Abstract: A flat panel display and a method for forming a flat panel display. In one embodiment, the flat panel display includes a cathodic structure which is formed within an active area on a backplate. The cathodic structure includes a emitter electrode metal composed of strips of aluminum overlain by a layer of cladding material. The use of aluminum and cladding material to form emitter electrode metal gives emitter electrode metal segments which are highly conductive due to the high conductivity of aluminum. By using a suitable cladding material and processing steps, a bond between the aluminum and the cladding material is formed which has good electrical conductivity. In one embodiment, tantalum is used as a cladding material. Tantalum forms a bond with the overlying resistive layer which has good electrical conductivity. Thus, the resulting structure has very high electrical conductivity through the aluminum layer and high conductivity into the resistive layer.
    Type: Grant
    Filed: May 31, 2000
    Date of Patent: September 10, 2002
    Assignee: Candescent Intellectual Property Services, Inc.
    Inventors: Kishore K. Chakravorty, Swayambu Ramani, Stephanie J. Oberg, Johan Knall, Duane A. Haven, Ronald S. Besser, Paul J. Louris, Arthur J. Learn, Christopher J. Spindt, Roger W. Barton
  • Patent number: 6445114
    Abstract: The first basic structure of the electron emission element of the present invention, includes at least two electrodes disposed in a horizontal direction at a predetermined interval, and a plurality of electron emission portions made of a particle or an aggregate of the particles dispersively disposed between the electrodes. On the other hand, the second basic structure of the electron emission element of the present invention includes at least two electrodes disposed at a predetermined interval, a conductive layer disposed between the electrodes so as to be electrically connected thereto, and a plurality of electron emission portions made of a particle or an aggregate of the particles dispersively disposed on the surface of the conductive layer between the electrodes.
    Type: Grant
    Filed: December 10, 1999
    Date of Patent: September 3, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideo Kurokawa, Tetsuya Shiratori, Toshifumi Sato, Masahiro Deguchi, Makoto Kitabatake
  • Patent number: 6445113
    Abstract: In a field emission cold cathode device having a block defined by a contour and a plurality of holes arranged in the block, each hole is uniform in shape to obtain a uniform electric current in the block when emitter cones are located in the uniform holes. A distorted hole is not arranged in the block or holes which are susceptible to be distorted are shifted or moved to other zones which are not distorted. Such uniform holes can be also obtained by preparing mask patterns of different sizes and by transcribing the mask patterns onto photoresist.
    Type: Grant
    Filed: March 25, 1999
    Date of Patent: September 3, 2002
    Assignee: NEC Corporation
    Inventors: Nobuya Seko, Yoshinori Tomihari
  • Patent number: 6445124
    Abstract: A field emission device essentially consists of three electrodes, and comprises a cathode on the surface of which an emissive material is formed, a gate electrode formed on an insulation layer formed to upwardly surround the cathode, and having an opening for passing electrons emitted from the emissive material, and an anode for accelerating the electrons passing through the opening, wherein L/S is one or above, where S represents an aperture diameter of the opening, and L represents a typical shortest distance that the electrons emitted from the emissive material take to pass through the insulation layer surrounding the cathode. Based on this structure, it is possible to provide a field emission device that can control the orbit of emitted electrons while employing a simple three-electrode structure.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: September 3, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hironori Asai, Masahiko Yamamoto, Koji Suzuki
  • Patent number: 6443788
    Abstract: A method for fabricating row lines and pixel openings of a field emission array that employs only two masks. A first mask is disposed over electrically conductive material and semiconductive material and includes apertures that are alignable between rows of pixels of the field emission array. Row lines of the field emission array are defined through the first mask. A passivation layer is then disposed over at least selected portions of the field emission array. A second mask, including apertures alignable over the pixel regions of the field emission array, is disposed over the passivation layer. The second mask is used in defining openings through the passivation layer and over the pixel regions of the field emission array. Conductive material exposed through the apertures of the second mask may also be removed to expose the underlying semiconductive grid and to further define the pixel openings.
    Type: Grant
    Filed: August 27, 2001
    Date of Patent: September 3, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Ammar Derraa
  • Publication number: 20020117952
    Abstract: A field emission display device is disclosed, which has a first substrate; a second substrate coated with at least a layer of phosphor; a first conducting layer locating on one surface of said first substrate; a plurality of connecting-conducting lines; an insulating layer having a plurality of holes; a second conducting layer having a plurality of holes; a plurality of cones having at least one microtip; and a sealing gel sandwiched by said second substrate and said insulating layer. The method for fabricating the field emission display device illustrated above is also disclosed.
    Type: Application
    Filed: February 15, 2002
    Publication date: August 29, 2002
    Inventors: Christopher Chang, Edward Huang
  • Publication number: 20020113536
    Abstract: Field emitter display (FED) assemblies and methods of forming field emitter display (FED) assemblies are described. In one embodiment, a substrate is provided having a column line formed and supported thereby. A plurality of field emitter tip regions are formed and disposed in operable proximity to the column line. At least some of the regions define different pixels of the display. A continuous resistor is interposed between the column line and at least two different pixels. In another embodiment, a column line is formed and supported by a substrate. A plurality of field emitter tip regions are formed and disposed in operable proximity to the column line. The regions define different pixels of the display. A single current-limiting resistor is operably coupled with the column line and at least two different pixels. In yet another embodiment, a series of column lines are formed over a substrate.
    Type: Application
    Filed: April 1, 2002
    Publication date: August 22, 2002
    Inventor: Ammar Derraa
  • Patent number: 6433473
    Abstract: A structure and method for forming an column electrode for a field emission display device wherein the column electrode is disposed beneath the field emitters and the row electrode. In one embodiment, the present invention comprises depositing a resistor layer over portions of a column electrode. Next, an inter-metal dielectric layer is deposited over the column electrode. In the present embodiment, the inter-metal dielectric layer is deposited over portions of the resistor layer and over pad areas of the column electrode. After the deposition of the inter-metal dielectric layer, the column electrode is subjected to an anodization process such that exposed regions of the column electrode are anodized. In so doing, the present invention provides a column electrode structure which is resistant to column to row electrode shorts and which is protected from subsequent processing steps.
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: August 13, 2002
    Assignee: Candescent Intellectual Property Services, Inc.
    Inventors: Kishore K. Chakravorty, Fariborz Nadi, Christopher J. Spindt, Ronald L. Hansen, Colin D. Stanners
  • Patent number: 6426596
    Abstract: An image forming apparatus includes a cathode substrate on which an electron emitting device is disposed, and an anode substrate disposed opposite to the cathode substrate. The anode substrate includes an anode electrode including a plurality of conductive films connected in series and arranged to form gaps between neighboring films.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: July 30, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keisuke Yamamoto, Tamaki Kobayashi, Satoshi Mogi
  • Patent number: 6424083
    Abstract: A field emission device (100) includes a cathode (110) and a ballast resistor (112) connected to cathode (110). Ballast resistor (112) includes a thin metallic layer (113) and a protective layer (114) disposed on metallic layer (113). Metallic layer (113) is made from chromium and has a thickness of about 40 angstroms. Protective layer (114) is made from sputtered silicon and has a thickness of about 500 angstroms. A portion of metallic layer (113) makes physical contact with cathode (110) and is sandwiched between cathode (110) and protective layer (114). Protective layer (114) is positioned to shield metallic layer (113) from high transient voltages.
    Type: Grant
    Filed: February 9, 2000
    Date of Patent: July 23, 2002
    Assignee: Motorola, Inc.
    Inventors: Gordon Tam, Ganming Qin, Barry P. O'Brien
  • Publication number: 20020093281
    Abstract: Electron emitters and a method of fabricating emitters which have a concentration gradient of impurities, such that the highest concentration of impurities is at the apex of the emitters, and decreases toward the base of the emitters. The method comprises the steps of doping, patterning, etching, and oxidizing the substrate, thereby forming the emitters having impurity gradients.
    Type: Application
    Filed: January 12, 2001
    Publication date: July 18, 2002
    Inventor: David A. Cathey
  • Patent number: 6420726
    Abstract: A triode field emission device using a field emission material and a driving method thereof are provided. In this device, gate electrodes serving to take electrons out of a field emission material on cathodes are installed on a substrate below the cathodes, so that the manufacture of the device is easy. Also, electrons emitted from the field emission material are controlled by controlling gate voltage.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: July 16, 2002
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Yong-soo Choi, Jun-hee Choi, Nae-sung Lee, Jong-min Kim
  • Patent number: 6420826
    Abstract: Thin films of Ti—Cr—Al—O are used as a resistor material. The films are rf sputter deposited from ceramic targets using a reactive working gas mixture of Ar and O2. Resistivity values from 104 to 1010 Ohm-cm have been measured for Ti—Cr—Al—O film <1 &mgr;m thick. The film resistivity can be discretely selected through control of the target composition and the deposition parameters. The application of Ti—Cr—Al—O as a thin film resistor has been found to be thermodynamically stable, unlike other metal-oxide films. The Ti—Cr—Al—O film can be used as a vertical or lateral resistor, for example, as a layer beneath a field emission cathode in a flat panel display; or used to control surface emissivity, for example, as a coating on an insulating material such as vertical wall supports in flat panel displays.
    Type: Grant
    Filed: January 3, 2000
    Date of Patent: July 16, 2002
    Assignee: The Regents of the University of California
    Inventors: Alan F. Jankowski, Anthony P. Schmid
  • Patent number: 6417617
    Abstract: A field emission display apparatus includes a plurality of emitters formed on a substrate. Each of the emitters includes a titanium silicide nitride outer layer so that the emitters are less susceptible to degradation. A dielectric layer is formed on the substrate and the emitters, and an opening is formed in the dielectric layer surrounding each of the emitters. A conductive extraction grid is formed on the dielectric layer substantially in a plane defined by the emitters, and includes an opening surrounding each of the emitters. A cathodoluminescent faceplate having a planar surface is disposed parallel to the substrate.
    Type: Grant
    Filed: July 24, 2001
    Date of Patent: July 9, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Tianhong Zhang, John K. Lee, Behnam Moradi
  • Patent number: 6417605
    Abstract: An apparatus and a method for stabilizing the threshold voltage in an active matrix field emission device. The method includes the formation of radiation blocking elements between a cathodoluminescent display screen of the FED and semiconductor junctions formed on a baseplate of the FED.
    Type: Grant
    Filed: September 23, 1998
    Date of Patent: July 9, 2002
    Assignee: Micron Technology, Inc.
    Inventors: James J. Hofmann, John K. Lee, David A. Cathey, Glen E. Hush
  • Patent number: 6417606
    Abstract: In a field emission cold-cathode device, a cathode line or electrode is arranged on a glass substrate. An emitter is arranged on the cathode electrode and is formed of a conductive layer, a low-work-function material layer, and a tip layer stacked one on top of the other in this order. The emitter has a pyramid shape in which the tip layer has a sharp tip. The low-work-function material layer is made of a material having a work function of 4.0 eV or less. The tip layer is made of a material having a negative electron affinity and formed of granular bodies or linear bodies each having a diameter of 100 nm or less.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: July 9, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Nakamoto, Katsuyoshi Fukuda
  • Patent number: 6414421
    Abstract: There is provided a field emission cold cathode including (a) an electrically conductive substrate, (b) a plurality of emitter cones formed at a surface of the substrate, (c) a gate electrode being formed as a first resistive layer and a second resistive layer formed on the first resistive layer, and (d) an insulating layer sandwiched between the substrate and the gate electrode. The first resestive layer has a resistivity higher than a resistivity of the second resistive layer. The second resistive layer is composed of metal or a metal compound. The gate electrode and the insulating layer are formed with a plurality of openings in alignment with each other, with the emitter cones being formed in the openings in alignment with each other, with the emitter cones which includes a predetermined number of the emitter cones. The substrate is formed with trenches surrounding each of the groups when viewed in a direction of a normal line of the substrate, and trenches are filled with an electrical insulator.
    Type: Grant
    Filed: November 2, 1999
    Date of Patent: July 2, 2002
    Assignee: NEC Corporation
    Inventors: Hironori Imura, Nobuya Seko, Yoshinori Tomihari
  • Publication number: 20020079802
    Abstract: A cold cathode field emission device comprising a cathode electrode formed on a support member, and a conical electron emitting portion made of carbon and formed on the cathode electrode.
    Type: Application
    Filed: August 28, 2001
    Publication date: June 27, 2002
    Inventors: Kouji Inoue, Masakazu Muroyama, Takao Yagi
  • Patent number: 6411020
    Abstract: A plurality of field emission device cathodes each generate emission of electrons, which are then controlled and focused using various electrodes to produce an electron beam. Horizontal and vertical deflection techniques, similar to those used within a cathode ray tube, operate to scan the individual electron beams onto portions of a phosphor screen in order to generate images. The use of the plurality of field emission cathodes provides for a flatter screen depth than possible with a typical cathode ray tube.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: June 25, 2002
    Assignee: SI Diamond Technology, Inc.
    Inventors: Zvi Yaniv, Ronald Charles Robinder
  • Publication number: 20020070648
    Abstract: This invention relates to a field emission cathode (1) for a light source. The cathode (1) comprises at least one base body (3) having an emission surface (3′). Further, the base body (3) is formed by a structured material, and the emission surface (3′) is at least partly covered by a field emitting nano-structured material (2). Moreover, this invention relates to a light source, comprising an anode (5), a cathode (1) and an evacuated container (6) enclosing the anode (5) and the cathode (1). The container (6) have at least one inner wall being provided with a luminescent layer (4) as well as a conductive layer forming said anode (5) and the cathode (1) is a field emission cathode of the above mentioned type.
    Type: Application
    Filed: December 8, 2000
    Publication date: June 13, 2002
    Inventor: Gunnar Forsberg
  • Patent number: 6400071
    Abstract: The rear substrate of an FED comprises data electrodes formed on a surface of the substrate, an insulating layer over the substrate covering the data electrodes, scan and common electrodes laterally disposed on the insulating layer such that they are parallel with each other and electron emitting elements, which emit electrons when they subject to electric field, connected between a scan electrode and a common electrode. The electron emitting elements have a middle portion narrower than end portions so that electron emitting surface area is located at a same location from emitter to emitter.
    Type: Grant
    Filed: March 27, 2000
    Date of Patent: June 4, 2002
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Chun-Gyoo Lee, Chan-Jae Lee