Abstract: A voltage regulator is disclosed. The voltage regulator includes an operational amplifier (op-amp) and a voltage trim circuit. The op-amp is operable to receive a reference voltage at a first terminal. The op-amp also includes an output terminal. The voltage trim circuit is coupled between the output terminal and a second terminal of the op-amp. The voltage trim circuit is operable to modify an output voltage to be substantially equivalent with the reference voltage. The modification is performed by selecting an electrical current propagating pathway. An IC and a method to operate the voltage regulator is also disclosed.

Abstract: A bandgap voltage reference and voltage regulator system includes a bandgap voltage reference circuit and a voltage regulator circuit that share a single, common amplifier. The amplifier acts as a gain stage for the reference circuit and as an error amplifier for a driver stage of the regulator circuit. The regulator circuit has an input reference generated by the reference circuit, and the reference circuit acts as a load to the driver stage, obviating the need for a bias resistance network. By sharing the amplifier and obviating the need for a resistance network, the area and overall quiescent current of the system are reduced. The system can be implemented in CMOS/BiCMOS technology and is suited for low power applications.

Abstract: A circuit arrangement including a first transistor, a second transistor and a third transistor. The first transistor and the second transistor are configured so that the current flowing through the first transistor is proportional to the current flowing through the second transistor and the third transistor. The first transistor, the second transistor and the third transistor are configured to operate in an ohmic mode. The second transistor and the third transistor are coupled in series to each other. The first transistor, the second transistor and the third transistor match each other in at least one characteristic.

Abstract: A transmission line driver and a method for driving the same are provided, in which a composite current source is provided as an input current source, such that an output voltage is fixed. The composite current source includes an internal current source and an external current source. The composite current source is supplied to a single-ended transmission line driver or a differential transmission line driver, such that the output voltage is fixed.

Abstract: A port current control arrangement, constituted of: a current source arranged to generate a reference current or a predetermined value; an on-chip reference resistor, the generated reference current arranged to produce a reference voltage across the on-chip reference resistor; an on-chip sense resistor, a port current arranged to flow through the on-chip sense resistor and produce a sense voltage across the on-chip sense resistor, wherein the resistance of the on-chip sense resistor exhibits a predetermined relationship with the resistance of the first on-chip reference resistor; and a current control circuit, a first input of the current control circuit arranged to receive the produced reference voltage and a second input of the current control circuit arranged to receive the sense voltage, wherein the current control circuit is arranged to limit the port current to a value responsive to the received reference voltage and the received sense voltage.

Abstract: A device includes a bandgap reference circuit and a start-up circuit. The bandgap reference circuit includes an amplifier and a first transistor. The amplifier has an inverting input terminal, a non-inverting input terminal, and an output terminal. The first transistor has a gate electrode electrically connected to the output terminal. The start-up circuit has a first path electrically connected to the output terminal and the non-inverting input terminal, and a second path electrically connected to the output terminal and the inverting input terminal.

Abstract: A reference voltage source comprises a bandgap voltage reference circuit having a first node and an output node, the output node being arranged for providing a reference voltage. A curvature correction circuit has an input node connected to the output node and/or to a base of a first bipolar device of the bandgap voltage reference circuit and/or to a base of a second bipolar device of the bandgap voltage reference circuit. The curvature correction circuit has an output node connected to the first node of the bandgap voltage reference circuit. The curvature correction circuit comprises a current source for providing a current having a different temperature dependency than a temperature dependency of a first current through the first bipolar device of the bandgap voltage reference circuit.

Abstract: A voltage regulator circuitry (50) adapted to operate in a high-temperature environment of a turbine engine is provided. The voltage regulator may include a constant current source (52) including a first semiconductor switch (54) and a first resistor (56) connected between a gate terminal (G) and a source terminal (S) of the first semiconductor switch. A second resistor (58) is connected to the gate terminal of the first semiconductor switch (54) and to an electrical ground (64). The constant current source is coupled to generate a voltage reference across the second resistor 58. A source follower output stage 66 may include a second semiconductor switch (68) and a third resistor (58) connected between the electrical ground and a source terminal of the second semiconductor switch. The generated voltage reference is applied to a gating terminal of the second semiconductor switch (58).

Abstract: An adjustable bandgap reference voltage includes a first circuit for generating IPTAT, a second circuit for generating ICTAT, and an output module configured to generate the reference voltage. The first circuit includes a first amplifier connected to terminals of a core for equalizing voltages across the terminals, where the first amplifier has a first stage that is biased by the current inversely proportional to absolute temperature and is arranged according to a folded setup with first PMOS transistors arranged according to a common-gate setup. The first circuit also includes a feedback stage with an input connected to the first amplifier output. The feedback stage output is connected to the first stage input and to a terminal of the core. The second circuit includes a follower amplifier connected to a terminal of the core and separated from the first amplifier and the output module is connected to the feedback stage.

Abstract: According to an embodiment, generating an adjustable bandgap reference voltage includes generating a current proportional to absolute temperature (PTAT). Generating the PTAT current includes equalizing voltages across the terminals of a core that is designed to be traversed by the PTAT current. Generating the adjustable bandgap reference also includes generating a current inversely proportional to absolute temperature (CTAT), summing the PTAT and the CTAT currents and generating the bandgap reference voltage based on the sum of the currents. Equalizing includes connecting-across the terminals of the core a first fed-back amplifier with at least one first stage arranged as a folded setup and including first PMOS transistors arranged according to a common-gate setup. Equalizing also includes biasing the first stage based on the CTAT current. The summation of the PTAT and CTAT currents is performed in the feedback stage of the first amplifier.

Abstract: A reference voltage generating circuit. A bandgap circuit includes a current mirror circuit and an output circuit. The current mirror circuit generates a first current. The output circuit generates a reference current based on the first current. A compensation circuit is coupled to the bandgap circuit in parallel at a combination node and generates a compensation current. The compensation current is smaller than the reference current. The reference current has a first temperature coefficient and the compensation current has a second temperature coefficient that is inverse to the first temperature coefficient. The reference current and the compensation current are combined at the combination node, such that an absolute value of a temperature coefficient of the reference voltage of the combination node is smaller than an absolute value of the first temperature coefficient and an absolute value of the second temperature coefficient.

Abstract: A band gap reference voltage generator has first and second current conduction paths between a first node and a second node. The first current conduction path has first resistive elements in series with a first forward-biased PN junction element. A tap is connected selectively to the first resistive elements through switches that are controllable to select a voltage divider ratio at the tap. The second current conduction path includes a second resistive element in series with a second PN junction element of greater current density than the first PN junction. A voltage error amplifier has inputs connected to the tap and the second PN junction element, and an output for providing a thermally compensated output voltage VREF. A feedback path applies the output voltage VREF through a third resistive element to the first node.

Abstract: A generator of a voltage logarithmically variable with temperature may include a differential amplifier having a pair of transistors, each coupled with a respective bias network adapted to bias in a conduction state the transistors first and second respectively with a constant current and with a current proportional to the working absolute temperature. The pair of transistors may generate between their control nodes the voltage logarithmically variable with temperature. The differential amplifier may have a common bias current generator coupled between the common terminal of the differential pair of transistors and a node at a reference potential, and a feedback line to provide a path for the current difference between the sum of currents flowing through the transistors of the differential pair and the common bias current.

Abstract: A constant current flowing through a first depletion transistor whose gate and source are connected to each other is caused to flow through a second depletion transistor having the same threshold as the first depletion transistor, to thereby generate a first voltage between a gate and a source of the second depletion transistor. The constant current of the first depletion transistor and a constant current flowing through a third depletion transistor whose gate and source are connected to each other are caused to flow through a fourth depletion transistor. A threshold of the fourth depletion transistor is the same as that of the third depletion transistor but different from that of the first depletion transistor, and hence a second voltage is generated between a gate and a source of the fourth depletion transistor. A reference voltage is generated based on a voltage difference between the first and second voltages.

Abstract: A voltage regulator includes an amplifier, a first buffer and a second buffer. The amplifier is designed to generate an error voltage between a reference voltage and a voltage at an output node of the voltage regulator. The first buffer is coupled to receive the amplified error voltage and, in response, to drive a first pass transistor. The first buffer includes a non-linear resistance element. The resistance of the non-linear resistance element varies non-linearly with a load current drawn from the output node. The second buffer is coupled to receive the amplified error voltage, and in response, to drive a second pass transistor. The second buffer includes a linear resistance element. The resistance of the linear element is a constant. The use of the non-linear resistance element enables reduction in power consumption in the voltage regulator.

Abstract: A semiconductor integrated circuit device includes a power-supply terminal to which a power-supply voltage is input; and multiple MOS transistors including an Nch deplete mode MOS transistor functioning as a current source and at least one Pch enhancement mode MOS transistor formed on a silicon-on-insulator substrate including a silicon substrate, a buried-oxide film, and a silicon activate layer, each of the multiple MOS transistors dimensioned so that a bottom of a source diffusion layer and a bottom of a drain diffusion layer reach the buried-oxide film, the at least one Pch enhancement mode MOS transistor being connected to the supply terminal through the Nch depletion mode MOS transistor. The Nch depletion mode MOS transistor has electrical characteristics such that a source voltage thereof is higher than a silicon substrate voltage thereof and a saturation current of the Nch depletion mode MOS transistor is decreased.

Abstract: Startup circuits with native transistors. In some embodiments, a startup circuit may include a first inverter configured to receive a bandgap voltage (Vbg) from a bandgap reference circuit and to produce an output voltage (VOUT), and a second inverter operably coupled to the first inverter to form a latch, the latch configured to maintain a value of VOUT, the second inverter including a native transistor, the native transistor having a gate terminal coupled to VOUT and a source terminal coupled to Vbg. In other embodiments, a method may include receiving Vbg at a startup circuit and outputting VOUT configured to change in response to Vbg rising above Vtrig or falling below Vtrig, where the power consumption of the startup circuit is based at least in part upon a voltage value applied to a source terminal of a native transistor within the startup circuit.

Abstract: A method and apparatus for generating an improved reference voltage for use, for example, in a system requiring accurate low power operation. In particular, our reference voltage generator is adapted to output VREF as a function of the voltage difference between V1 and V2. The reference voltage generator is further adapted to include our reference voltage tuner to compensate for predetermined sensitivities of the reference voltage VREF, and to adjust the absolute value of VREF. During manufacturing and system test, a driver may be used to drive a buffered or unbuffered version of VREF to off-chip test functionality. Also, a configuration memory may be used to store the trim settings during normal operation, and make such settings available to outside resources.

Abstract: A highly distributed current reference for a solid-state memory comprises a centrally located current digital-to-analog converter (IDAC) and a plurality of remotely located tile current references. The IDAC comprises a first active device that generates a reference current, and a device that forms a first source degeneration resistance for the first active device. The IDAC outputs a voltage signal that represents a magnitude of the reference current. A remotely located tile current reference comprises a second active device and a device that forms a second source degeneration resistance for the second active device. The source degeneration resistances and capacitance coupled to the voltage signal output from the IDAC compensate for current, temperature, supply and process variations.

Abstract: A constant current source has a first current source circuit for outputting a first current; a second current source circuit for outputting a second current according to a reference voltage; a current comparison circuit for comparing magnitudes of the first and second currents; and a current adjustment unit for adjusting a current value of the first current output from the first current source circuit in accordance with a comparison result of the current comparison circuit.

Abstract: A semiconductor circuit includes a control signal generation circuit configured to generate control signals in response to a voltage characteristic determination signal and a reference voltage generation circuit configured to output a main reference voltage, having one of a first characteristic of being proportional to temperature, a second characteristic of being constant irrespective of temperature, and a third characteristic of being inversely proportional to temperature, in response to the control signals.

Abstract: An electronic circuit includes a band-gap reference circuit and a start-up circuit. The band-gap reference circuit includes an operational amplifier which has an output and first and second inputs. The band-gap reference circuit is configured to generate a predetermined reference voltage at the output of the operational amplifier after a start-up phase of the band-gap reference circuit. The start-up circuit includes at least one switch arranged to connect at least one current source to at least one of the inputs of the operational amplifier during the start-up phase, and to disconnect the at least one current source from the at least one of the inputs of the operational amplifier after the start-up phase.

Abstract: Disclosed is a bandgap reference voltage generator insensitive to changes of process, voltage, and temperature. A bandgap reference voltage generator may detect current having characteristic of CTAT and current having characteristic of PTAT which flow in a current compensation part included in an amplification part, and provide body voltage to one of two input transistors included in the amplification part in response to ratio of the two currents when the ratio is different from the preconfigured reference value. Thus, characteristics according to changes of parameters of elements and change of offset of the amplification part due to changes of PVT may be enhanced, and a characteristic of power supply rejection ratio (PSRR) may be enhanced.

Abstract: A reference voltage generation circuit includes: a bandgap reference circuit, generating a plurality of initial currents with different temperature coefficients; a base voltage generation circuit, combining the initial current into a combined current, and converting the combined current into one or more base voltages; a bias current source circuit, generating one or more bias currents based on at least one of the initial currents; and one or more regulating output circuit, each converting a respective one of the one or more bias currents into an increment voltage and adding the increment voltage to the base voltage to generate a respective output voltage. Each output voltage may have its respective temperature coefficient.

Abstract: A reference voltage circuit and method making same, the reference voltage circuit including: a first sub-circuit for generating first and second temperature-compensated voltages; a second sub-circuit configured to receive the first and second temperature-compensated voltages and generate first and second reference voltages based on the first and second temperature-compensated voltages, respectively; and a third sub-circuit configured to receive and change voltage levels of the first and second reference voltages, and output a third reference voltage.

Abstract: A reference voltage generator is provided. In an example, the reference voltage generator includes a temperature-dependent device, a processing module configured to process a digital representations of first and second voltages derived from the temperature-dependent device and a reference voltage to determine a value, and a digital to analog converter (DAC) configured to generate a reference voltage based on the value. The first voltage is proportional to absolute temperature (PTAT) and the second voltage is complementary to absolute temperature (CTAT) and the reference voltage is substantially independent of absolute temperature in an operating temperature range of the reference voltage generator.

Abstract: A BGR circuit controls a switch circuit in synchronization with a clock signal from a control signal generating circuit and an inverted signal thereof, and thereby, alternately switches between a differential input terminal receiving a voltage VIM and a differential input terminal receiving a voltage VIP. An LPF circuit includes capacitive elements, a switch connected between an input node and each capacitive element, and a switch connected between an output node and each capacitive element. The LPF circuit controls ON/OFF of the switches in synchronization with a clock signal CLK, and thereby, calculates a moving average value of an output voltage of the BGR circuit in the most recent one clock cycle.

Abstract: A power adapter includes a regulation device, which includes a division circuit, a reference circuit, and an impedance regulation circuit. The division circuit includes a first reference terminal and a second reference terminal. The second reference terminal is connected to an output terminal of the regulation device. The reference circuit includes a third reference terminal connected to the first reference terminal, and the reference circuit outputs a stable reference voltage via the third reference terminal, to provide the stable reference voltage for the first reference terminal. The impedance regulation circuit is connected to the first reference terminal, to provide equivalent impedance for the first reference terminal. The impedance of the equivalent impedance changes in a way corresponding to changes in the current flowing through the output terminal.

Abstract: A switched capacitor voltage reference including a single bias current source, three capacitors, diode devices, an amplifier and switching circuits for developing a temperature independent reference voltage. A single current source avoids having to match multiple current sources. A first capacitor and at least one diode device set a voltage having a negative temperature coefficient. A second capacitor and each of the diode devices set a voltage having a positive temperature coefficient. A third capacitor allows adjustable gain to enable a wide voltage range including a low voltage such as less than one volt. The switching circuits switch between multiple modes for developing and then combining the different temperature coefficient voltages. The topology allows a simple amplifier to be used. The topology is inherently accurate and does not require device trimming. An averaging method may be used to compensate for any mismatch between the diode devices.

Abstract: Systems and methods for managing process and temperature variations for on-chip sense resistors are disclosed. The system includes a circuit that can leverage a linear gm circuit in order to provide linear gains (positive gains and/or negative gains). The linearity of the circuit enables compensation for temperature and process variations across an entire range of current (positive to negative). A control signal is generated by using a linear gm amplifier and a replica resistor, which is substantially similar to the on chip resistor. The control signal is used to control the gain of a disparate linear gm amplifier within a compensation circuit, which provides an offset voltage to compensate for the variation in resistance of the on chip resistor.

Abstract: A reference voltage generator including a reference voltage generating unit is provided. The reference voltage generating unit receives a first bias voltage current and a first mirror current and generates a reference voltage. The reference voltage generating unit includes a first metal-oxide-semiconductor (MOS) transistor, a second MOS transistor, a first impedance providing element and a second impedance providing element. The first and the second MOS transistors operate in a sub-threshold region so as to generate a first gate-source voltage and a second gate-source voltage having a negative temperature coefficient. The first impedance providing element is configured to generate a first current having a positive temperature coefficient. The second impedance providing element is configured to generate a first voltage having a negative temperature coefficient at its first terminal. The reference voltage is equal to a sum of the second gate-source voltage and the first voltage.

Abstract: A semiconductor apparatus includes a comparison voltage generation unit configured to generate a plurality of different comparison voltages, a reference voltage generation unit configured to receive a generation code from an external system, select one of the plurality of the different comparison voltages according to the generation code, and generate a reference voltage, and a reference voltage determination unit configured to receive the generation code and an expected reference voltage from the external system, check whether a level of the expected reference voltage is in a target range, and output a check result to the external system.

Abstract: Embodiments of a voltage reference circuit are described. In one embodiment, a voltage reference circuit includes a startup circuit configured to generate a startup current and to be turned off in response to a comparison between the startup current and a current threshold, an amplifier connected to the startup circuit and configured to generate an amplified current using a positive current feedback loop in response to the startup current, and a proportional to absolute temperature (PTAT) current generator configured to generate a temperature-independent reference voltage in response to the startup current and the amplified current. Other embodiments are also described.

Abstract: A power supply noise rejection circuit for functional circuits, such as a voltage controlled oscillator (VCO). The power supply noise rejection circuit includes an isolation transistor connected to a voltage supply for providing an output current and voltage substantially free of noise across the full frequency range. A current source, a diode connected reference transistor with resistance means connected between its gate and drain terminals, and a dummy circuit serially connected between the voltage supply and ground generate a bias voltage that is applied to the gate of the isolation transistor. The dummy circuit mimics the DC characteristics of the functional circuit such that the output current tracks with process and temperature variations. The isolation transistor and the reference transistor can have negative threshold voltages, and the circuit can include bleed means for drawing current from the gate of the reference transistor and isolation transistor.

Abstract: A reference voltage generation circuit includes: a reference voltage generation unit configured to generate a plurality of reference voltages having mutually different temperature characteristics, a switching unit configured to select and output one of the plurality of reference voltages in response to a control signal, a temperature detection unit configured to detect temperature change and to output a temperature detection signal, and a control unit configured to generate the control signal in response to the temperature detection to signal.

Abstract: A regulator for providing a low dropout voltage at an output node of the regulator is provided. An amplifier has a non-inverting input terminal for receiving an input voltage, an inverting input terminal and an output terminal. A first resistor is coupled between a ground and the inverting input terminal of the amplifier. A second resistor is coupled to the inverting input terminal of the amplifier. A first transistor is coupled between a voltage source and the second resistor. A current source coupled between the voltage source and a gate of the first transistor provides a bias current. A second transistor coupled between the first transistor and a current mirror has a gate coupled to the output terminal of the amplifier. The first and second transistors are different type MOS transistors. The replica unit generates the low dropout voltage according to a voltage of the output terminal of the amplifier.

Abstract: One object of the present invention is to provide a regulator circuit with an improved noise margin. In a regulator circuit including a bias circuit generating a reference voltage on the basis of the potential difference between a first power supply terminal and a second power supply terminal, and a voltage regulator outputting a potential to an output terminal on the basis of a reference potential input from the bias circuit, a bypass capacitor is provided between a power supply terminal and a node to which a gate of a transistor included in the bias circuit is connected.

Abstract: A supply arrangement, a supply unit and a method in which a switching element is connected in series to an operating voltage and an electrical load, wherein a supply unit supplies an electronic unit with power independently of the switching state of the switching element.

Abstract: A voltage regulator may derive current from a bias circuitry having a constant-transconductance. The bias circuitry may generate the bias current using three NMOS devices. The temperature coefficient of the bias current may be within a specified, desired range. The bias current may be mirrored to low-power regulator circuitry to bias a diode-connected transistor in the low-power regulator circuitry to operate in the strong inversion region. A ratioed current based on the output load current may be injected into a bipolar junction transistor (BJT) device to cause the gate-source voltage (VGS) of the diode-connected device to track the VGS of the output transistor of the voltage regulator, to ensure tighter load regulation.

Abstract: A bandgap circuit includes a bias current generating circuit and a complementary start-up circuit. The bias current generating circuit includes a first node and a second node and is arranged to generate a bias current in response to a voltage provided at the first node or a voltage provided at the second node. The complementary start-up circuit is arranged to start-up the bias current generating circuit and includes a first start-up circuit coupled to the first node and a second start-up circuit coupled to the second node. The first and second start-up circuits operate complementarily, so that the second start-up circuit provides the voltage to the second node when the first start-up circuit is unable to provide the voltage to the first node, and the first start-up circuit provides the voltage to the first node when the second start-up circuit is unable to provide the voltage to the second node.

Abstract: A reference voltage supply circuit is provided. The reference voltage supply circuit includes a first amplifier for amplifying a first input voltage and a fed back first reference voltage, a second amplifier for amplifying a second input voltage and a fed back second reference voltage, a reference voltage generator for generating the first reference voltage and the second reference voltage according to output signals of the first and second amplifiers and feeding the first and second reference voltages back to the first and second amplifiers, and a glitch remover turned on/off according to an input pulse signal to conduct or cut off current flowing between a power supply terminal and the ground.

Abstract: The invention relates to an electronic device with a bandgap reference generator including a first path with series connection of a first bipolar transistor, a first resistor and a second resistor, and a second path with series connection of a second bipolar transistor and a third resistor. The first and second paths are supplied current via a common node through a fourth resistor controlled by an amplifier sensing voltage drops within the first and second paths. A curvature compensation stage compensates for a variation of base emitter voltage of the bipolar transistors by drawing a compensation current from the common resistor node.

Abstract: The present invention provides a reference voltage generating circuit capable of improving a temperature dependence characteristic by a simple configuration. The reference voltage generating circuit includes: a reference voltage generating circuit element including a first diode characteristic element and a second diode characteristic element, a density of a current flowing through the second diode characteristic element being different from a density of a current flowing through the first diode characteristic element, the reference voltage generating circuit element being configured to output a reference voltage generated based on a difference between voltages respectively applied to the first diode characteristic element and the second diode characteristic element; a first adjusting circuit element configured to adjust a first-order temperature coefficient of the reference voltage; and a second adjusting circuit element configured to adjust a second-order temperature coefficient of the reference voltage.

Abstract: A circuit including a first circuit, a second circuit, and a calibration circuit. The first circuit is configured to generate a first reference voltage potential. The second circuit is configured to generate a second reference voltage potential based on a calibration signal. The calibration circuit is configured to generate the calibration signal, to adjust the second reference voltage potential, based on the first reference voltage potential and the second reference voltage potential. The calibration circuit includes a comparing circuit configured to compare the first reference voltage potential and the second reference voltage potential, and a counter configured to increment a counter value based on the comparison of the first reference voltage potential and the second reference voltage potential and generate the calibration signal based on the counter value.

Abstract: Power efficient power supply regulator circuits are disclosed. The circuits are configured to modify their overhead current according to current load. This is particularly advantageous for use in display devices with widely varying current loads. Such displays include bi-stable displays, such as interferometric modulation displays, LCD displays, and DMD displays.

Abstract: One of the objects of the present invention is to suppress variations in the frequency response of a feedback circuit due to variations in the value of a passive element in an error amplifier. One of the embodiments of the present invention provides a configuration allowing the frequency response of a feedback circuit in an error amplifier to be determined by not only the value of a passive element but the gain of an active element. This error amplifier includes a voltage-to-current converter which is an active element. In addition, a first terminal, a second terminal, an operational amplifier, a first resistor, a second resistor, first to fifth transistors, a first current source, and a second current source can be built into an integrated circuit, and a capacitor can be externally provided.

Abstract: A reference voltage circuit includes a first amplifier, a first load device and a first PN junction device, second and third load devices and a second PN junction device, an offset voltage reduction circuit, a coupling node potential takeout circuit, and an area adjustment circuit. The offset voltage reduction circuit is configured to reduce an offset voltage between the first and second input terminals at the first amplifier, and the coupling node potential takeout circuit is configured to take out potentials of the first and second coupling nodes. The area adjustment circuit is configured to adjust an area of the second PN junction device in accordance with the potentials of the first and second coupling nodes which are taken out by the coupling node potential takeout circuit.

Abstract: An AD converter includes: AD conversion stages configured to generate digital data having a value corresponding to a relationship between two analog signals being input and amplifying two analog residual signals with a first amplifier and a second amplifier with gain to be controlled to output the signals; and a gain control part configured to control gain of the first amplifier and the second amplifier on the basis of a monitoring result of the output signals of the first amplifier and the second amplifier. The first amplifier and the second amplifier are formed of open-loop amplifiers, and the gain control part takes out amplitude information of the output signals of the first amplifier and the second amplifier in at least one of the AD conversion stages and performs gain control so that amplitude of the analog signals being output from the stage converges on setting amplitude being set.

Abstract: The load driving device disclosed in the specification includes a controller to generate a first control signal based on an input signal, a first output transistor to supply an output current to a load according to the first control signal, a first dividing circuit to output a first divided voltage by dividing a voltage across a first primary electrode and a second primary electrode of the first output transistor by a first transistor and a second transistor connected in serial, a first voltage generating circuit to output a first reference voltage, and a first comparator to supply a first over current detection signal to the controller based on the first reference voltage and the first divided voltage.

Abstract: Provided is a constant current circuit and a reference voltage circuit with improved line regulation without needing a start-up circuit. The constant current circuit includes: a constant current generation circuit including NMOS transistors and a resistor; a current mirror circuit including a pair of depletion mode NMOS transistors, for allowing a current of the constant current generation circuit to flow; and a feedback circuit for maintaining constant voltages of source terminals of the pair of depletion mode NMOS transistors.