With Amplifier Connected To Or Between Current Paths Patents (Class 323/316)
  • Patent number: 7148672
    Abstract: A bandgap reference circuit (BGRC) that is suitable for low-supply voltage applications outputs an adjustable reference voltage. In an operational mode, main currents flow through diodes and are controlled by a main current generator such that a positive temperature coefficient of a voltage across a resistor compensates for a negative temperature coefficient of a voltage across the diodes. The difference of the voltages across the diodes increases with temperature and is used to generate the main currents having positive temperature coefficients. The BGRC ensures sufficient current flow through the diodes during startup. In a startup mode, a startup current generator outputs startup currents that combine with the main currents and prevent the BGRC from operating at incorrect operating points that would otherwise be stable when insufficient current flows through the diodes. The startup currents are generated when the voltage drop across the resistor is less than a predetermined voltage offset.
    Type: Grant
    Filed: March 16, 2005
    Date of Patent: December 12, 2006
    Assignee: ZiLOG, Inc.
    Inventor: Steven L. Holmes
  • Patent number: 7145318
    Abstract: A first voltage divider includes a first resistor having a first resistance coupled to a positive voltage reference in series with a second resistor having a second resistance and coupled to ground. A second voltage divider includes a third resistor having the first resistance coupled to the positive voltage potential in series with a fourth resistor having the second resistance, and a fifth resistor having a third resistance and coupled to a negative voltage. A comparator has an inverting input coupled to the junction of the first and second resistors and a non-inverting input coupled to the junction of the third and fourth resistors. The first and third resistors are equal and the second and fourth resistors are equal. The fifth resistor has a value chosen to drop a voltage equal to the target voltage to be regulated when the voltage regulator output is equal to that target voltage.
    Type: Grant
    Filed: November 21, 2005
    Date of Patent: December 5, 2006
    Assignee: Atmel Corporation
    Inventors: Johnny Chan, Tin Wai Wong, Ken Kun Ye
  • Patent number: 7135849
    Abstract: An extremal voltage detector produces an output voltage from an operational amplifier having its non-inverting input terminal connected to a first node and its inverting input terminal connected to a second node. A number of identical metal-oxide-semiconductor field-effect transistors (MOSFETs) controlled by respective input voltages are connected in parallel between the first node and a first power supply terminal. Another identical MOSFET, controlled by the output voltage, is connected between the second node and the first power supply terminal. Alternatively, a plurality of identical MOSFET detection circuits, controlled by the input and output voltages, are connected in parallel between the first power supply node and the first and second nodes. A pair of constant-current circuits conduct equal currents from the first and second nodes to a second power-supply terminal.
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: November 14, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Syouhei Yamamoto
  • Patent number: 7132821
    Abstract: Systems are provided for generating and distributing a plurality of reference currents on an integrated circuit. More particularly, an integrated circuit is provided which includes a reference current generating system. The reference current generating system includes a first reference current generator disposed at a first location of the integrated circuit which is operable to generate a plurality of first reference currents. A plurality of second reference current generators are disposed at a plurality of second locations of the integrated circuit. Each of the second reference current generators are operable to generate a second reference current from one of the plurality of first reference currents. In a particular example, the first location at which the first reference current generator is disposed is a central location and the second locations are disposed remote from the first location.
    Type: Grant
    Filed: April 11, 2005
    Date of Patent: November 7, 2006
    Assignee: International Business Machines Corporation
    Inventors: Hibourahima Camara, Louis Lu-Chen Hsu, Karl D. Selander, Michael A. Sorna
  • Patent number: 7126354
    Abstract: A circuit configuration has a load transistor and a current measuring configuration. A method ascertains a load current through a load transistor. The circuit configuration includes a first and a second current sensor with a current measuring transistor in each case. Each of the current sensors provide a current measurement signal that is fed to an evaluation circuit. The evaluation circuit provides, from the first current measurement signal, a current measurement signal that is dependent on the load current. The load transistor and the current measuring transistors are preferably integrated in a common semiconductor body having a multiplicity of transistor cells of identical construction. The evaluation circuit preferably accounts for the spatial position of the cells of the first and second current measuring transistors in the cell array.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: October 24, 2006
    Assignee: Infineon Technologies AG
    Inventors: Gerald Deboy, Ilia Zverev
  • Patent number: 7122997
    Abstract: A temperature compensated low voltage reference circuit can be realized with a reduced operating voltage overhead. This is accomplished in several ways including minimizing drain voltage variation at the drains of two inter-connected transistors and implementing a current conveyer in order to adjust the temperature coefficient of an output current or voltage. Various combinations of voltage minimization and temperature coefficient adjustments may be used to design a reference circuit to a circuit designer's preference. A temperature compensated current source may also be created. The temperature compensated current source may be used to provide a wide range of output voltages. All of the reference circuits may be constructed with various types of transistors including DTMOS transistors.
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: October 17, 2006
    Assignee: Honeywell International Inc.
    Inventor: Paul M. Werking
  • Patent number: 7123075
    Abstract: A current compensation circuit for use with a current mirror circuit is disclosed. The current mirror circuit has a current path defined by a first programmable current mirror stage driving a first fanout current mirror stage. The first programmable current mirror stage includes at least one transistor with a channel length exhibiting a first channel length modulation factor ?1. The first fanout current mirror stage connects to a supply voltage source. The current compensation circuit comprises a supply voltage current mirror coupled to the supply voltage source and has a current output coupled to the current path. The compensation circuit further includes a second programmable current mirror coupled in series to the supply voltage current mirror and including at least one transistor with a channel length exhibiting a channel length modulation factor ?2. The second channel length modulation factor ?2 is larger than the first channel length modulation factor ?1.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: October 17, 2006
    Assignee: Teradyne, Inc.
    Inventor: Cosmin Iorga
  • Patent number: 7122998
    Abstract: A system and method is disclosed for providing a bandgap reference voltage generator that can successfully operate with a low operating voltage. Three current sources are controlled to provide same amount of current through three paths. The first current source is used to enable a first negative temperature coefficient module, while the second and third current sources are used to enable a first positive temperature coefficient module. The three current sources together are used to enable a reference voltage output module, which is connected to a current summing module for producing a bandgap reference voltage independent of temperature variations.
    Type: Grant
    Filed: March 19, 2004
    Date of Patent: October 17, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventor: Chung-Hui Chen
  • Patent number: 7119620
    Abstract: In an RF communication system, aspects of constant or proportional to absolute temperature biasing for minimizing transmitter output power variation may comprise configuring at least one current source to provide a temperature dependent current, where the current may be constant with temperature or vary proportionally to absolute temperature. A control voltage that may be generated by an operational amplifier may be fed back to control the current source. An input reference voltage may also be generated for the operational amplifier by utilizing PN junction characteristics of at least one bipolar junction transistor. Resistance may be adjusted to allow operation of the current source at a plurality of different supply voltages, including the different supply voltages that may be less than 1.2 volts, for example. Additionally, adjusting the resistance may also allow the current to be constant with temperature or vary with temperature.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: October 10, 2006
    Assignee: Broadcom Corporation
    Inventor: Michael (Meng-An) Pan
  • Patent number: 7119528
    Abstract: A bandgap reference generation circuit utilizes two feedback loops to maintain the voltage at across the current sources to be essentially the same, such that the reference voltage remains constant over variations in process, temperature, and supply voltage. The accuracy of the reference voltage is maintained even at low supply voltages. Furthermore, the feedback loops increase the output impedance of the current sources, reducing the amount of noise coupling from the power supply, improving power supply rejection ratio.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventor: Todd Morgan Rasmus
  • Patent number: 7112948
    Abstract: A voltage source includes first and second pn junctions which conduct the outputs of respective current sources to establish respective base-emitter voltages Vbe1 and Vbe2 at respective nodes; Vbe1 and Vbe2 can each be generated with a current I or a current N*I. An amplifier A1 has its non-inverting input connected to the second node and its inverting input connected to the first node through an input capacitor; a feedback capacitor is connected between the inverting input and a third node. Switches are connected between A1's inverting input and A1's output, between the third node and A1's output, and between the third node and a circuit common point. A control circuit operates the switches and current sources during first and second operating phases to selectively produce a temperature independent output voltage or a temperature dependent output voltage.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: September 26, 2006
    Assignee: Analog Devices, Inc.
    Inventors: Michael P. Daly, Evaldo M. Miranda, David Thomson, A. Paul Brokaw
  • Patent number: 7109697
    Abstract: An operational amplifier having temperature-compensated offset correction. The amplifier includes an operational amplifier circuit, that has a first input field effect transistor (FET) having a gate connected to receive a first input signal, and a second input FET having a gate connected to receive a second input signal, the first and the second input FETs being connected together to receive a first bias current, and also being connected to respective sides of a first current mirror. A correction amplifier circuit is also provided, that has a first correction FET having a gate, and a second correction FET having a gate, the first and the second correction FETs being connected together to receive a second bias current, and also being connected to respective sides of a second current mirror.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: September 19, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Amer Hani Atrash, Shanmuganand Chellamuthu
  • Patent number: 7106042
    Abstract: A regulator circuit including output loading sense circuitry where the output loading sense circuitry comprises, in one example, a resistor in the feedback leg of the replica bias regulator, a switch in the feedback leg of the replica bias regulator for bypassing the resistor, and a comparator used to sense the output loading and selectively drive the switch.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: September 12, 2006
    Assignee: Cypress Semiconductor Corporation
    Inventor: Scott A. Jackson
  • Patent number: 7102342
    Abstract: A current reference circuit has a band gap voltage generating circuit, a voltage buffer, a voltage-to-current converting circuit and an auto-tuner. The band gap voltage generating circuit generates a band gap reference voltage. The voltage buffer generates a first bias voltage and a second bias voltage. The voltage-to-current converting circuit generates a source current in response to a tuning voltage. The auto-tuner generates the tuning voltage to maintain a transconductance. Thus, the current reference circuit may automatically adjust the transconductance, so that the current reference circuit may supply the source current that is stable against temperature and process variations.
    Type: Grant
    Filed: January 5, 2005
    Date of Patent: September 5, 2006
    Assignee: Samsung Electronics, Co., Ltd.
    Inventor: Jae-Wan Kim
  • Patent number: 7095219
    Abstract: The power supply unit is provided with a power supply circuit adapted to generate an output voltage in accord with an instruction voltage, an output condenser Co connected to the output end of the power supply circuit, and an auxiliary output voltage setting circuit adapted to compare the instruction voltage and the output voltage and to cause the output condenser to discharge its electric charge when the instruction voltage becomes lower than the output voltage. Because of the auxiliary output voltage setting circuit, the power supply circuit quickly generates an output voltage in accord with the instruction voltage if the instruction voltage is lowered.
    Type: Grant
    Filed: December 14, 2004
    Date of Patent: August 22, 2006
    Assignee: Rohm Co., Ltd.
    Inventors: Ko Takemura, Kiyotaka Umemoto, Kenichi Nakata
  • Patent number: 7095272
    Abstract: An internal power supply voltage generation circuit includes a main amplifier that supplies a current from an external power supply node to an internal power supply line in accordance with the difference between a reference voltage from a reference voltage generation circuit and an internal power supply voltage on the internal power supply line. The current supply amount by the main amplifier is adjusted by a level adjust circuit, according to the difference between the external power supply voltage and the reference voltage. The internal power supply voltage generation circuit can suppress reduction in the internal power supply voltage in the vicinity of the lower limit area of the differential power supply voltage.
    Type: Grant
    Filed: August 25, 2005
    Date of Patent: August 22, 2006
    Assignee: Renesas Technology Corp.
    Inventor: Fukashi Morishita
  • Patent number: 7095271
    Abstract: A bias circuit includes a feedback amplifier, a current source, first and second differential transistors, first and second resistive transistors and first and second mirror transistors. The feedback amplifier compares a first reference voltage with a voltage on an internal node and outputs a feedback signal. The current source is controlled by the feedback signal. The first and second differential transistors are connected to the current source. The first and second differential transistors receive a second reference voltage. The second differential transistor has a dimension different from the first differential transistor. The first and second resistive transistors are connected to the first and second differential transistors respectively. The second resistive transistor has a first gate. Each of the first and second mirror transistors has a gate connected to the first gate. The first mirror transistor is connected to the internal node. The second mirror transistor is connected to an output node.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: August 22, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Hiroyuki Mori
  • Patent number: 7091770
    Abstract: Circuit arrangement for voltage regulation having a voltage divider and a regulating circuit. The voltage divider is arranged between a first potential and a reference-ground potential and has a plurality of diodes connected in series, wherein an output voltage is tapped off at a terminal of one of the diodes. The regulating circuit, to which the output voltage and a reference voltage are applied, regulates the first potential based on a comparison of the output voltage with the reference voltage. The divider ratio of the voltage divider is altered by activating or deactivating one or more of the diodes, and is additionally altered by setting a magnitude of a voltage drop across at least one of the diodes.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: August 15, 2006
    Assignee: Infineon Technologies AG
    Inventor: Andreas Schlaffer
  • Patent number: 7075359
    Abstract: A two phase internal voltage generator at least includes a first phase internal voltage generator and a second phase internal voltage generator. The power consumption of the second phase internal voltage generator is relatively lower than that of the first phase internal voltage generator. The first phase internal voltage generator promptly generates and provides a first internal voltage source when an external power is provided. As a second internal voltage source that is provided by the second phase internal voltage generator is stable, the first phase internal voltage generator cuts off the supply of the first internal voltage source. The present invention prevents the problem to major power consumption for conventional internal voltage generator.
    Type: Grant
    Filed: September 8, 2003
    Date of Patent: July 11, 2006
    Assignee: Winbond Electronics Corp.
    Inventor: Chieng-Chung Chen
  • Patent number: 7064602
    Abstract: Described are methods and circuits that reduce or eliminate the impact of power-supply fluctuations on circuit performance. IC dies include compensation circuitry that compares local power-supply voltages to relatively stable reference voltages, such as unloaded distributed supply voltages, to sense local supply-voltage fluctuations. Based upon this comparison, the compensation circuitry adjusts circuit characteristics that might otherwise suffer performance degradation. Receivers in accordance with some embodiments automatically tailoring their gain to the output characteristics of a number of possible transmitter types with which the receivers may be expected to communicate.
    Type: Grant
    Filed: May 5, 2004
    Date of Patent: June 20, 2006
    Assignee: Rambus Inc.
    Inventor: Huy Nguyen
  • Patent number: 7064696
    Abstract: A first current mirror circuit that operates at the time of a rise in a first signal is connected to a current source, a second current mirror circuit that operates at the time of a rise in the first signal is connected to the first current mirror circuit, and a third current mirror circuit that operates at the time of a rise in a second signal is respectively connected to the current source and the point of connection between the first current mirror circuit and the second current mirror circuit. A pulse generation circuit for generating first and second signals from an external signal is provided. The second signal rises in sync with the first signal, and falls before the first signal.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: June 20, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Manabu Ohkubo, Masayuki Ozasa
  • Patent number: 7057444
    Abstract: Various embodiments of a voltage level detector implemented as an integrated circuit whose trip point is approximately constant over variations in temperature as well as variations in transistor fabrication parameters are disclosed along with a differential amplifier whose input offset voltage is highly immune to said variations. In one embodiment, a voltage generator supplies a composite voltage to the gate of the tail current transistor of the voltage level detector or differential amplifier. The first component of the voltage is approximately equal to the threshold voltage of NMOS transistors comprised in the device over variations in operating temperature as well as variations in transistor fabrication parameters while the second component is approximately constant with respect to said variations. When applied to the gate of the tail current transistor, the first component may turn the transistor on in spite of the above-mentioned parametric variations.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: June 6, 2006
    Assignee: Standard Microsystems Corporation
    Inventor: Paul F. Illegems
  • Patent number: 7057909
    Abstract: A current/charge-voltage convert circuit having an operational amplifier and a capacitor connected between the input terminal and the output terminal of the operational amplifier, this current/charge-voltage convert circuit characterized in that it comprises a first pair of diodes connected in mutually opposing directions to this input terminal, a second pair of diodes connected in the opposite direction of this first pair of diodes to the respective other terminal of this first pair of diodes, a pair of current sources connected in mutually opposing directions to the respective other terminal of this first pair of diodes, a pair of switches connected to the respective other terminal of this first pair of diodes, and resistors connected between the respective other terminal of this second pair of diodes.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: June 6, 2006
    Assignee: Agilent Technologies, Inc.
    Inventors: Tomoya Fujisaki, Masaharu Goto
  • Patent number: 7057382
    Abstract: A voltage reference circuit comprising a first reference voltage source, a second reference voltage source, at least one of said first and second reference voltage sources being dependent on temperature, and first circuitry connected to at least one of said first and second reference voltage sources to provide a third reference voltage, said third reference voltage being dependent on temperature.
    Type: Grant
    Filed: July 21, 2004
    Date of Patent: June 6, 2006
    Assignee: STMicroelectronics Limited
    Inventor: Anna Sigurdardottir
  • Patent number: 7053597
    Abstract: A regulator and a related control method for providing a regulated voltage. The regulator includes a bipolar junction transistor (BJT), a capacitive module having capacitors, and an operational amplifier (OP-AMP) for feedback control. The OP-AMP has a amplifying circuit, a driving stage and a current mirror. The BJT charges the capacitive module to establish the regulated voltage, the OP-AMP controls a driving current of a base of the BJT according to the feedback of the regulated voltage. When the regulated voltage is in a predetermined range, the current mirror provides a secondary current through the driving stage such that the driving current is reduced, and the current of the BJT is thus limited to its rated current. When the regulated voltage is out of the predetermined range, the current mirror stops providing the secondary current, and the regulator will operate normally without current supplied by the current mirror.
    Type: Grant
    Filed: July 2, 2003
    Date of Patent: May 30, 2006
    Assignee: Via Technologies Inc.
    Inventors: Peter Lin, Arioso Lin
  • Patent number: 7053591
    Abstract: A power conversion device contains an electronic circuit for sensing an output current characteristic of an output drive device. The characteristic of the current through the output drive device is sensed and communicated to a switching device for controlling a sensing current. The switching device is coupled to the output drive device and senses the output current of the output drive device. The switching device produces a sensing current proportional to the sensed output current. An internal resistance device is used for producing a sensing voltage. The internal resistance device is coupled with the switching device and receives the sensing current. The internal resistance device provides the sensing voltage from the sensing current proportional to the current through the output drive device.
    Type: Grant
    Filed: October 20, 2004
    Date of Patent: May 30, 2006
    Assignee: Atmel Corporation
    Inventors: Hafid Amrani, Hubert Cordonnier, Christian Dupuy
  • Patent number: 7042280
    Abstract: A regulator system includes a power device and a sense device. During a normal operating mode, the power device is arranged to deliver current to a load, while the sense device is arranged to monitor the load current. An over-current mode is activated when the sensed load current exceeds a short-circuit current-limit. During the over-current mode, the power device is switched off such that the energy loss is minimized. Once the short-circuit condition is removed, the regulator system returns to the normal operating mode. The sense device is coupled to the load in such a way that the quiescent current of the regulator system does not rise with increasing load current. The regulator system is further arranged such that the short-circuit current-limit decreases automatically with increased operating temperature. The described regulator system has significantly reduced energy losses while also minimizing risks of thermal induced device failures during the short-circuit condition.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: May 9, 2006
    Assignee: National Semiconductor Corporation
    Inventors: Shengming Huang, Robin Shields, John Gough
  • Patent number: 7030686
    Abstract: A constant-voltage circuit uses a capacitor having a low ESR (equivalent serial resistance), such as a ceramic capacitor, for phase compensation, wherein a voltage drop of an output voltage due to a resistance provided for optimizing the phase compensation is compensated for by providing output current to an output a current proportional to an voltage detecting resistance through a current mirror circuit thereby the voltage drop of the output voltage is compensated for.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: April 18, 2006
    Assignee: Ricoh Company, Ltd.
    Inventor: Kohzoh Itoh
  • Patent number: 7026802
    Abstract: A replica biased voltage regulator circuit (100) is disclosed that provides high frequency response via local positive feedback and low frequency response via a negative feedback loop. A voltage regulator circuit (100) can include current conveyor (106) that essentially forces an output voltage (Vload) to follow a replica voltage (Vrep). An operational amplifier (102) can provide negative feedback by controlling current supplied to the current conveyor (104) based on a comparison between a reference voltage (Vref) and the replica voltage (Vrep).
    Type: Grant
    Filed: October 14, 2004
    Date of Patent: April 11, 2006
    Assignee: Cypress Semiconductor Corporation
    Inventor: Julian Gradinariu
  • Patent number: 7023194
    Abstract: A band gap voltage reference circuit includes a high accuracy band gap (BG) circuit that generates a BG voltage potential VbgH. A low accuracy BG circuit includes a variable resistance and outputs a BG voltage potential VbgL that is related to a value of the variable resistance. A calibration circuit communicates with the high and low accuracy BG circuits, adjusts the variable resistance based on a difference between the BG voltage potential VbgH and the BG voltage potential VbgL, and shuts down the high accuracy BG circuit when the BG voltage potential VbgL is approximately equal to the BG voltage potential VbgH.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: April 4, 2006
    Assignee: Marvell International Ltd.
    Inventors: Sehat Sutardja, Jiancheng Zhang
  • Patent number: 7023181
    Abstract: A constant voltage generator is comprised of a band gap reference circuit, a current supply circuit, a starting circuit and a voltage-current conversion circuit, and the starting circuit is further comprised of a first and second load elements, a first transistor which is connected to the first load element, a second transistor of which current capability is larger than the first transistor and which shares the voltage of the base with the first transistor and is connected to the second load element, a first resistor which is connected to the first transistor, and a second resistor which is connected to the second transistor, and the output of the voltage-current conversion circuit is input to the connection point between the second transistor and the second resistor, and the current at the connection point between the second load element and the second transistor controls the current supply circuit.
    Type: Grant
    Filed: June 18, 2004
    Date of Patent: April 4, 2006
    Assignee: Rohm Co., Ltd.
    Inventor: Kenichi Nakata
  • Patent number: 7019584
    Abstract: A bandgap reference circuit can use various output stages to implement a controlled feedback method of sensing and supplying the needed load current through a sensing network. A small amount of circuitry can be added to a class AB output stage to decouple the bandgap reference feedback from a capacitive load and simultaneously sense load current needs and boost current as needed while minimizing voltage droop. Such circuits can be implemented using relatively compact designs while still reducing droop, and thus allowing the use of a large external capacitor to reduce noise and maintain good power supply rejection.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: March 28, 2006
    Assignee: Lattice Semiconductor Corporation
    Inventors: Robert M. Bartel, Joey I. Doernberg, Edward E. Miller
  • Patent number: 7015680
    Abstract: A field effect transistor (FET) driver circuit includes an error amplifier for providing a FET control signal and a current limiting amplifier for preventing excessive current flow through the FET. The current limiting amplifier generates an overcurrent signal when an excessive current is detected. In response to the overcurrent signal, a voltage control circuit adjusts the voltage at the output of the error amplifier to turn off the FET. Meanwhile, a pulldown circuit at an input of the error amplifier adjusts the voltage provided to that input to cause the error amplifier to provide an output voltage that also tends to turn off the FET. If a buffer is present at that input to the error amplifier, a second pulldown circuit is placed at the input to the buffer to maintain a stable unity gain across the buffer.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: March 21, 2006
    Assignee: Micrel, Incorporated
    Inventors: Farhood Moraveji, Behzad Mohtashemi
  • Patent number: 7015684
    Abstract: A semiconductor device includes a negative voltage regulator capable of regulating a negative input voltage and outputting a negative output voltage. The negative voltage regulator has a driver for adjusting the negative output voltage, a first operational amplifier for outputting a driving voltage for controlling a current on a first transistor included in the driver according to a feedback voltage and a reference voltage, a second operational amplifier for outputting a driving voltage for controlling a current of a second transistor, a current source circuit having two triple-well NMOS transistors for providing the driver a current, and a voltage potential divider for generating the feedback voltage by dividing potentials of a voltage source and the negative output voltage and outputting the feedback voltage to the first operational amplifier and the second operational amplifier for adjusting the currents of the first and second transistors thereby regulating the negative output voltage.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: March 21, 2006
    Assignee: AMIC Technology Corporation
    Inventor: Yin-Chang Chen
  • Patent number: 7012416
    Abstract: A bandgap voltage reference is described which has reduced sensitivity to noise and amplifier offset. By configuring the circuitry such that the base width of the component transistors is not varied on application of a bias, it is possible to obviate the Early effect.
    Type: Grant
    Filed: December 9, 2003
    Date of Patent: March 14, 2006
    Assignee: Analog Devices, Inc.
    Inventor: Stefan Marinca
  • Patent number: 7009374
    Abstract: A CMOS bandgap reference (BGR) voltage generator circuit has a passive resistor T-network of low resistance connected between the inverting and non-inverting inputs of the op-amp in the circuit. The op-amp's output is connected to the gates of three PMOS transistors and the drains of two of the transistors are connected in a looped manner to the input terminals of the op-amp. The T-network is placed between these drains that connect to the op-amp.
    Type: Grant
    Filed: March 19, 2004
    Date of Patent: March 7, 2006
    Assignee: Micron Technology Inc.
    Inventor: Philip Neaves
  • Patent number: 7005839
    Abstract: A first PN junction and first current supply are connected between a first potential and a second potential. A second PN junction, first resistive element and second current supply are connected between the first potential and the second potential, the size of the second PN junction being different from that of the first PN junction. A second resistive element is connected in parallel with the first resistive element and second PN junction. A differential amplifier is configured to receive, at an inverting input terminal, a potential between a first current supply and the first PN junction and, at a non-inverting input terminal, a potential on a connection point between a second current supply and the first resistor and to control the first, second and third current supplies by a potential difference between the inverting input and the non-inverting input.
    Type: Grant
    Filed: March 19, 2004
    Date of Patent: February 28, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masaharu Wada
  • Patent number: 7005924
    Abstract: The current limiting circuit of the present invention includes a transconductance amplifier having two outputs and forming a conventional feedback loop. A first output connects to an output transistor and a second output is a replica output used to form a rapid response feedforward path to control the gate of the output transistor, for example, an external MOSFET.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: February 28, 2006
    Assignee: Intersil Americas Inc.
    Inventors: Sumer Can, William B. Shearon, Raymond Giordano
  • Patent number: 7002401
    Abstract: A voltage buffer for capacitive loads isolates the load from the feedback loop. Using a variation of a follower arrangement, a second transistor outside of the feedback loop introduced. The current to the load is supplied through the second transistor, which is connected to have the same control gate level as the transistor in the feedback loop and provide an output voltage based on the reference input voltage. The output voltage is dependent upon the input voltage, but the load is removed from the feedback loop. By removing the load from the feedback loop, the loop is stabilized with only a very small or no compensating capacitor, allowing the quiescent current of the buffer to be reduced and the settling time to be improved. One preferred use of the present invention is to drive the data storage elements of a non-volatile memory.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: February 21, 2006
    Assignee: SanDisk Corporation
    Inventor: Shahzad Khalid
  • Patent number: 6998903
    Abstract: Provided is directed to an internal supply voltage generator for a delay locked loop circuit which can prevent a tAC for a next read command from being outputted with a delay, by blocking a supply voltage VDLL from a transient lowering regardless of a reacting speed of a VDLL supply voltage generator by means of maximizing a driving power of the VDLL supply voltage generator which generates the supply voltage VDLL of a delay locked loop during entering time from a power down period to a power up period. Furthermore, as the supply voltage VDLL is prevented from lowering without rising the reacting speed of the VDLL supply voltage generator, it is advantageous to prevent a distorting phenomenon of the supply voltage VDLL in response to a fast reacting speed of the VDLL supply voltage generator.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: February 14, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventor: Seung Eon Jin
  • Patent number: 7000122
    Abstract: A managing system manages a plurality of VRMs associated with a plurality of microprocessors and connected in parallel together between first and second voltage references, the VRMs having output terminals connected together and arranged to communicate over a common bus. The managing system includes an error amplifier being input an output voltage signal from the VRM plurality, a reference voltage, and a droop voltage produced through an equivalent droop resistor receiving an output current signal from the VRM plurality and being connected to the common bus. The error amplifier effects a comparison of the input signals to generate a control voltage signal to the VRM plurality. Advantageously, the managing system comprises a controller connected to the equivalent droop resistor.
    Type: Grant
    Filed: October 16, 2001
    Date of Patent: February 14, 2006
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alessandro Zafarana, Claudia Castelli
  • Patent number: 6998831
    Abstract: A current mirror divides an input source voltage dynamically, to provide a controlled voltage that corresponds to an output load voltage. The correspondence between this controlled voltage and the output load voltage determines the correspondence between the output current and the input current. By dynamically adjusting the controlled voltage, the correspondence to the output load voltage can be maintained to very low voltage. Preferably, the output load voltage is also dynamically divided to provide a comparison voltage for comparing to the controlled voltage when the output load voltage is high, thereby providing the appropriate output current at high voltage levels. The combination of these two techniques provides a wide output voltage compliance, and a high output impedance.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: February 14, 2006
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Olivier Charlon
  • Patent number: 6998830
    Abstract: A reference circuit includes a band-gap core, two current sources, and an amplifier circuit that are arranged in cooperation. The band-gap core circuit is biased by current that is supplied from a local power supply via the first current source. The second current source shunts the excess away from the band-gap core circuit in response to a control signal. The control signal is provided by the amplifier circuit, which is arranged to monitor the signals in the band-gap core circuit. The feedback loop that is formed with the amplifier circuit is compensated with a capacitor that is not referenced to the local power supply. The first current source can be further improved by cascading. The reference circuit has excellent characteristics for use in switching applications, where the local supply is perturbed by fast switching transients.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: February 14, 2006
    Assignee: National Semiconductor Corporation
    Inventors: Paul M. Henry, Wade A. Leitner
  • Patent number: 6989659
    Abstract: A linear low dropout voltage regulator is described that makes use of a depletion mode NMOS pass transistor and of a PMOS transistor in series to the NMOS transistor and connected to its drain. The depletion NMOS transistor assures low dropout operations, while the series PMOS transistor allows the current regulation even under the condition of shorted load. The same PMOS transistor may be used to disable the current in the load without generating a negative voltage at the gate of the depletion pass transistor. This regulator is inherently stable without the need for an output capacitor in parallel to the load.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: January 24, 2006
    Assignee: Acutechnology Semiconductor
    Inventors: Paolo Menegoli, Carl K. Sawtell
  • Patent number: 6985027
    Abstract: A semiconductor integrated circuit comprises a power supply voltage step down circuit and a MOS circuit group. The power supply voltage step down circuit is supplied with a power supply voltage and controlled by a standby control signal indicating an operating state or a standby state. The power supply voltage step down circuit outputs a first internal power supply voltage lower than the power supply voltage to an internal power supply line when the standby control signal indicates the operating state, and outputs a second internal power supply voltage lower than the first internal power supply voltage to the internal power supply line when the standby control signal indicates the standby state. The MOS circuit group including one or more MOS transistors which are supplied with the first or second internal power supply voltage from the internal power supply line to operate.
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: January 10, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tomoaki Yabe
  • Patent number: 6982915
    Abstract: An electronic device (10), comprising a plurality of data storage cells (12), collectively operable in a data access mode and separately in a sleep mode. The sleep mode comprises a period of time during which the plurality of data cells are not accessed and during which a data state stored in each cell in the plurality of data cells is to be maintained at a valid state. The electronic device further comprises circuitry (18?) for providing at least one temperature-dependent voltage to at least one storage device in each cell in the plurality of data storage cells during the sleep mode.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: January 3, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Theodore W. Houston, Luan Dang, Andrew Marshall
  • Patent number: 6979990
    Abstract: A reference voltage generator, and a method thereof, supplies a reference voltage to a device that decides between first and second output levels based on the reference voltage. The reference voltage generator includes a reference current unit through which a reference current flows and a replica unit. An input terminal of the replica unit is connected to the reference current unit. An output terminal of the replica unit is connected to the device. The replica unit includes a replica circuit replicating a circuit in the device that decides the first output level. The replica unit multiplies the first output level from the replicated circuit in response to the reference current by a predetermined ratio and outputs the result as the reference voltage to the device.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: December 27, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Heung-bae Lee
  • Patent number: 6975164
    Abstract: In order to generate a constant voltage, a reference voltage is generated. Short wave noises are cut off from the reference voltage. A control signal is generated based on the reference voltage and an output voltage. The output voltage is controlled in response to the control signal to provide a constant output voltage.
    Type: Grant
    Filed: January 27, 1998
    Date of Patent: December 13, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Katsuaki Matsui, Yoshimasa Sekino
  • Patent number: 6975101
    Abstract: A band-gap reference circuit includes a core reference circuit with a core output terminal, a voltage amplifier, coupled to the core output terminal and having a voltage amplifier terminal, a transconductance amplifier, coupled to the voltage amplifier terminal, and a shared voltage rail, coupled to the core reference circuit and the transconductance amplifier. The voltage amplifier and the transconductance amplifier can include multiple stages. The reference circuit can be operated at low voltages, including 1.3–1.4V. The reference circuit has low spreading within a batch of manufactured systems, partially due to the fact that the reference circuit does not utilize differential amplifiers. The reference circuit can achieve a power supply ripple rejection ratio in excess of 100 dB at low frequencies. Also, no startup circuit is required for the operation of the reference circuit.
    Type: Grant
    Filed: November 19, 2003
    Date of Patent: December 13, 2005
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Nicolae Marin, Sridhar Kotikalapoodi
  • Patent number: 6975100
    Abstract: A circuit arrangement for regulating the duty cycle of an electrical signal including a first input differential amplifier, to which an input signal is applied; a first current source for controlling the current through the first input differential amplifier; a second input differential amplifier, to which the same input signal is applied; a second current source for controlling the current through the second input differential amplifier; a device which generates a fluctuating voltage signal from output signals of the two input differential amplifiers; a buffer device, which converts the fluctuating voltage signal into a digital output signal; a capacitance and a device for charging and discharging the capacitance in time with the digital output signal. The voltage present at the capacitance is fed to the first and second current sources as control voltage and effects regulation of the two current sources in opposite senses.
    Type: Grant
    Filed: April 14, 2004
    Date of Patent: December 13, 2005
    Assignee: Infineon Technologies AG
    Inventors: Harald Doppke, Detlev Theil, Torsten Harms, Stefan van Waasen, Christian Grewing