Abstract: Self-healing diagnostics methods are disclosed. One of the methods involves determining whether a self-healing cable has at least one self-healed region and includes transmitting an outgoing test signal down the self-healing cable and measuring the return test signal. The method also includes comparing the measured return test signal to an ideal return signal associated with the same type of self-healing cable that has no self-healed regions to determine whether the self-healing cable has at least one self-healed region. A database of return signals based on different types of self-healed regions formed by different types of damaging conditions is also used to characterize the return test signal and thus the type of self-healed region present in the cable.

Abstract: A system is disclosed that can be inserted between cable runs of electrical equipment so as to provide access to signal/data lines associated with the electrical equipment. The system includes a microprocessor and a matrix switch and preferably display equipment and measurement instrumentation. The microprocessor controls the matrix switch so as to route signals to a high impedance probe array that then feeds data to measurement instrumentation. The system provides pattern analyzers, which are resident in the microprocessor routine software. The measurement instrument provides measurement quantities, timing, and patterns that may be compared to known good data to ascertain the state of the health of the electrical equipment. The system is also capable of blocking signal paths and providing known good signals to the associated electrical equipment. Test data is stored in memory for later retrieval and the display equipment provides a pass, fail or intermittent indication.

Abstract: Non-contact reflectometry for testing a signal path is described. The technique includes using capacitive coupling to inject a test signal into the signal path and extract a response signal from the signal path. Reflectometry techniques are used to determine characteristics of the signal path from the response signal. The technique is compatible with performing testing of a signal path carrying an operational signal.

Abstract: A particulate (soot) sensor system has a diagnostic feature for verifying the integrity of the wiring leads. The sensor system includes a sensor and processing circuitry. The sensor has a substrate, first and second sensing electrodes on the substrate and a heater electrode. The heater electrode is electrically isolated from the first and second sensing electrodes, although there is a parasitic capacitance between them. The processing circuitry includes a heater driver, a measurement circuit connected to the sensing electrodes by wire leads, and a detector. The heater driver, in addition to energizing the heater, produces a stimulus signal that is applied to the heating electrode, which is then coupled via the parasitic capacitance to the sensing electrodes. The detector is coupled to the wiring leads and is configured to detect the stimulus signal when there is electrical conductivity over the leads to the sensing electrodes.

Abstract: Small-scale measuring circuits (111-1qum) are arranged in m columns×q rows. The small-scale measuring circuits of each row (111-11m, 121-12m, 1q1-1qm) are connected in series. The respective rows are connected in parallel. Supplying reference signals B having different parameter values to the small-scale measuring circuits (111-11m, . . . ) connected in series makes it possible to improve the measurement range or measurement resolution. Supplying reference signals B having the same parameter to the respective rows can reduce a noise component depending on the transistor size. According to this invention, using a plurality of small-scale measuring circuits in accordance with required measurement performance concerning a measurement range, resolution, noise reduction, or the like can implement the desired performance while minimizing the area of each measuring circuit.

Abstract: An apparatus for testing the life of a leakage current protection device having a leakage current detection circuit and a trip mechanism having a switch device. In one embodiment, the apparatus a ground fault simulation unit, a fault detector of the leakage current detection circuit and the trip mechanism, and a life testing detection control unit having an MCU for controlling operation of the fault detector. In operation, a first signal (pulse signal) is sent to the gate of the switching device to generate a first voltage at the cathode of the switching device, a second signal is sent to the ground fault simulation unit to generate a simulated ground fault for the leakage current detection circuit to generate a second voltage at the gate of the switching device, and the first and second voltages are measured to determine whether a fault exists in the leakage current detection circuit and the trip mechanism.

Abstract: The present invention provides a fault detecting method and a layout method for a semiconductor integrated circuit. The fault detecting method performs detection for faults in a semiconductor integrated circuit using a fault list corresponding to information on sites in the semiconductor integrated circuit where a fault is likely to occur or information required to reduce such faults. In addition, the fault detecting method and the layout method perform ordering of faults with their likelihood and weighting of the faults, taking into consideration physical information on a mask pattern within a chip or records of actual use of cells or functional blocks.

Abstract: A test system including a package with interconnect paths. The package may have electrical paths that are electrically connected by the interconnect paths. The electrically connected electrical paths may yield increased data without significantly increasing the required testing hardware.

Abstract: Systems and methods for determining the configuration of a connection between two devices by measuring an electrical characteristic are provided. Using the measured electrical characteristic, a device is able to select an appropriate communication interface, such as serial, Universal Serial Bus (USB), FireWire, parallel, PS/2, etc., and configure itself appropriately. Systems and methods which determine the physical orientation of a connector with respect to another connector may also be provided alone or in combination with such systems and methods for selecting communication interfaces. The physical orientation of a connector can be determined by measuring an electrical characteristic and a device can then configure itself appropriately. In accordance with the principles of the present invention, device designs can decrease in size and cost as well as simplify operation for the end-user.

Abstract: A power line communication-based aircraft power distribution system may allow for both power line communication (PLC) technology and spread spectrum time domain reflectometry (SSTDR) technology to be utilized in aircraft power distribution systems to achieve key maintenance functions. Unlike conventional power distribution systems, which may, for example, use only SSTDR for fault detection, the present invention includes a hardware platform that may allow both the PLC and the SSTDR to be utilized in aircraft power distribution systems to achieve key maintenance functions, such as real time wire fault location, and cost and weight savings. Further, unlike conventional power distribution systems, which may only detect and locate damage in feeder conductor wire sections before the power is applied to the load, the power distribution system of the present invention may permit real time wire fault location.

Abstract: A power cycle test method for testing an electronic equipment (30) includes: configuring a total test count and a current test count; updating the current test count by incrementing the current test count by a value; utilizing a corresponding AC control signal, a corresponding DC control signal, and a reboot control signal to control the electronic equipment in sequence; checking whether the electronic equipment is in a workable condition when the electronic equipment is respectively controlled under the control signals; repeating the updating step, the utilizing step and the checking step until the current test count is equal to the total test count; and generating a result message if the current test count is equal to the total test count. A related system is also disclosed.

Abstract: A system and method for determining circuit functionality under varying external operating conditions. One embodiment provides a circuit for a given input signal. Internal signals are generated at internal nodes for the given input signal and the next set of external operating conditions. The internal signals are compared with internal reference signals to determine whether the integrated circuit is functional under the next set of external operating conditions. If the circuit is found functional under the next set of external operating conditions, then the internal reference signals are set equal to the internal signals, the initial set of external operating conditions are set equal to the next set of external operating conditions, and the above described method is repeated.

Abstract: Disclosed are systems and methods for monitoring an electrical wire. An appropriate safety device is utilized to monitor the electrical wire. The safety device includes a line side input configured to connect a line side power source and receive an electrical power signal from the line side power source. Additionally, the safety device includes a wire connection configured to connect to an electrical wire. The safety device further includes at least one relay or other suitable disconnection component configured to control the communication of the electrical power signal onto the electrical wire. The safety device also includes a control unit configured to test the electrical wire for at least one of miswires, wire faults, or abnormal conditions and, based at least in part on the results of the testing, to control the actuation of the at least one relay.

Abstract: A system for evaluating at least one tripping stimulus for a ground-fault circuit interrupter includes: a sensing circuit configured to measure a leakage current from a voltage line to ground, wherein the sensing circuit is capable of generating a leakage signal including a voltage representative of the leakage current; and an evaluating circuit configured to evaluate the leakage signal to generate an indication signal, wherein the indication signal includes information corresponding to the at least one tripping stimulus. The sensing circuit may include a circuit substantially similar to at least a portion of a ground-fault circuit interrupter, and the evaluating circuit may include a peak hold circuit. The system may further include an indicator circuit for receiving the indication signal and displaying a status of the tripping conditions.

Abstract: A simulated battery test device and method that is capable of testing a battery charging circuit and logic circuit to determine proper operation. An operational amplifier is used that can both source and sink current to simulate the operation of the battery. A battery low signal can be generated using the simulated battery test device to test a battery charging circuit and logic circuit in a battery low condition. In addition, a battery open signal can be generated to test the battery charging and logic circuit in a battery open condition. Charging currents are detected to determine if currents fall within an acceptable range.

Abstract: There is provided a measurement circuit including a main amplifier that generates a direct voltage in accordance with an input voltage and applies the generated voltage to a device under test, a feedback element that feeds back the direct voltage to the main amplifier and controls the direct voltage generated from the main amplifier to a voltage according to the input voltage, a current detecting circuit that outputs a detecting voltage according to a current value of the direct current, and a clamping circuit that restricts the current value of the direct current output from the main amplifier, in which the clamping circuit includes a first limiting-voltage output section that outputs a limiting voltage according to a limiting value of the direct current, a first bias generating section that generates a bias voltage making use of the input voltage as a reference voltage based on a magnitude relation between the limiting voltage and the detecting voltage, and a limiting-current supplying element that is provi

Abstract: A system configured to detect faults in signal lines. A system includes a first component configured to communicate with a second component via a signal path including one or more signal traces. Sense signal lines are manufactured such that at some point they are in close proximity to a signal trace which is to be monitored. The sense signal lines are configured to use parasitic coupling to redirect a portion of a signal conveyed via a signal trace to a monitoring component. The first component is configured to convey a test signal indicative of a type of test via the signal path, and a reference signal to the monitoring component. The monitoring component is configured to utilize the reference signal to ascertain a presence or absence, or characteristics of a received redirected signal. The monitoring component may optionally utilize a locally generated reference signal.

Abstract: According to an embodiment of the invention, a semiconductor testing system for testing a semiconductor device including an output buffer switching between a first mode for outputting data based on an input test signal and a second mode for setting an output terminal to a high impedance state, includes: a test signal generator supplying the test signal to the semiconductor device; an external tester setting an output terminal of the output buffer to a predetermined potential if the output buffer is set to the second mode; and a detecting circuit measuring a potential of an output of the output buffer, the detecting circuit detecting a stuck-at fault in the semiconductor device based on the data if the test signal designates the first mode and detecting a stuck-at fault in the semiconductor device based on the predetermined potential if the test signal designates the second mode.

Abstract: An integrated circuit has an analog output circuit for outputting an analog signal and a leadless terminal for connecting an output line of the analog output circuit to a circuit board by soldering, and measures and transfers an analog output voltage of the leadless terminal in a state in which it is mounted on the circuit board. A measuring unit has a switching unit for connecting the analog output circuit to the measuring unit upon failure diagnosis, and an AD converter for measuring the analog output voltage of the leadless terminal in a failure diagnosis state obtained by the switching unit; and causes the analog output voltage of the leadless terminal to be determined whether it is a normal voltage or an abnormal voltage by transferring the voltage measured by the AD converter to a determination unit through serial transfer.

Abstract: A system is disclosed that can be inserted between cable runs of electrical equipment so as to provide access to signal/data lines associated with the electrical equipment. The system includes a microprocessor and a matrix switch and preferably display equipment and measurement instrumentation. The microprocessor controls the matrix switch so as to route signals to a high impedance probe array that then feeds data to measurement instrumentation. The system provides pattern analyzers, which are resident in the microprocessor routine software. The measurement instrument provides measurement quantities, timing, and patterns that may be compared to known good data to ascertain the state of the health of the electrical equipment. The system is also capable of blocking signal paths and providing known good signals to the associated electrical equipment. Test data is stored in memory for later retrieval and the display equipment provides a pass, fail or intermittent indication.

Abstract: A method to discover defective coaxial shielding in cable lines in a building by inducing a test current into the nearby alternating current (AC) power lines (also known as “mains” in the United Kingdom) and measuring a resulting induced test signal inside the coaxial cable lines. A test signal current driven onto the power lines from a wall socket will propagate back to the main electrical box in the building. The main electrical box is normally connected to a ground, such as water pipes or a ground rod driven into the earth. Some of the test signal will be transferred to the outside of the coaxial cable in the building by radiation, conduction or induction. If the coaxial cable has perfect shield integrity, none of the test signal will be induced into the center conductor of the coaxial cable. However, if the coaxial cable has poor shielding integrity or a shield break, some portion of the test current will be transferred into the inside of the cable, potentially causing interference with cable signals.

Abstract: A test system for testing a backplane comprising an adapter assembly and a generic boundary-scan test unit. The adapter assembly includes an application-specific mating connector to communicatively couple the adapter assembly to an application-specific port of a backplane and an adapter generic connector. The generic boundary-scan test unit includes a test card generic connector to communicatively couple the generic boundary-scan test unit to the adapter generic connector of the adapter assembly and boundary-scan functionality to transmit at least one output test signal. The backplane is tested by communicating the output test signal from the generic boundary-scan test unit to the application-specific mating connector for testing the backplane and communicating at least one input test signal received from the backplane via the application-specific mating connector to the boundary-scan functionality of the generic boundary-scan test unit.

Abstract: The present invention is a method and an apparatus for detecting dependability vulnerabilities in production IT environments. In one embodiment, a method for detecting a dependability vulnerability in a production IT environment includes injecting a synthetic disturbance into the production IT environment and observing the response of the production IT environment to the synthetic disturbance.

Abstract: A method is provided for visual inspection of an array of interferometric modulators in various driven states. This method may include driving multiple columns or rows of interferometric modulators via a single test pad or test lead, such as test pad, and then observing the array for discrepancies between the expected optical output and the actual optical output of the array. This method may particularly include, for example, driving a set of non-adjacent rows or columns to a state different from the intervening rows or columns and then observing the optical output of the array.

Abstract: A power control circuit is provided in a vehicle control ECU mounted in a vehicle. The control circuit, when making a shift to a test mode by a test mode circuit, closes a relay to supply a power voltage from a battery to a power line in the similar manner as an ignition main switch is turned on. A logic circuit section of the test mode circuit is reset by an OR logic of a set level of a test terminal and a level of the power line.

Abstract: A test circuit and programmable voltage divider that may be used in the test circuit. The programmable voltage divider develops a voltage difference signal that may be digitally selected. The test circuit may be used to test and characterize sense amplifiers. The programmable voltage divider develops a signal with a selected polarity and magnitude that is provided to a sense amplifier being tested. The sense amplifier is set and its output latched. The latch contents are checked against an expected value. The difference voltage may be changed and the path retested to find passing and failing points.

Abstract: An evaluation board, on which is mounted a chip to be evaluated is provided. Particularly, the evaluation board includes a monitoring window for monitoring a power supply part, a ground part, and a surface of the chip, a first signal input part for inputting signals to the chip, and a second signal input part for inputting signals to the chip, wherein the second signal input part is placed as to sandwich said monitoring window between itself and the first signal input part.

Abstract: Method and system for non-destructive evaluation for a conducting structure by measuring the electrical impulse response thereof including applying a PRBS test input signal to the conducting structure, detecting an output signal from the conducting structure and processing the data to assess the condition of the conducting structure via changes in the electrical impulse response and to locate any defects along the conducting structure.

Abstract: The present invention is a technique for locating and identifying a failed filter/arrester in an underground conveyance such as a fiber optic cable. A sensor is installed in the filter/arrester housing to sense grounding of a cable locating frequency. The sensor will monitor the cable locating signal that is normally on the cable and blocked by the filter arrester to ground. A small radio frequency oscillator (85 to 88 Hz), also installed inside the filter housing, is activated by the sensor. The RF signal is detected above ground with standard cable locating equipment. A warning indicator such as an indicator light may also be installed on the outside of the filter housing. The indicator is also activated by the sensor. In that way, the particular failed filter can be identified if multiple filters are installed at that location. The power that will be required to operate the RF transmitter and indicator will be obtained from the voltage passing through the cable.

Abstract: A multi-chip module (MCM) assembly has two modules interconnected by respective interposers and a printed circuit board, and diagnostic logic within the modules uses the principal of signal reflection to located any open fault in the circuit path across the interposers. A first test signal is sent from module to the other and a determination is made as to whether any reflected signal represents an open fault of the circuit path at either of the interposers. If a reflected signal is received during a predetermined time, the diagnostic logic concludes that a single open fault exists only at the far interposer. If no reflected signal is received then the diagnostic logic concludes that there is at least one open fault at the near interposer, and the second module runs a similar test to check to see if both interposers have failures.

Abstract: A detecting method of a detecting circuit with a plugged test lead. The method includes setting an operation mode of the detecting circuit by a recognizing unit, transmitting a signal to the recognizing unit by an oscillating unit when the test lead plugs or unplugs into a split contact jack, receiving the signal from the oscillating unit by the recognizing unit, and determining a condition of the detecting circuit, and sending a message to a user in accordance with the determining result of the recognizing unit. Further, the oscillating unit is stopped from oscillating and outputs a quiescent state voltage to the recognizing unit when the plugged test lead is inserted into the split contact jack.

Abstract: An integrated circuit package includes at least two electronic circuits. A first of the at least two electronic circuits includes a digital input and a digital output and a test mode control line for setting the first integrated circuit chip into a determined test mode. The digital input includes at least two parallel input paths and the digital output includes at least two parallel output paths. The at least two parallel input paths and at least two parallel output paths provide a corresponding number of internal paths by which the first electronic circuit and a second electronic circuit can be tested essentially simultaneously.

Abstract: A circuit breaker includes a first lug and second and third acoustic lugs electrically connected to a power circuit. Separable contacts are electrically connected in series between the first lug and the second acoustic lug. An operating mechanism opens and closes the separable contacts. A first acoustic sensor is coupled to the second acoustic lug and senses a first acoustic signal from the second acoustic lug. A second acoustic sensor is coupled to the third acoustic lug and senses a second acoustic signal from the third acoustic lug. The first and second acoustic signals are operatively associated with a power circuit fault. A current sensor senses a current flowing between the first and second lugs. A circuit inputs the sensed acoustic signals and the sensed current and detects and distinguishes a parallel arc fault or a series arc fault from the sensed acoustic signals and the sensed current.

Abstract: Various tester configurations are provided that injects test signals into nets (e.g. 24). Non-linear characteristics of the response are detected (e.g. harmonics, do offset) and used to assess the adequacy or otherwise of device connections in the net.

Abstract: A method for detecting and locating a ground failure in an electrical line, of the type comprising a plurality of electrical loads connected to an electrical line (L) and supplied by a supply and control apparatus (1), each electrical load consisting of a load element and an auxiliary device, electrically connected to each other, with said method providing for: the transmission, over the electrical line (L), of at least a first control signal ((S(i,i+1))) from a first auxiliary device (Di), associated to a corresponding first load (Ci) belonging to the plurality of electrical loads, to a second auxiliary device ((Di+1)), associated to a corresponding second load ((Ci+1)), adjacent the first load (Ci), belonging to the plurality of electrical loads; the reception of the first control signal ((S(i,i+1))), transmitted by the first auxiliary device (Di), by the second auxiliary device ((Di+1)); the transmission of a first information signal (Inf(i+1,i)) to the supply and control apparatus (1) by the second auxili

Abstract: A low error, plugged test lead detecting circuit for providing accurate current measurement and the method using the same. When a test lead of the plugged detecting circuit is plugged into a split contact jack of the plugged detecting circuit, the circuit stops oscillating during operations for a test lead detecting mode or a fuse open detecting mode. During the test lead detecting mode, if the test lead is plugged into the split contact jack, the oscillating unit stops automatically and outputs a quiescent state. Conversely, if the test lead is unplugged into the split contact jack, the oscillating unit generates a pre-determined frequency pulse according to the oscillating unit. During the fuse open detecting mode, the test lead is plugged into the split contact jack. If a fuse is presented, the oscillating unit stops automatically and outputs a quiescent state. If the fuse is not presented or blown, the oscillating unit generates a pre-determined frequency pulse according to the oscillating unit.

Abstract: The invention relates to a two-wire transducer in automation engineering that outputs a measurement signal as an injected current. For the method to test the serviceability, it is proposed to increase the DC loop current (IS), independently of the measured value, from the minimum value towards the maximum value (ISM), and to measure the input voltage (UE) across the internal resistance of the transducer in the process, and to compare it with a definable threshold value (UES) that is greater than the minimum input voltage (UEM) required to maintain serviceability. If the input voltage (UE) falls below the threshold value (UES) before the DC loop current (IS) has reached its maximum value (ISM), the DC loop current (IS) is reduced until the input voltage (UE) reaches at least the definable threshold value (UES), and the error is signaled.

Abstract: For a communication system that employs interconnected communication components and defines a communication pathway running through the communication components and through interconnections therebetween, the communication pathway having test points, an apparatus for performing diagnostic tests on the communication system comprises testing agents residing on-board the communication components, and a test controller, coupled for communication over the communication pathway. The test controller includes a test signal apparatus coupled to send a test signal over the communication pathway, detectors, coupled to the test points, for sensing communication activity at the test points responsive to the test signal, and a communication activity analyzer, coupled to receive communication activity information from the detectors, for analyzing the received communication activity information to identify a fault and isolate a communication component containing the fault.

Abstract: A multi-layered circuit board a built-in component including multiple terminals, at least one signal pad formed on a top surface of the multi-layered circuit board for signal transmission, each of the at least one signal pad corresponding to one of the multiple terminals, and at least one test pad formed on the top surface of the multi-layered circuit board, each of the at least one test pad corresponding to one of the at least one signal pad for testing an electric path extending from the one signal pad through the one terminal to the each of the at least one test pad.

Abstract: Disclosed is a conductor inspection apparatus capable of detecting a state of an inspection-target electric conductor with a high degree of accuracy in a non-contact manner. The inspection apparatus includes a signal supply section 510 for supplying an inspection signal to an inspection-target conductor 520, and two sensor plates 570, 580 disposed approximately parallel to each other in the vicinity of the conductor 520. The inspection apparatus is designed to inspect a configuration of the conductor 520 disposed opposed to the sensor plate 570, in accordance with a measured signal level from the sensor plate 570.

Abstract: In a first aspect, a first method of testing a link between a first chip and a second chip is provided. The first method includes the steps of, while operating in a test mode, (1) transmitting test data of sufficient length to enable exercising of worst case transitions from the first chip to the second chip via the link; and (2) performing cyclic redundancy checking (CRC) on the test data to test the link. Numerous other aspects are provided.

Abstract: A method is disclosed for identifying a physical failure location on an IC without using layout-versus-schematic (LVS) verification tool. In the method, the integrated circuit is tested with one or more test patterns to identify a failure port thereon. Hierarchical information of the failure port is generated through the test patterns. A physical location of the failure port in a layout of the integrated circuit is identified through a relation between the hierarchical information and a floor plan report. Layout information of a routing path associated with the physical location of the failure port is retrieved from a layout database.

Abstract: A method and apparatus is provided for testing the logic functionality and electrical continuity of a ring oscillator comprising an odd number of inverters connected to form a closed loop. In the method and apparatus, a known value is forced through the ring oscillator, to test the complete circuit path thereof. Thus, a low overhead deterministic test of the functionality of the ring oscillator is provided. In a useful embodiment of the invention, a method is provided for testing functionality and electrical continuity in a ring oscillator, wherein a first test device is inserted between the input of a first inverter and the output of an adjacent second inverter. The first test device is then operated to apply first and second test bits as input test signals to the first inverter input.

Abstract: A system for detecting a defect or discontinuity in media or at an interface of the media includes a signal generator; a transmission path coupled to the signal generator, wherein the transmission path is arranged along or through the media; a detection circuit for detecting a transmitted and a detected portion of a signal provided by the signal generator; and a circuit for analyzing the reflected portion and identifying a location of a discontinuity or defect in the media. A related method of detecting a defect or discontinuity in media or at an interface between the media includes establishing an electromagnetic energy path along or through the media; coupling electromagnetic energy into the path; detecting a reflected portion of the electromagnetic energy; and analyzing the detected portion so as to determine a position of the defect or discontinuity.

Abstract: The present invention relates to a combining detection circuit for a flat panel display, which applies a combination circuit to detect the layout of a liquid crystal display thin film transistor array (LCD TFT array) manufacturing process. This method uses a plurality of switches and connection wires for directing in a short-ring layout and a shorting-bar layout so that when designing the layout, the panel manufacturer will not be limited to the detection facility. Therefore, the detection for any layout facility can be amply applied and the switches are used for freely switching the various detection methods so as to increase the yield and decrease the cost.

Abstract: A test and measurement instrument such as a Logic Analyzer, or the like, has at least one Reloadable Word Recognizer whose reference value can be loaded by a trigger machine with a current acquired data sample while data is being acquired. In a second embodiment useful for performing memory testing, the reloadable word recognizer is used in cooperation with two conventional word recognizers. In a third embodiment, a delay unit is employed to provide delayed input data words as reference words. In a fourth embodiment, an offset register and adder are used to modify the input data words before storing them. A fifth embodiment provides for substantially immediate use of base addresses of relocatable subroutines and stack-based variables recovered from a data stream acquired from a system under test.

Abstract: A method and apparatus for testing the loop impedance in residual current circuit breaker (RCCB) protected circuits is provided. An alternating test current is applied across the phase earth connections of a supply and a plurality of voltage samples are then taken across the connections. The voltage samples are subsequently transformed from time space to frequency space to allow the component due to the test current to be isolated. The loop impedance is then calculated.

Abstract: An electronic device has a first signal path, a first power supply path, and a connector that transmits to an external device the input signal on which the voltage has been superposed. The device also has a first power supply switch inserted into the first power supply path and an amplitude detector that detects at the connector an amplitude of the input signal, a control section that determines, based on a detection output from the amplitude detector, which a connection condition of the external device to the connector is a first condition in which the external device is not connected to the connector or a second condition in which the external device is connected to the connector. Based on the connection condition, the control section turns on or off the first power supply switch.

Abstract: An apparatus for testing the life of a leakage current protection device having a leakage current detection circuit. In one embodiment, the apparatus a trip mechanism state generator, a fault alarm generator, a ground fault simulation unit. In operation, the ground fault simulation unit generates a simulated ground fault signal during every positive half-wave of an AC power, the simulated ground fault signal is detected by the leakage current detection circuit, the leakage current detection circuit responsively generates a signal to turn a switching device into its conductive state so as to allow a current to pass therethrough, the passed current is converted into a DC voltage in accordance with a trip mechanism state generated by the trip mechanism state generator, the fault alarm circuit receives and analyzes the DC voltage and indicates whether a fault exists in the leakage current protection device.

Abstract: A loop impedance meter is provided for testing an AC electrical main supply incorporating a residual current device. The loop impedance meter includes an electrical control circuit for connecting a load resistance intermittently between the AC main supply terminal and the earth terminal to insure a potential difference between those terminals and to provide an indication of the loop impedance of the AC main supply from that potential difference. The control circuit includes an electronic switch in series with the load resistance, and arranged to open and close the electronic switch by applying a plurality of voltage pulses. The width of the voltage pulses is less than a millisecond, causing a series of measurement pulses of different widths to flow through the load resistance. The control circuit is arranged to process the results of measuring the loop impedance by extrapolating to the effective impedance at the AC mains supply frequency.