Abstract: A method characterizes a customer line for data transmission. The method includes measuring electrical properties of the customer line from a central location, identifying a line model from the measurements, and identifying a modem model for a modem selected for use with the customer line. The modem model gives performance data for the selected modem. The method also predicts performance data for the customer line when operated with the selected modem by combining the line and modem models.

Abstract: There is provided a method of testing an electrical switchgear system. A node in the electrical switchgear system monitors a power line signal and controls a breaker based on the power line signal. The method includes applying an analog signal to the node, and receiving data representing a status of the breaker. The analog signal simulates the power line signal.

Abstract: The present invention is directed to a circuit and method for self-testing a protection device for use in an AC power distribution system. The device is configured to be coupled between an AC power distribution system and at least one load. The method includes the step of introducing a simulated ground neutral fault during a first predetermined half cycle half cycle of the AC power. An attempt is made to detect the introduced simulated grounded neutral fault during the first predetermined half cycle half cycle. A fault condition is signaled if the introduced simulated grounded neutral fault is not detected within a predetermined period of time.

Abstract: It is provided a semiconductor integrated circuit device capable of easily designing a large scale circuit, particularly a circuit of a system LSI designed by combining circuits using plural intellectual properties and the like. The semiconductor integrated circuit includes a driving unit which is connected to a driven circuit via a transmission line and supplies a driving signal for driving the driven circuit to the driven circuit, a switch which is inserted into the transmission line between the driven circuit and the driving unit and which causes the driving signal, which is to be supplied to the driven circuit, to flow or to be cut off, and a transmission unit which is connected to the transmission line between the switch and the driving unit, and which transmits, to the driven circuit, a test signal supplied from outside the semiconductor integrated circuit device instead of the driving signal.

Abstract: According to an embodiment of the invention, a semiconductor testing system for testing a semiconductor device including an output buffer switching between a first mode for outputting data based on an input test signal and a second mode for setting an output terminal to a high impedance state, includes: a test signal generator supplying the test signal to the semiconductor device; an external tester setting an output terminal of the output buffer to a predetermined potential if the output buffer is set to the second mode; and a detecting circuit measuring a potential of an output of the output buffer, the detecting circuit detecting a stuck-at fault in the semiconductor device based on the data if the test signal designates the first mode and detecting a stuck-at fault in the semiconductor device based on the predetermined potential if the test signal designates the second mode.

Abstract: An apparatus for testing the life of a leakage current protection device having a leakage current detection circuit. In one embodiment, the apparatus a trip mechanism state generator, a fault alarm generator, a ground fault simulation unit. In operation, the ground fault simulation unit generates a simulated ground fault signal during every positive half-wave of an AC power, the simulated ground fault signal is detected by the leakage current detection circuit, the leakage current detection circuit responsively generates a signal to turn a switching device into its conductive state so as to allow a current to pass therethrough, the passed current is converted into a DC voltage in accordance with a trip mechanism state generated by the trip mechanism state generator, the fault alarm circuit receives and analyzes the DC voltage and indicates whether a fault exists in the leakage current protection device.

Abstract: A novel mechanism for performing high accuracy cable diagnostics. The mechanism utilizes time domain reflectometry (TDR) to detect and identify cable faults, perform estimations of cable length, identify cable topology, identify load and irregular impedance on metallic paired cable, such as twisted pair and coaxial cables. The TDR mechanism transmits pulses whose shapes are programmable and analyzes the signal reflections. The shapes of the pulses transmitted can be optimized in accordance with the channel characteristics. Further, the TDR mechanism is adapted to operative in the presence of high pass filters in the channel.

Abstract: A power supply controller apparatus is provided for use in a power supply apparatus including a battery assembly. The power supply controller apparatus includes a controller that controls supplying power to a load from said battery assembly through a capacitor connected between first and second contactors by turning on and off each of contactors. The controller detects whether or not each contactor is welded based on an output signal from one output terminal of both ends of the capacitor, when the each contactor is controlled to be turned off and an AC signal is applied to one input terminal of (a) one end of the battery assembly, (b) the other end of the battery assembly, and (c) each connection point between secondary batteries of the battery assembly.

Abstract: A circuit and method for judging a latent short-circuit defect, also known as a short-circuit defect with time passing, in the case of a high voltage system. A detection-dedicated wiring for detecting a short-circuit defect is provided between a first high voltage system wiring and a second high voltage wiring. A power supply and an ammeter is connected in series and one end of it is connected to the high voltage system wiring and the other end of it is connected to the detection-dedicated wiring. If a current value us higher than a predetermined value when the power supply is turned on, one can judge that the circuit has a high possibility of the latent short-circuit defect.

Abstract: A connection verification apparatus verifies interconnection between a plurality of logic blocks constituting a semiconductor integrated circuit or the like. It includes a connection verification section for verifying interconnection between a first logic block and a second logic block by comparing a signal level of an output terminal of the first logic block with a signal level of an input terminal of the second logic block connected to the output terminal of the first logic block. The connection verification apparatus can verify the interconnection between the two logic blocks without verifying the logic processing to the two logic blocks.

Abstract: A method for locating a ground fault in an electrical power distribution system includes providing a plurality of current sensors at a plurality of locations in the electrical power distribution system. The method further includes detecting a ground fault in the electrical power distribution system. Current is monitored at a plurality of locations in the electrical power distribution system via the current sensors and a test signal is introduced into the electrical power distribution system via a test signal generating device. The plurality of locations are monitored to locate the ground fault between a location at which the test signal is detected and a downstream location at which the test signal is not detected.

Abstract: A test system with easy to fabricate hardware to make measurements on differential signals. The two legs of a differential signal are applied to a comparator. A variable bias is introduced into the comparison operation. By taking multiple measurements with different bias levels, the level of the differential signal may be determined. The time of measurements relative to the start of the signal can be varied to allow plots of the signal to be made. Variability of the signal caused by noise can be measured by collecting sets of data points with the same bias level at the same relative time. Circuitry for introducing bias into the comparison is disclosed that allows measurements to be made with a pre-packaged, commercially available high speed comparator.

Abstract: A loop impedance meter for testing an A.C. electrical mains supply, including an electronic control circuit for connecting a load resistance intermittently between the A.C. mains supply terminal and the earth terminal to measure the potential difference between those terminals and to provide an indication of the loop impedance of the A.C. mains supply from that potential difference, wherein the control circuit is arranged to allow a train of short pulses of current to flow through the load resistance and the loop, the pulse train beginning its sequence with a first train of pulses for preconditioning any residual circuit device (RCD) present in the loop to temporarily desensitize it, wherein the first train of pulses is followed by one or more measurement pulses, the pulses of the first train being of generally increasing width.

Abstract: A drive circuit that supplies electric power to an electric load from a DC electric source includes a pair of series-connected first and second MOSFETS of the same conduction type, a pair of clamp circuits respectively connected between the drains and gates of the first and second MOSFETS, a series circuit of a first resistor and a switch, a first test terminal; a second test terminal connected to a joint of the first and second MOSFETS, a third test terminal for operating the switch, a fourth test terminal connected a joint of the first resistor and the switch; and a second resistor connected between the gate of the second MOSFET and the first test terminal. The switch and the first resistor are connected between the gate and the source of the first MOSFET to close when the drive circuit is normally operated and to open when it is given a high voltage test.

Abstract: A communications connector tester for quickly and accurately analyzing communications connectors at production to determine whether the connectors are fit for use in certain communications applications is disclosed. Test signals at several discrete frequencies are sequentially inputted into pairs of conductors in the communications connector under test, and output signals are detected for the pairs under test. The output signals are compared to acceptable ranges for certain applications of the communications connector and the connector is passed or failed for certain applications based on the output signal values. Near-end crosstalk, far-end crosstalk, return loss, insertion loss, and other communications connector qualities may be measured using the present invention.

Abstract: A method for measuring the duty cycle of a signal. The method is fast enough to allow duty cycle measurements of semi-conductor components during production. The method can also be performed inexpensively using automatic test equipment. A comparator in a digital channel is used to sense the state of an input signal at multiple points across the period of the signal. Fail processing circuitry within the tester is used to count the number of samples for which the input signal is in a logic HI state. This value is scaled by the total number of samples taken to produce a single number indicative of the duty cycle of the signal.

Abstract: A circuit breaker detects a fault, such as an arc fault or glowing contact, of a power circuit. The circuit breaker includes a first lug and a second acoustic lug adapted to be electrically connected to the power circuit. Separable contacts are electrically connected in series between the first lug and the second acoustic lug. An operating mechanism is adapted to open and close the separable contacts. An acoustic sensor is coupled to the second acoustic lug. The acoustic sensor is adapted to sense an acoustic signal from the second acoustic lug. The acoustic signal is operatively associated with the fault of the power circuit. A circuit inputs the sensed acoustic signal and is adapted to detect the fault therefrom.

Abstract: Described are methods and circuits for identifying defective device layers and localizing defects. Production PLD tests extract statistically significant data relating failed interconnect resources to the associated conductive metal layer. Failure data thus collected is then analyzed periodically to identify layer-specific problems. Test circuits in accordance with some embodiments employ interconnect resources heavily weighted in favor of specific conductive layers to provide improved layer-specific failure data. Some such test circuits are designed to identify open defects, while others are designed to identify short defects.

Abstract: An active matrix display device having a display region consisting of sub-pixels arrayed in a matrix fashion, the sub-pixels having switching elements, comprising a plurality of data and scan signal lines, and common voltage lines for sending signals and a reference voltage to the sub-pixels, test transistors, each of which is connected to one of the plurality of scan signal lines for sending test signals thereto, and a plurality of input terminals, each of which is connected to one of a plurality of the test transistors, wherein each gate of the test transistors and each of the common voltage lines are connected to one of the input terminals, the test transistors control inputs of the test signals to the sub-pixels.

Abstract: A test circuit employs use of first and second switches to operably charge a capacitor to over 500 volts and, thereafter, discharge energy stored in the capacitor to test an over-voltage protection circuit associated with a pin of a semiconductor device. When switched by a controller, the first switch couples a high voltage source to charge a capacitor. After completing this charge phase, the controller opens the first switch, decoupling the high voltage source from the capacitor. The controller then activates the second switch to couple the capacitor to the pin of the semiconductor device. During this discharge phase, energy in the capacitor discharges through the protection circuit of the semiconductor device. Use of a high-voltage dry reed vacuum relay as the first switch provides better isolation of the high voltage source from the capacitor, avoiding a presence of an unwanted residual voltage component in a simulated ESD test pulse.

Abstract: A test apparatus for testing an electric device includes a plurality of signal input-output units for inputting and/or outputting test signals in response to each of a plurality of terminals included by the electric device, a channel selection memory for storing pieces of channel selection information indicating whether each of the signal input-output units should perform setting based on a setting condition or not, a setting condition memory for storing the setting condition with regard to the signal input-output unit, and a controlling means for retrieving and supplying the setting condition stored in the setting condition memory and the channel selection information stored in the channel selection memory to the signal input-output units based on a setting instruction, when receiving the setting instruction to set the setting condition of the signal input-output unit, wherein when at least one of the signal input-output units is selected by the channel selection information supplied from the controlling mea

Abstract: A semiconductor device and a fabrication method thereof are provided. The semiconductor device has a probing pad formed on a chip. The probing pad is connected to an output pad and an internal circuit though a fuse. After an electrical testing of the chip by the probing pad, the fuse is cut by a laser beam. Therefore, the probing pad is disconnected from the output pad and the internal circuit. The output pad is connected to an output lead of a package, which is encapsulating the chip. According to the device and the fabrication methods thereof, performance of the device can be enhanced by a low parasitic capacitance and a low parasitic resistance.

Abstract: A method of testing a semiconductor circuit including a pair of contact pads, a biasing circuit for applying a voltage to the pair of contact pads, and a sensing circuit for providing a signal indicative of the voltage applied across the contact pads. The method includes determining a voltage gain and voltage offset of the sensing circuit while the biasing circuit is disabled. The method also includes enabling the biasing circuit to produce a voltage across the contact pads and determining, from the resulting output voltage produced by the sensing circuit, an actual output voltage produced by the biasing circuit at the contact pads based on the determined voltage gain and voltage offset of the sensing circuit.

Abstract: A delay locked loop (DLL) circuit and method for testing the operability of the circuit utilizes one or more test signal sources and a test signal receiver to selectively transmit test signals, for example, static test signals, through an array of delay elements of the DLL circuit. The resulting output signals of the array are used to determine whether any delay element or a tap selector of the DLL circuit has malfunctioned, e.g., stuck-at fault.

Abstract: A communications connector tester for quickly and accurately analyzing communications connectors at production to determine whether the connectors are fit for use in certain communications applications is disclosed. Test signals at several discrete frequencies are sequentially inputted into pairs of conductors in the communications connector under test, and output signals are detected for the pairs under test. The output signals are compared to acceptable ranges for certain applications of the communications connector and the connector is passed or failed for certain applications based on the output signal values. Near-end crosstalk, far-end crosstalk, return loss, insertion loss, and other communications connector qualities may be measured using the present invention.

Abstract: Disclosed herein is a method and system for calibrating line drive currents in systems that generate data signals by varying line drive currents and that interpret the data signals by comparing them to one or more reference voltages. The calibration includes varying the line drive current at a transmitting component. At different line drive currents, a receiver reference voltage is varied while the transmitting component transmits data to a receiving component. At each line drive current, the system records the highest and lowest receiver reference voltages at which data errors do not occur. The system then examines the recorded high and low receiver reference voltages to determine a desirable line drive current.

Abstract: The present invention is directed to an apparatus and method for a measurement system for the testing of transducers, and more particularly to the testing of piezoelectric transducers. The measurement system includes a transducer, a feedback amplifier coupled to the transducer and a signal processing circuit coupled to the output of the amplifier. The method of testing the transducer includes coupling the test signal to the transducer, disabling the amplifier, and measuring the response of the transducer to the test signal with the test processing circuit.

Abstract: The invention relates to a method for measuring a radio frequency signal in a wireless station (1). In this method, radio frequency power is measured by means of testing equipment (6, 7, 12), which includes at least a testing apparatus (7), a measuring head (6) and means (12) for transmitting electrical signals between the testing apparatus (7) and measuring head (6). The wireless station (1) includes at least one radio part (8), a wiring board (2), an antenna (5) and switching means (3, 22). This test switch has at least an first position, in which the radio frequency signal is directed between the radio part (8) of the wireless station (1) and the antenna (5), and a second position, in which the radio frequency signal is directed between the radio part (8) of the wireless station (1) and the testing apparatus (7) via the switching means (3, 22) and the measuring head (6).

Abstract: A method of detecting a state of an insulation resistance fall detector that includes: a detection resistance connected in series to an insulation resistance between a vehicle body and a power source; a condenser provided between the insulation resistance and the detection resistance; a pulse signal applying unit that applies a pulse signal to a serial circuit constituted by the insulation resistance, the condenser and the detection resistance; a low pass filter that filters a voltage of a connecting point between the coupling condenser and the detection resistance; and a fall detecting unit that detects a fall of the insulation resistance on the basis of the output of the filter, the method comprising the steps of: varying a pulse width of the pulse signal; and detecting the state of the insulation resistance fall detector on the basis of the output of the filter when the pulse width is varied.

Abstract: An insulation resistance drop detector 50 and a method of detecting a state of malfunction of the detector 50 are provided. When open of a coupling capacitor Co or malfunction of a lowpass filter 53 is occurred, a time constant of the low pass filter 53 is decreased and a rising time of an output of the lowpass filter 53 against an output of a pulse signal P1 becomes shorter than that in a state of normal. Thereby, malfunction of the detector 50 can be detected based on the output of the filter 53 corresponding to change of frequency of the pulse signal P1.

Abstract: One embodiment of the invention provides a system that characterizes cells within an integrated circuit. During operation, the system obtains a number of input noise signals to be applied to the cell. The system then simulates responses of the cell to each of the input noise signals, and stores a representation of the responses. This allows a subsequent analysis operation to access the stored representation to determine a response of the cell instead of having to perform a time-consuming simulation operation.

Abstract: The present invention is a technique for locating and identifying a failed filter/arrester in an underground conveyance such as a fiber optic cable. A sensor is installed in the filter/arrester housing to sense grounding of a cable locating frequency. The sensor will monitor the cable locating signal that is normally on the cable and blocked by the filter arrester to ground. A small radio frequency oscillator (85 to 88 Hz), also installed inside the filter housing, is activated by the sensor. The RF signal is detected above ground with standard cable locating equipment. A warning indicator such as an indicator light may also be installed on the outside of the filter housing. The indicator is also activated by the sensor. In that way, the particular failed filter can be identified if multiple filters are installed at that location. The power that will be required to operate the RF transmitter and indicator will be obtained from the voltage passing through the cable.

Abstract: An apparatus for sampling a power supply current value for performing frequency analysis of the power supply current flowing in an integrated circuit with a test signal applied to the integrated circuit has a power supply generating a prescribed supply of power for the integrated circuit (DUT: device under test), a current detection means for observing the power supply current value supplied from the power supply to the DUT, a test signal generation means for generating a prescribed test signal to be applied to an input/output terminal other than a power supply terminal of the DUT and for generating a test signal application signal during application of the test signal to the DUT, a sampling means for sampling the power supply current value signal, a sampling time determining means for instructing the sampling means with regard to the start and end timing for sampling, based on the test signal application signal, a sampling data storage means for storing data sampled by the sampling means, a Fourier transform

Abstract: A filter for preventing uncertain bits output by test scan chains from being provided to a MISR is provided. The filter can include a gating structure for receiving a bit from a scan chain and control circuitry for providing a predetermined signal to the gating structure if the bit is an uncertain bit. In one embodiment, the gating structure can include a logic gate, such as an AND or an OR gate. The control circuitry can include components substantially similar to the pattern generator providing signals to the scan chain. For example, the control circuitry can include an LFSR and a PRPG shadow for loading the LFSR. In one embodiment, the control circuitry can further include a phase-shifter for receiving inputs from the LFSR and providing outputs to the gating structure.

Abstract: Disclosed herein is a method and system for calibrating line drive currents in systems that generate data signals by varying line drive currents and that interpret the data signals by comparing them to one or more reference voltages. The calibration includes varying the line drive current at a transmitting component. At different line drive currents, a receiver reference voltage is varied while the transmitting component transmits data to a receiving component. At each line drive current, the system records the highest and lowest receiver reference voltages at which data errors do not occur. The system then examines the recorded high and low receiver reference voltages to determine a desirable line drive current.

Abstract: A method for performing circuit defect analysis and process problem identification includes applying a test signal to a circuit, obtaining a signal generated in response to the test signal, comparing the response signal to reference information, classifying a defect in the circuit based on a result of the comparing step, and identifying a problem in a manufacturing process which caused the defect based on the classification. The reference information may include one or more signal profiles corresponding to predefined types of defects that can occur during the manufacturing process. Defect classification is preferably performed by determining whether the response signal falls within one or more of the signal profiles. If the response signal falls within two or more signal profiles, then probabilities may be determined for each profile. The defect may then be classified as corresponding to the defect type whose signal profile has the highest probability.

Abstract: A system for determining characteristics associated with a communication channel includes a transmitter for transmitting a first signal via the communication channel. The system includes a receiver for receiving a second signal via the communication channel in response to the first signal. The second signal is associated with the first signal. The system includes a correlator for performing frequency domain correlation between a frequency domain representation of the second signal and frequency domain representations of a plurality of time-delayed versions of the first signal to generate frequency domain correlation information. The system includes an analyzer for identifying correlation peaks in a magnitude of the frequency domain correlation information to determine locations of discontinuities of the communication channel. The identified correlation peaks are associated with the locations of the discontinuities of the communication channel.

Abstract: According to one embodiment of the present invention, a method of high-speed duty cycle test through DC measurement using a combination of relays. The method includes: providing a plurality of relays to generate one or more duty cycle control signals; providing the duty cycle control signals to a device under test; measuring a first DC portion of a first output signal of the device under test; and dividing the first DC portion by a sum of the first DC portion and a second DC portion of a second output signal of the device under test.

Abstract: A system and method provides for direct control of a high speed data link in a computer system for purposes of testing the data link under a full range of anticipated operating conditions. The transmission of test data is preferably under hardware control and preferably does not encounter interference from other data sources in the computer system thereby enabling the intended test pattern data to be experienced by the data link under test in unaltered form. The tested data is preferably compared to the original data in order to evaluate the status of the link under test.

Abstract: A method and an apparatus are employed for individually monitoring the connectivity status of cables connected at a cable modem termination system (CMTS), where the cables conduct upstream and downstream RF communication signals. The monitoring is self-contained within the CMTS. The monitoring is achieved by producing a reference signal having a frequency outside the frequency range of the RF communication signals. The reference signal is injected onto the RF communication signal. The power level of the reference signal is detected within the CMTS, whereby the power level correlates with an expected cable load impedance. A DC control voltage based on the detected power level of the reference signal is generated, which allows a controller to determine the connectivity statuses of the connected cables.

Abstract: A circuit and method are described in which a DC voltage or current is connected to a high frequency, AC-coupled signal path between a transmitter and a receiver, and the bit error rate of the data transmission is tested while applying an altered bias voltage to the received signal. The bias voltage can be connected via a resistor, inductor or transistors. The transmitted signal is attenuated resistively, and a load capacitance is applied whose value causes digital transition times to exceed one unit interval. An intended application is testing of an integrated circuit, serializer/deserializer (serdes) operating above 1 GHz.

Abstract: A high-frequency surgical device encompassing control electronics that control a power unit which utilizes a high-frequency transformer that is the only galvanic separation between the supply voltage and the patient/user unit.

Abstract: A method for isolating a fault in an aircraft circuit having a lead conductor and a plurality of branch conductors coupled to the lead conductor is disclosed. The method includes coupling a reference line of a device to a ground of the lead conductor, coupling a supply/return line of the device to the lead conductor, supplying an impulse signal to the supply/return line, and receiving a reflected signal that is produced from the impulse signal. The method also includes determining whether a fault exists in the plurality of branch conductors using the reflected signal, coupling the reference line of the device to a ground of the plurality of branch conductors, coupling the supply/return line of the device to one of the plurality of branch conductors, and supplying a signal to the supply/return line.

Abstract: A system and method is provided for detecting an island condition using active detection. The active detection involves biasing the voltage, frequency, current or phase of a distributed resource connected to a utility network. Biasing the distributed resource involves inducing a change of voltage, frequency, current or phases above or below the normal operating values. The impact of this biasing on the system operating parameters can then be measure to determine if an island condition exists. Once an island condition has been detected, the system can initiate an anti-islanding procedure to remove the distributed resource from the utility network such as opening a breaker connecting the distributed resource to the network. Additionally, the system and method can include a passive element for detecting frequency and voltage (or other parameters) shifts above certain points.

Abstract: A method for inspecting relay open/close contacts for a contact weld is provided, each relay open/close contact being connected serially to each of a plurality of battery pack blocks. Battery ECUs for controlling the operating condition of each of the battery pack blocks employ one battery pack block for transmitting an inspection signal and the other battery pack blocks for receiving the inspection signal, such that the transmitting battery ECU transmits the inspection signal with its open/close contact closed. When any one of the other battery pack blocks receives the inspection signal at its battery ECU in which its open/close contact has not been closed, the open/close contact is determined to be welded. This inspection is performed successively with the transmitting and receiving battery ECUs being employed alternately in order to check the plurality of open/close contacts and their secondary open/close contacts for a contact weld.

Abstract: One embodiment of the present invention concerns a test assembly for testing product circuitry of a product die. In one embodiment, the test assembly includes at test die and an interconnection substrate for electrically coupling the test die to a host controller that communicates with the test die. The test die may be designed according to a design methodology that includes the step of concurrently designing test circuitry and a product circuitry in a unified design. The test circuitry can be designed to provide a high degree of fault coverage for the corresponding product circuitry generally without regard to the amount of silicon area that will be required by the test circuitry. The design methodology then partitions the unified design into the test die and the product die. The test die includes the test circuitry and the product die includes the product circuitry. The product and test die may then be fabricated on separate semiconductor wafers.

Abstract: A method of precisely determining velocity of propagation and the location of a fault on an electric transmission line, using a system of high frequency transmitter and receiver combinations to monitor and detect high frequency bursts produced by the transmitters and by faults, including memory and analysis capability to store and analyze high frequency data before and after a detected fault.

Abstract: A device (32) determines the location of a fault in an underground cable causing an earth leakage path from an internal conductor to earth at the location of the fault, such that when a signal is applied to the conductor, an earth leakage signal flows between the earth and conductor at the location of the fault. A multi-frequency signal is applied to the cable, this having at least two frequency components. Probes (24a, 24b) are positionable to receive the earth leakage signal. A processor (50) rectifies a first component of the earth leakage signal, corresponding to one frequency component of the applied signal, multiplies the rectified first component of the earth leakage signal with a second component of the earth linkage signal, corresponding to another frequency component of the applied signal, and from the result of that multiplication indicates the direction from the device to the fault.

Abstract: The present invention is directed to an apparatus and method for a measurement system for the testing of transducers, and more particularly to the testing of piezoelectric transducers. The measurement system includes a transducer, a feedback amplifier coupled to the transducer and a signal processing circuit coupled to the output of the amplifier. The method of testing the transducer includes coupling the test signal to the transducer, disabling the amplifier, and measuring the response of the transducer to the test signal with the test processing circuit.

Abstract: The present invention relates to a measuring system adapted for providing a measurement of an optical parameter of an optical device under test —DUT—, comprising a measuring instrument adapted to perform the measurement and to provide a measurement signal comprising a plurality of values of the measured optical parameter of the DUT over the time. To improve the measurement the measuring system is adapted to receive a temperature signal comprising a plurality of values of the measured temperature of the DUT over the time, and to provide an output signal wherein values of the measured temperature are associated to such values of the measured optical parameter of the DUT that correspond in time.